build: add Graviton2(arm64) config

Add meson build configuration for Graviton2 platform with 64-bit ARM Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB

3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode 100644

config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build index renamed from config/arm/meson.build +0 -0

8728051d5..64e277ebc 100644

config/arm/meson.build +10 -1

@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
 	['RTE_ARM_FEATURE_ATOMICS', true],
 	['RTE_EAL_IGB_UIO', false],
 	['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+	['RTE_MACHINE', '"neoverse-n1"'],
+	['RTE_MAX_LCORE', 64],
+	['RTE_CACHE_LINE_SIZE', 64],
+	['RTE_ARM_FEATURE_ATOMICS', true],
+	['RTE_USE_C11_MEM_MODEL', true],
+	['RTE_MAX_MEM_MB', 1048576],
+	['RTE_MAX_NUMA_NODES', 1],
+	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+	['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
 	['default', ['-march=armv8-a+crc']],

@@ -97,7 +107,7 @@ machine_args_generic = [
 	['0xd09', ['-mcpu=cortex-a73']],
 	['0xd0a', ['-mcpu=cortex-a75']],
 	['0xd0b', ['-mcpu=cortex-a76']],
-	['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],

flags_n1sdp_extra]]

config/arm/meson.build +2 -1

+	['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
 	['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--

2.16.6

+Jerin, Hemant, Dharmik

<snip>
Hi Vimal,
Few comments inline.

Quoted 7 lines

Add meson build configuration for Graviton2 platform with 64-bit ARM Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB

There will be multiple SoCs with N1 cores. All of them will have the same implementor ID and part number. But, they will have different values for these configurable parameters. IMO, from usage perspective, we have 2 cases:
1) Ability to build a portable binary that can run on multiple Arm SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2 etc)
2) Ability to build a binary which would run only on a SoC it was compiled for and provide the most optimized binary for that SoC. But, this may not be portable.

For 1) we have default march.

For 2) we do not have the capability today in meson build (at least, this is my understanding, please correct me if I am wrong). In this case, the user knows the target platform for compilation. IMO, we should add the capability to take the target platform as an input from the user (similar to the make build system) and Graviton2 can be one such target platform.

Quoted 71 lines

3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode 100644

config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build index renamed from config/arm/meson.build +0 -0

8728051d5..64e277ebc 100644

config/arm/meson.build +10 -1

@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
      ['RTE_ARM_FEATURE_ATOMICS', true],
      ['RTE_EAL_IGB_UIO', false],
      ['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+     ['RTE_MACHINE', '"neoverse-n1"'],
+     ['RTE_MAX_LCORE', 64],
+     ['RTE_CACHE_LINE_SIZE', 64],
+     ['RTE_ARM_FEATURE_ATOMICS', true],
+     ['RTE_USE_C11_MEM_MODEL', true],
+     ['RTE_MAX_MEM_MB', 1048576],
+     ['RTE_MAX_NUMA_NODES', 1],
+     ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+     ['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
      ['default', ['-march=armv8-a+crc']],

@@ -97,7 +107,7 @@ machine_args_generic = [
      ['0xd09', ['-mcpu=cortex-a73']],
      ['0xd0a', ['-mcpu=cortex-a75']],
      ['0xd0b', ['-mcpu=cortex-a76']],
-     ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],

flags_n1sdp_extra]]

config/arm/meson.build +2 -1

+     ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
      ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--

2.16.6

Quoted 8 lines

+Jerin, Hemant, Dharmik

<snip>
Hi Vimal,
Few comments inline.

Quoted 1 line

Quoted 7 lines

Quoted 6 lines

Add meson build configuration for Graviton2 platform with 64-bit ARM Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB

There will be multiple SoCs with N1 cores. All of them will have the same

implementor ID and part number. But, they will have different values for these configurable parameters.

Quoted 4 lines

IMO, from usage perspective, we have 2 cases:
1) Ability to build a portable binary that can run on multiple Arm SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2 etc)
2) Ability to build a binary which would run only on a SoC it was compiled

for and provide the most optimized binary for that SoC. But, this may not be portable.

Quoted 4 lines

For 1) we have default march.

For 2) we do not have the capability today in meson build (at least, this is

my understanding, please correct me if I am wrong). In this case, the user knows the target platform for compilation. IMO, we should add the capability to take the target platform as an input from the user (similar to the make build system) and Graviton2 can be one such target platform.

My intention was to have parameters that work for both N1SDP and Graviton2 rather than 2). Does the change to RTE_MAX_LCORE and RTE_MAX_MEM_MB make them incompatible with N1SDP?

I'm not sure if taking target platform from user is the best option here. Would this be specific to N1 since other platforms like thunderx differentiate the flags with part number?

Quoted 73 lines

Quoted 72 lines

3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode 100644

config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build index renamed from config/arm/meson.build +0 -0

8728051d5..64e277ebc 100644

config/arm/meson.build +10 -0

@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
      ['RTE_ARM_FEATURE_ATOMICS', true],
      ['RTE_EAL_IGB_UIO', false],
      ['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+     ['RTE_MACHINE', '"neoverse-n1"'],
+     ['RTE_MAX_LCORE', 64],
+     ['RTE_CACHE_LINE_SIZE', 64],
+     ['RTE_ARM_FEATURE_ATOMICS', true],
+     ['RTE_USE_C11_MEM_MODEL', true],
+     ['RTE_MAX_MEM_MB', 1048576],
+     ['RTE_MAX_NUMA_NODES', 1],
+     ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+     ['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
      ['default', ['-march=armv8-a+crc']], @@ -97,7 +107,7 @@

machine_args_generic = [

      ['0xd09', ['-mcpu=cortex-a73']],
      ['0xd0a', ['-mcpu=cortex-a75']],
      ['0xd0b', ['-mcpu=cortex-a76']],

- ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],
flags_n1sdp_extra]]

config/arm/meson.build +2 -1

+     ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
      ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--

2.16.6

<snip>

Quoted 34 lines · Honnappa Nagarahalli

Quoted 8 lines

+Jerin, Hemant, Dharmik

<snip>
Hi Vimal,
Few comments inline.

Quoted 1 line

Quoted 7 lines

Quoted 6 lines

Add meson build configuration for Graviton2 platform with 64-bit ARM Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB

There will be multiple SoCs with N1 cores. All of them will have the same

implementor ID and part number. But, they will have different values for these configurable parameters.

Quoted 4 lines

IMO, from usage perspective, we have 2 cases:
1) Ability to build a portable binary that can run on multiple Arm SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2 etc)
2) Ability to build a binary which would run only on a SoC it was compiled

for and provide the most optimized binary for that SoC. But, this may not be portable.

Quoted 4 lines

For 1) we have default march.

For 2) we do not have the capability today in meson build (at least, this is

my understanding, please correct me if I am wrong). In this case, the user knows the target platform for compilation. IMO, we should add the capability to take the target platform as an input from the user (similar to the make build system) and Graviton2 can be one such target platform.

Quoted 3 lines

My intention was to have parameters that work for both N1SDP and Graviton2 rather than 2). Does the change to RTE_MAX_LCORE and RTE_MAX_MEM_MB make them incompatible with N1SDP?

They are not optimal for N1SDP. In the future these parameters might have to be changed. For ex: if there a N1 based SoC with more than 64 CPU cores.

Quoted 5 lines

I'm not sure if taking target platform from user is the best option here. Would this be specific to N1 since other platforms like thunderx differentiate the flags with part number?

This issue is specific to Arm CPU cores in general. So, it applies to N1 too.

Quoted 73 lines

Quoted 73 lines

Quoted 72 lines

3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode 100644

config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build index renamed from config/arm/meson.build +0 -0

8728051d5..64e277ebc 100644

config/arm/meson.build +10 -0

@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
      ['RTE_ARM_FEATURE_ATOMICS', true],
      ['RTE_EAL_IGB_UIO', false],
      ['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+     ['RTE_MACHINE', '"neoverse-n1"'],
+     ['RTE_MAX_LCORE', 64],
+     ['RTE_CACHE_LINE_SIZE', 64],
+     ['RTE_ARM_FEATURE_ATOMICS', true],
+     ['RTE_USE_C11_MEM_MODEL', true],
+     ['RTE_MAX_MEM_MB', 1048576],
+     ['RTE_MAX_NUMA_NODES', 1],
+     ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+     ['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
      ['default', ['-march=armv8-a+crc']], @@ -97,7 +107,7 @@

machine_args_generic = [

      ['0xd09', ['-mcpu=cortex-a73']],
      ['0xd0a', ['-mcpu=cortex-a75']],
      ['0xd0b', ['-mcpu=cortex-a76']],

- ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],
flags_n1sdp_extra]]

config/arm/meson.build +2 -1

+     ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
      ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--

2.16.6

Quoted 29 lines

Quoted 29 lines · Honnappa Nagarahalli

Quoted 8 lines

+Jerin, Hemant, Dharmik

<snip>
Hi Vimal,
Few comments inline.

Quoted 1 line

Quoted 8 lines

Quoted 6 lines

Add meson build configuration for Graviton2 platform with 64-bit ARM Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB

There will be multiple SoCs with N1 cores. All of them will have the same

implementor ID and part number. But, they will have different values for these configurable parameters.

Quoted 6 lines

IMO, from usage perspective, we have 2 cases:
1) Ability to build a portable binary that can run on multiple Arm SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2 etc)
2) Ability to build a binary which would run only on a SoC it was compiled

for and provide the most optimized binary for that SoC. But, this may not be portable.

Quoted 1 line

Quoted 8 lines

Quoted 8 lines

Quoted 4 lines

For 1) we have default march.

For 2) we do not have the capability today in meson build (at least, this is

my understanding, please correct me if I am wrong). In this case, the user knows the target platform for compilation. IMO, we should add the capability to take the target platform as an input from the user (similar to the make build system) and Graviton2 can be one such

target platform.

Quoted 5 lines

Quoted 4 lines

My intention was to have parameters that work for both N1SDP and Graviton2 rather than 2). Does the change to RTE_MAX_LCORE and RTE_MAX_MEM_MB make them incompatible with N1SDP?

They are not optimal for N1SDP. In the future these parameters might have

to be changed. For ex: if there a N1 based SoC with more than 64 CPU cores.

Sorry for the late reply.

Looking at the Bluefield, Graviton2, and upcoming SoCs based on ARM IP, It is very clear that MIDR value can not be changed by the silicon vendors. So our existing build scheme of using the MIDR value-based probe does not work anymore with ARM IP.
So IMO, We need to change our build scheme. i.e

1) For native build just use -march=native

2) For cross-build, explicitly, mention the target to pick the configuration values instead of probing the MIDR value-based scheme.

If we agree, Any volunteers for the update to new scheme?

Quoted 84 lines

Quoted 6 lines

I'm not sure if taking target platform from user is the best option here. Would this be specific to N1 since other platforms like thunderx differentiate the flags with part number?

This issue is specific to Arm CPU cores in general. So, it applies to N1 too.

Quoted 75 lines

Quoted 75 lines

Quoted 74 lines

3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode

100644 config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build +10 -0

index 8728051d5..64e277ebc 100644
@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
      ['RTE_ARM_FEATURE_ATOMICS', true],
      ['RTE_EAL_IGB_UIO', false],
      ['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+     ['RTE_MACHINE', '"neoverse-n1"'],
+     ['RTE_MAX_LCORE', 64],
+     ['RTE_CACHE_LINE_SIZE', 64],
+     ['RTE_ARM_FEATURE_ATOMICS', true],
+     ['RTE_USE_C11_MEM_MODEL', true],
+     ['RTE_MAX_MEM_MB', 1048576],
+     ['RTE_MAX_NUMA_NODES', 1],
+     ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+     ['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
      ['default', ['-march=armv8-a+crc']], @@ -97,7 +107,7 @@

machine_args_generic = [

      ['0xd09', ['-mcpu=cortex-a73']],
      ['0xd0a', ['-mcpu=cortex-a75']],
      ['0xd0b', ['-mcpu=cortex-a76']],

- ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],
flags_n1sdp_extra]]

config/arm/meson.build +2 -0

+     ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
      ['default',

['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--
2.16.6

<snip>

Quoted 48 lines

Quoted 29 lines

Quoted 29 lines · Honnappa Nagarahalli

Quoted 8 lines

+Jerin, Hemant, Dharmik

<snip>
Hi Vimal,
Few comments inline.

Quoted 1 line

Quoted 8 lines

Quoted 6 lines

Add meson build configuration for Graviton2 platform with 64-bit ARM Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB

There will be multiple SoCs with N1 cores. All of them will have the same

implementor ID and part number. But, they will have different values for these configurable parameters.

Quoted 6 lines

IMO, from usage perspective, we have 2 cases:
1) Ability to build a portable binary that can run on multiple Arm SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2 etc)
2) Ability to build a binary which would run only on a SoC it was compiled

for and provide the most optimized binary for that SoC. But, this may not be portable.

Quoted 1 line

Quoted 8 lines

Quoted 8 lines

Quoted 4 lines

For 1) we have default march.

For 2) we do not have the capability today in meson build (at least, this is

my understanding, please correct me if I am wrong). In this case, the user knows the target platform for compilation. IMO, we should add the capability to take the target platform as an input from the user (similar to the make build system) and Graviton2 can be one such

target platform.

Quoted 5 lines

Quoted 4 lines

My intention was to have parameters that work for both N1SDP and Graviton2 rather than 2). Does the change to RTE_MAX_LCORE and RTE_MAX_MEM_MB make them incompatible with N1SDP?

They are not optimal for N1SDP. In the future these parameters might have

to be changed. For ex: if there a N1 based SoC with more than 64 CPU cores.

Sorry for the late reply.

Quoted 7 lines

Looking at the Bluefield, Graviton2, and upcoming SoCs based on ARM IP, It is very clear that MIDR value can not be changed by the silicon vendors. So our existing build scheme of using the MIDR value-based probe does not work anymore with ARM IP.
So IMO, We need to change our build scheme. i.e

1) For native build just use -march=native

I think we do not need the native build. With the native build, it is not possible to identify the SoC and use the correct configuration parameters.

Quoted 3 lines

2) For cross-build, explicitly, mention the target to pick the configuration values instead of probing the MIDR value-based scheme.

Agree

Quoted 2 lines

If we agree, Any volunteers for the update to new scheme?

Arm will work on this.

Quoted 85 lines

Quoted 85 lines

Quoted 7 lines

I'm not sure if taking target platform from user is the best option here. Would this be specific to N1 since other platforms like thunderx differentiate the flags with part number?

This issue is specific to Arm CPU cores in general. So, it applies to N1 too.

Quoted 75 lines

Quoted 75 lines

Quoted 74 lines

3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode

100644 config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build +10 -0

index 8728051d5..64e277ebc 100644
@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
      ['RTE_ARM_FEATURE_ATOMICS', true],
      ['RTE_EAL_IGB_UIO', false],
      ['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+     ['RTE_MACHINE', '"neoverse-n1"'],
+     ['RTE_MAX_LCORE', 64],
+     ['RTE_CACHE_LINE_SIZE', 64],
+     ['RTE_ARM_FEATURE_ATOMICS', true],
+     ['RTE_USE_C11_MEM_MODEL', true],
+     ['RTE_MAX_MEM_MB', 1048576],
+     ['RTE_MAX_NUMA_NODES', 1],
+     ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+     ['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
      ['default', ['-march=armv8-a+crc']], @@ -97,7 +107,7 @@

machine_args_generic = [

      ['0xd09', ['-mcpu=cortex-a73']],
      ['0xd0a', ['-mcpu=cortex-a75']],
      ['0xd0b', ['-mcpu=cortex-a76']],

- ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],
flags_n1sdp_extra]]

config/arm/meson.build +2 -0

+     ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
      ['default',

['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--
2.16.6

Quoted 51 lines · Honnappa Nagarahalli

<snip>

Quoted 48 lines

Quoted 29 lines

Quoted 29 lines · Honnappa Nagarahalli

Quoted 8 lines

+Jerin, Hemant, Dharmik

<snip>
Hi Vimal,
Few comments inline.

Quoted 1 line

Quoted 8 lines

Quoted 6 lines

Add meson build configuration for Graviton2 platform with 64-bit ARM Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB

There will be multiple SoCs with N1 cores. All of them will have the same

implementor ID and part number. But, they will have different values for these configurable parameters.

Quoted 6 lines

IMO, from usage perspective, we have 2 cases:
1) Ability to build a portable binary that can run on multiple Arm SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2 etc)
2) Ability to build a binary which would run only on a SoC it was compiled

for and provide the most optimized binary for that SoC. But, this may not be portable.

Quoted 1 line

Quoted 8 lines

Quoted 8 lines

Quoted 4 lines

For 1) we have default march.

For 2) we do not have the capability today in meson build (at least, this is

my understanding, please correct me if I am wrong). In this case, the user knows the target platform for compilation. IMO, we should add the capability to take the target platform as an input from the user (similar to the make build system) and Graviton2 can be one such

target platform.

Quoted 5 lines

Quoted 4 lines

My intention was to have parameters that work for both N1SDP and Graviton2 rather than 2). Does the change to RTE_MAX_LCORE and RTE_MAX_MEM_MB make them incompatible with N1SDP?

They are not optimal for N1SDP. In the future these parameters might have

to be changed. For ex: if there a N1 based SoC with more than 64 CPU cores.

Sorry for the late reply.

Quoted 8 lines

Quoted 7 lines

Looking at the Bluefield, Graviton2, and upcoming SoCs based on ARM IP, It is very clear that MIDR value can not be changed by the silicon vendors. So our existing build scheme of using the MIDR value-based probe does not work anymore with ARM IP.
So IMO, We need to change our build scheme. i.e

1) For native build just use -march=native

I think we do not need the native build. With the native build, it is not possible to identify the SoC and use the correct configuration parameters.

Ack. Both native and cross can use same config.

Quoted 3 lines

Quoted 3 lines

2) For cross-build, explicitly, mention the target to pick the configuration values instead of probing the MIDR value-based scheme.

Quoted 5 lines

Agree

Quoted 2 lines

If we agree, Any volunteers for the update to new scheme?

Arm will work on this.

Thanks. We wait for the patch for the rework before applying Graviton patches.

Quoted 86 lines

Quoted 86 lines

Quoted 86 lines

Quoted 8 lines

I'm not sure if taking target platform from user is the best option here. Would this be specific to N1 since other platforms like thunderx differentiate the flags with part number?

This issue is specific to Arm CPU cores in general. So, it applies to N1 too.

Quoted 75 lines

Quoted 75 lines

Quoted 74 lines

3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode

100644 config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build +10 -0

index 8728051d5..64e277ebc 100644
@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
      ['RTE_ARM_FEATURE_ATOMICS', true],
      ['RTE_EAL_IGB_UIO', false],
      ['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+     ['RTE_MACHINE', '"neoverse-n1"'],
+     ['RTE_MAX_LCORE', 64],
+     ['RTE_CACHE_LINE_SIZE', 64],
+     ['RTE_ARM_FEATURE_ATOMICS', true],
+     ['RTE_USE_C11_MEM_MODEL', true],
+     ['RTE_MAX_MEM_MB', 1048576],
+     ['RTE_MAX_NUMA_NODES', 1],
+     ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+     ['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
      ['default', ['-march=armv8-a+crc']], @@ -97,7 +107,7 @@

machine_args_generic = [

      ['0xd09', ['-mcpu=cortex-a73']],
      ['0xd0a', ['-mcpu=cortex-a75']],
      ['0xd0b', ['-mcpu=cortex-a76']],

- ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],
flags_n1sdp_extra]]

config/arm/meson.build +2 -0

+     ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
      ['default',

['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--
2.16.6

Quoted 51 lines · Honnappa Nagarahalli

<snip>

Quoted 48 lines

Quoted 29 lines

Quoted 29 lines · Honnappa Nagarahalli

Quoted 8 lines

+Jerin, Hemant, Dharmik

<snip>
Hi Vimal,
Few comments inline.

Quoted 1 line

Quoted 8 lines

Quoted 6 lines

Add meson build configuration for Graviton2 platform with 64-bit ARM Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB

There will be multiple SoCs with N1 cores. All of them will have the same

implementor ID and part number. But, they will have different values for these configurable parameters.

Quoted 6 lines

IMO, from usage perspective, we have 2 cases:
1) Ability to build a portable binary that can run on multiple Arm SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2 etc)
2) Ability to build a binary which would run only on a SoC it was compiled

for and provide the most optimized binary for that SoC. But, this may not be portable.

Quoted 1 line

Quoted 8 lines

Quoted 8 lines

Quoted 4 lines

For 1) we have default march.

For 2) we do not have the capability today in meson build (at least, this is

my understanding, please correct me if I am wrong). In this case, the user knows the target platform for compilation. IMO, we should add the capability to take the target platform as an input from the user (similar to the make build system) and Graviton2 can be one such

target platform.

Quoted 5 lines

Quoted 4 lines

My intention was to have parameters that work for both N1SDP and Graviton2 rather than 2). Does the change to RTE_MAX_LCORE and RTE_MAX_MEM_MB make them incompatible with N1SDP?

They are not optimal for N1SDP. In the future these parameters might have

to be changed. For ex: if there a N1 based SoC with more than 64 CPU cores.

Sorry for the late reply.

Quoted 8 lines

Quoted 7 lines

Looking at the Bluefield, Graviton2, and upcoming SoCs based on ARM IP, It is very clear that MIDR value can not be changed by the silicon vendors. So our existing build scheme of using the MIDR value-based probe does not work anymore with ARM IP.
So IMO, We need to change our build scheme. i.e

1) For native build just use -march=native

I think we do not need the native build. With the native build, it is not possible to identify the SoC and use the correct configuration parameters.

On 9/18/20, 12:42 PM, "Vimal Chungath" <[email protected]> wrote:

    On 9/17/20 9:02 PM, Jerin Jacob wrote:
    >
    > On Thu, Sep 17, 2020 at 10:41 PM Honnappa Nagarahalli
    > <[email protected]> wrote:
    >>
    >> <snip>
    >>
    >>>>>
    >>>>> On 9/11/20 8:23 PM, Honnappa Nagarahalli wrote:
    >>>>>>
    >>>>>> +Jerin, Hemant, Dharmik
    >>>>>>
    >>>>>> <snip>
    >>>>>> Hi Vimal,
    >>>>>>         Few comments inline.
    >>>>>>
    >>>>>>>
    >>>>>>> Add meson build configuration for Graviton2 platform with 64-bit
    >>>>>>> ARM Neoverse N1 cores. This patch makes the following changes

to

Quoted 14 lines

Quoted 14 lines

Quoted 14 lines

Quoted 14 lines

Quoted 14 lines

Quoted 6 lines

Quoted 4 lines

generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB

There will be multiple SoCs with N1 cores. All of them will have the same

implementor ID and part number. But, they will have different values for these configurable parameters.

Quoted 6 lines

IMO, from usage perspective, we have 2 cases:
1) Ability to build a portable binary that can run on multiple Arm SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2 etc)
2) Ability to build a binary which would run only on a SoC it was compiled

Quoted 2 lines

Quoted 2 lines

Quoted 2 lines

Quoted 2 lines

Quoted 2 lines

for and provide the most optimized binary for that SoC. But, this may not be portable.

For native binaries the answer should be either use -march=native or map the MIDR to the compiler options. The MIDR defines the core and thus the core features and which architecture features the compiler supports. It seems like

the only sticking point here is RTE_MAX_MEM_MB and RTE_MAX_LCORE. Is the slight increase in memory size by having a reasonable max for the various SoCs given a single core MIDR (80 seems to be the high number for N1 currently), reason to add complexity and require the user to explicitly pass the system they're compiling for?

Ali

These two patches add meson and make build configuration for AWS Graviton2 platform. I plan to send platform guide patch separately.

Vimal Chungath (2):
config: add Graviton2(arm64) meson configuration
config: add Graviton2(arm64) defconfig

Hello Vimal,

Quoted 5 lines · Vimal Chungath

These two patches add meson and make build configuration for AWS Graviton2 platform. I plan to send platform guide patch separately.

Quoted 3 lines

Vimal Chungath (2):
config: add Graviton2(arm64) meson configuration
config: add Graviton2(arm64) defconfig

I did not look at the patches, just looked at the cover letter. You can drop the makefile config files since make support has been dropped. Thanks.

-----Original Message-----
From: Vimal Chungath <[email protected]>
Sent: Tuesday, October 27, 2020 3:18 PM
To: [email protected]
Cc: Honnappa Nagarahalli <[email protected]>; Dharmik Thakkar <[email protected]>; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; nd <[email protected]>; [email protected]
Subject: [PATCH v2 1/1] build: add Graviton2(arm64) meson configuration

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode 100644

config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build index renamed from config/arm/meson.build +0 -0

b49203fa8..0e7124843 100644

config/arm/meson.build +11 -1

@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
 	['RTE_ARM_FEATURE_ATOMICS', true],
 	['RTE_EAL_IGB_UIO', false],
 	['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+	['RTE_MACHINE', '"neoverse-n1"'],
+	['RTE_MAX_LCORE', 64],
+	['RTE_CACHE_LINE_SIZE', 64],
+	['RTE_ARM_FEATURE_ATOMICS', true],
+	['RTE_USE_C11_MEM_MODEL', true],
+	['RTE_MAX_MEM_MB', 1048576],
+	['RTE_MAX_NUMA_NODES', 1],
+	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+	['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
 	['default', ['-march=armv8-a+crc', '-moutline-atomics']], @@ -97,7
+107,7 @@ machine_args_generic = [
 	['0xd09', ['-mcpu=cortex-a73']],
 	['0xd0a', ['-mcpu=cortex-a75']],
 	['0xd0b', ['-mcpu=cortex-a76']],
-	['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],

flags_n1sdp_extra]]

config/arm/meson.build +2 -1

+	['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
 	['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--

2.16.6

Hello,
IMO, Juraj's patch for meson build rework for Arm platforms will need some time. Keeping the RC2 deadline in mind, it makes sense to accept this patch and target Juraj's patch for 21.02.

Any opinions?

Quoted 16 lines

-----Original Message-----
From: Vimal Chungath <[email protected]>
Sent: Tuesday, October 27, 2020 3:18 PM
To: [email protected]
Cc: Honnappa Nagarahalli <[email protected]>; Dharmik Thakkar <[email protected]>; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; nd <[email protected]>; [email protected]
Subject: [PATCH v2 1/1] build: add Graviton2(arm64) meson configuration

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

Quoted 8 lines

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

Reviewed-by Honnappa Nagarahalli <[email protected]>

Quoted 64 lines

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode 100644

config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build index renamed from config/arm/meson.build +0 -0

b49203fa8..0e7124843 100644

config/arm/meson.build +11 -1

@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
      ['RTE_ARM_FEATURE_ATOMICS', true],
      ['RTE_EAL_IGB_UIO', false],
      ['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+     ['RTE_MACHINE', '"neoverse-n1"'],
+     ['RTE_MAX_LCORE', 64],
+     ['RTE_CACHE_LINE_SIZE', 64],
+     ['RTE_ARM_FEATURE_ATOMICS', true],
+     ['RTE_USE_C11_MEM_MODEL', true],
+     ['RTE_MAX_MEM_MB', 1048576],
+     ['RTE_MAX_NUMA_NODES', 1],
+     ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+     ['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
      ['default', ['-march=armv8-a+crc', '-moutline-atomics']], @@ -97,7
+107,7 @@ machine_args_generic = [
      ['0xd09', ['-mcpu=cortex-a73']],
      ['0xd0a', ['-mcpu=cortex-a75']],
      ['0xd0b', ['-mcpu=cortex-a76']],
-     ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],

flags_n1sdp_extra]]

config/arm/meson.build +2 -1

+     ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
      ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--

2.16.6

Quoted 3 lines

Hello,
IMO, Juraj's patch for meson build rework for Arm platforms will need

some time. Keeping the RC2 deadline in mind, it makes sense to accept this patch and target Juraj's patch for 21.02.

Quoted 1 line

Quoted 1 line

Any opinions?

I feel, Recent Juraj's changes looks in good shape, I think, once he fixes your review comment and sends the next version. We can test it and give the final reviewed by and merge it in RC2.
IMO, Those changes are critical to adding a new platform when MIDR is the same value.

Quoted 95 lines

Quoted 19 lines

-----Original Message-----
From: Vimal Chungath <[email protected]>
Sent: Tuesday, October 27, 2020 3:18 PM
To: [email protected]
Cc: Honnappa Nagarahalli <[email protected]>; Dharmik Thakkar <[email protected]>; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; nd <[email protected]>; [email protected]
Subject: [PATCH v2 1/1] build: add Graviton2(arm64) meson configuration

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

Quoted 8 lines

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

Reviewed-by Honnappa Nagarahalli <[email protected]>

Quoted 65 lines

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode

100644 config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build index renamed from config/arm/meson.build +0 -0

b49203fa8..0e7124843 100644

config/arm/meson.build +11 -2

@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
      ['RTE_ARM_FEATURE_ATOMICS', true],
      ['RTE_EAL_IGB_UIO', false],
      ['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+     ['RTE_MACHINE', '"neoverse-n1"'],
+     ['RTE_MAX_LCORE', 64],
+     ['RTE_CACHE_LINE_SIZE', 64],
+     ['RTE_ARM_FEATURE_ATOMICS', true],
+     ['RTE_USE_C11_MEM_MODEL', true],
+     ['RTE_MAX_MEM_MB', 1048576],
+     ['RTE_MAX_NUMA_NODES', 1],
+     ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+     ['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
      ['default', ['-march=armv8-a+crc', '-moutline-atomics']], @@
-97,7
+107,7 @@ machine_args_generic = [
      ['0xd09', ['-mcpu=cortex-a73']],
      ['0xd0a', ['-mcpu=cortex-a75']],
      ['0xd0b', ['-mcpu=cortex-a76']],
-     ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],

flags_n1sdp_extra]]

config/arm/meson.build +2 -1

+     ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
      ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--

2.16.6

-----Original Message-----
From: dev <[email protected]> On Behalf Of Vimal Chungath
Sent: Wednesday, October 28, 2020 4:18 AM
To: [email protected]
Cc: Honnappa Nagarahalli <[email protected]>; Dharmik Thakkar <[email protected]>; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; nd <[email protected]>; [email protected]
Subject: [dpdk-dev] [PATCH v2 1/1] build: add Graviton2(arm64) meson configuration

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 12 +++++++++++-
 2 files changed, 28 insertions(+), 1 deletion(-)  create mode 100644

config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build index renamed from config/arm/meson.build +0 -0

b49203fa8..0e7124843 100644

config/arm/meson.build +11 -1

@@ -86,6 +86,16 @@ flags_octeontx2_extra = [
 	['RTE_ARM_FEATURE_ATOMICS', true],
 	['RTE_EAL_IGB_UIO', false],
 	['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+	['RTE_MACHINE', '"neoverse-n1"'],
+	['RTE_MAX_LCORE', 64],
+	['RTE_CACHE_LINE_SIZE', 64],
+	['RTE_ARM_FEATURE_ATOMICS', true],
+	['RTE_USE_C11_MEM_MODEL', true],
+	['RTE_MAX_MEM_MB', 1048576],
+	['RTE_MAX_NUMA_NODES', 1],
+	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+	['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
 	['default', ['-march=armv8-a+crc', '-moutline-atomics']], @@ -97,7
+107,7 @@ machine_args_generic = [
 	['0xd09', ['-mcpu=cortex-a73']],
 	['0xd0a', ['-mcpu=cortex-a75']],
 	['0xd0b', ['-mcpu=cortex-a76']],
-	['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],

flags_n1sdp_extra]]

machine_args_cavium = [
['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--
2.16.6

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 18 +++++++++++-------
 2 files changed, 28 insertions(+), 7 deletions(-)

-----Original Message-----
From: Thomas Monjalon <[email protected]>
Sent: Wednesday, November 4, 2020 12:02 AM
To: Vimal Chungath <[email protected]>; [email protected]; [email protected]; Jerin Jacob Kollanukkaran <[email protected]>; [email protected]
Cc: [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]
Subject: [EXT] Re: [PATCH v3 1/1] build: add Graviton2(arm64) meson configuration

External Email

----------------------------------------------------------------------
03/11/2020 19:06, Vimal Chungath:

Quoted 11 lines

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://urldefense.proofpoint.com/v2/url?u=https-3A__aws.amazon.com_ec

2_graviton_&d=DwICAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=1DGob4H4rxz6H8uI TozGOC

Quoted 1 line

a0s5f4wCNtTa4UUKvcsvI&m=VIL7guv5hWfA3ZiECZxC4FEeNOo_69gC-

HJTjyaKbrU&s=

Quoted 2 lines

z3abjQkX_xJl1gOHkfowNmcVS0an6I2Dbzf8NTtoUQ0&e=

Quoted 5 lines

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 18 +++++++++++-------
 2 files changed, 28 insertions(+), 7 deletions(-)

Can this patch be merged without the rework from Juraj?

Quoted 31 lines

-----Original Message-----
From: Thomas Monjalon <[email protected]>
Sent: Wednesday, November 4, 2020 12:02 AM
To: Vimal Chungath <[email protected]>; [email protected]; [email protected]; Jerin Jacob Kollanukkaran <[email protected]>; [email protected]
Cc: [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]
Subject: [EXT] Re: [PATCH v3 1/1] build: add Graviton2(arm64) meson configuration

External Email

----------------------------------------------------------------------
03/11/2020 19:06, Vimal Chungath:

Quoted 13 lines

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 18 +++++++++++-------
 2 files changed, 28 insertions(+), 7 deletions(-)

Quoted 1 line

Can this patch be merged without the rework from Juraj?

Yes. +1

@Vimal Chungath, Could you review and test Juraj changes on Graviton2 so that Juraj changes can be targeted for 21.02.

Quoted 11 lines

Quoted 11 lines

---------------------------------------------------------------------
-
03/11/2020 19:06, Vimal Chungath:

Quoted 8 lines

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

Quoted 7 lines

Quoted 7 lines

Quoted 5 lines

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 18 +++++++++++-------
 2 files changed, 28 insertions(+), 7 deletions(-)

Can this patch be merged without the rework from Juraj?

Quoted 6 lines

Yes. +1

@Vimal Chungath, Could you review and test Juraj changes on Graviton2 so that Juraj changes can be targeted for 21.02.

Yes, will do that.

-----Original Message-----
From: Vimal Chungath <[email protected]>
Sent: Tuesday, November 3, 2020 12:07 PM
To: [email protected]
Cc: Honnappa Nagarahalli <[email protected]>; Dharmik Thakkar <[email protected]>; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; nd <[email protected]>; [email protected]
Subject: [PATCH v3 1/1] build: add Graviton2(arm64) meson configuration

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 18 +++++++++++-------
 2 files changed, 28 insertions(+), 7 deletions(-)  create mode 100644

config/arm/arm64_graviton2_linux_gcc

config/arm/arm64_graviton2_linux_gcc new file +17 -0

new file mode 100644
index 000000000..022e06303
@@ -0,0 +1,17 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'

config/arm/meson.build index renamed from config/arm/meson.build +0 -0

b49203fa8..073b4afc0 100644

config/arm/meson.build +11 -7

@@ -63,12 +63,6 @@ flags_armada = [
 	['RTE_MAX_LCORE', 16]]
 
 flags_default_extra = []
-flags_n1sdp_extra = [
-	['RTE_MACHINE', '"n1sdp"'],
-	['RTE_MAX_NUMA_NODES', 1],
-	['RTE_MAX_LCORE', 4],
-	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
-	['RTE_LIBRTE_VHOST_NUMA', false]]
 flags_thunderx_extra = [
 	['RTE_MACHINE', '"thunderx"'],
 	['RTE_USE_C11_MEM_MODEL', false]]

@@ -86,6 +80,16 @@ flags_octeontx2_extra = [
 	['RTE_ARM_FEATURE_ATOMICS', true],
 	['RTE_EAL_IGB_UIO', false],
 	['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+	['RTE_MACHINE', '"neoverse-n1"'],
+	['RTE_MAX_LCORE', 64],
+	['RTE_CACHE_LINE_SIZE', 64],
+	['RTE_ARM_FEATURE_ATOMICS', true],
+	['RTE_USE_C11_MEM_MODEL', true],
+	['RTE_MAX_MEM_MB', 1048576],
+	['RTE_MAX_NUMA_NODES', 1],
+	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+	['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
 	['default', ['-march=armv8-a+crc', '-moutline-atomics']], @@ -97,7
+101,7 @@ machine_args_generic = [
 	['0xd09', ['-mcpu=cortex-a73']],
 	['0xd0a', ['-mcpu=cortex-a75']],
 	['0xd0b', ['-mcpu=cortex-a76']],
-	['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],

flags_n1sdp_extra]]

config/arm/meson.build +2 -1

+	['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+flags_n1generic_extra]]
 
 machine_args_cavium = [
 	['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
--

2.16.6

Quoted 8 lines

Add meson build configuration for Graviton2 platform with 64-bit Arm Neoverse N1 cores. This patch makes the following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

Quoted 4 lines

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by Vimal Chungath <[email protected]>

Reviewed-by Honnappa Nagarahalli <[email protected]>