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can: mcp25xxfd: Limit spiclk to 0.85*(sysclk/2)

PATCH In review Thomas Kopp 2 participants 2 messages Sep 16, 2020 CAN network drivers

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Thomas Kopp

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PATCH 1/1 can: mcp25xxfd: Limit spiclk to 0.85*(sysclk/2)

Signed-off-by Thomas Kopp <[email protected]>
---
 drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c +4 -2
index 6ffa7af50119..670b7d1e1f46 100644
@@ -2821,11 +2821,13 @@ static int mcp25xxfd_probe(struct spi_device *spi)
 	 * 2518	40 MHz	allwinner,sun8i-h3	allwinner,sun8i-h3-spi	18750000 Hz	 93.75%	600000000 Hz	bad	assigned-clocks = <&ccu CLK_SPIx>
 	 * 2517	20 MHz	fsl,imx8mm		fsl,imx51-ecspi		 9090909 Hz	 90.09%	 18181819 Hz	good	assigned-clocks = <&clk IMX8MM_CLK_ECSPIx_ROOT>
 	 * 2517	20 MHz	fsl,imx8mm		fsl,imx51-ecspi		 9523809 Hz	 95.34%	 28571429 Hz	bad	assigned-clocks = <&clk IMX8MM_CLK_ECSPIx_ROOT>
+	 * 2517 40 MHz  atmel,sama5d27          atmel,at91rm9200-spi    16400000 Hz      82%     82000000 Hz    good    default
+	 * 2518 40 MHz  atmel,sama5d27          atmel,at91rm9200-spi    16400000 Hz      82%     82000000 Hz    good    default
 	 *
-	 * Limit SPI clock to 92.5% of SYSCLOCK / 2 for now.
+	 * Limit SPI clock to 85% of SYSCLOCK / 2 for now.
 	 */
 	priv->spi_max_speed_hz_orig = spi->max_speed_hz;
-	spi->max_speed_hz = min(spi->max_speed_hz, freq / 2 / 1000 * 925);
+	spi->max_speed_hz = min(spi->max_speed_hz, freq / 2 / 1000 * 850);
 	spi->bits_per_word = 8;
 	spi->rt = true;
 	err = spi_setup(spi);
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2.25.1
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#1 lore raw
Quoted 16 lines · Thomas Kopp
Signed-off-by Thomas Kopp <[email protected]>
---
 drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c +2 -0
index 6ffa7af50119..670b7d1e1f46 100644
@@ -2821,11 +2821,13 @@ static int mcp25xxfd_probe(struct spi_device *spi)
 	 * 2518	40 MHz	allwinner,sun8i-h3	allwinner,sun8i-h3-spi	18750000 Hz	 93.75%	600000000 Hz	bad	assigned-clocks = <&ccu CLK_SPIx>
 	 * 2517	20 MHz	fsl,imx8mm		fsl,imx51-ecspi		 9090909 Hz	 90.09%	 18181819 Hz	good	assigned-clocks = <&clk IMX8MM_CLK_ECSPIx_ROOT>
 	 * 2517	20 MHz	fsl,imx8mm		fsl,imx51-ecspi		 9523809 Hz	 95.34%	 28571429 Hz	bad	assigned-clocks = <&clk IMX8MM_CLK_ECSPIx_ROOT>
+	 * 2517 40 MHz  atmel,sama5d27          atmel,at91rm9200-spi    16400000 Hz      82%     82000000 Hz    good    default
+	 * 2518 40 MHz  atmel,sama5d27          atmel,at91rm9200-spi    16400000 Hz      82%     82000000 Hz    good    default

drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c static int mcp25xxfd_probe(struct spi_device *spi) · line 2833

Quoted 10 lines
drivers/net/can/spi/mcp25xxfd/mcp25xxfd-core.c +2 -2
 	 *
-	 * Limit SPI clock to 92.5% of SYSCLOCK / 2 for now.
+	 * Limit SPI clock to 85% of SYSCLOCK / 2 for now.
 	 */
 	priv->spi_max_speed_hz_orig = spi->max_speed_hz;
-	spi->max_speed_hz = min(spi->max_speed_hz, freq / 2 / 1000 * 925);
+	spi->max_speed_hz = min(spi->max_speed_hz, freq / 2 / 1000 * 850);
 	spi->bits_per_word = 8;
 	spi->rt = true;
 	err = spi_setup(spi);

Squashed into the "can: mcp25xxfd: add driver for Microchip MCP25xxFD SPI CAN" patch.

thanks,
Marc

Signature · 4 lines
Pengutronix e.K.                 | Marc Kleine-Budde           |
Embedded Linux                   | https://www.pengutronix.de  |
Vertretung West/Dortmund         | Phone: +49-231-2826-924     |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-5555 |