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mtd: spi-nor: Fix address width on flash chips > 16MB

PATCH Superseded Bert Vermeulen 4 participants 4 messages Oct 4, 2020 – Oct 7, 2020

Subsystems (2)
Memory technology devices (MTD) SPI NOR
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Bert Vermeulen

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#0 lore raw

PATCH v2 1/1 mtd: spi-nor: Fix address width on flash chips > 16MB

If a flash chip has more than 16MB capacity but its BFPT reports BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_set_addr_width() doesn't catch it because addr_width did get set. This fixes that check.

Signed-off-by Bert Vermeulen <[email protected]>
---
 drivers/mtd/spi-nor/core.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
drivers/mtd/spi-nor/core.c +5 -3
index 0369d98b2d12..a2c35ad9645c 100644
@@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
 		/* already configured from SFDP */
 	} else if (nor->info->addr_width) {
 		nor->addr_width = nor->info->addr_width;
-	} else if (nor->mtd.size > 0x1000000) {
-		/* enable 4-byte addressing if the device exceeds 16MiB */
-		nor->addr_width = 4;
 	} else {
 		nor->addr_width = 3;
 	}
 
+	if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+		/* enable 4-byte addressing if the device exceeds 16MiB */
+		nor->addr_width = 4;
+	}
+
 	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
 		dev_dbg(nor->dev, "address width is too large: %u\n",
 			nor->addr_width);
Signature · 1 line
2.17.1
Reviewed-by on v2 1/1
#1 lore raw
Quoted 8 lines · Bert Vermeulen

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If a flash chip has more than 16MB capacity but its BFPT reports BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_set_addr_width() doesn't catch it because addr_width did get set. This fixes that check.

the problem was uncovered with commit f9acd7fa80be, so maybe a Fixes tag will help.

Fixes f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
Quoted 1 line
Signed-off-by Bert Vermeulen <[email protected]>

We can have this automatically in the stable tree by adding the tag:

Cc [email protected]
Reviewed-by Tudor Ambarus <[email protected]>
Quoted 30 lines
---
 drivers/mtd/spi-nor/core.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
drivers/mtd/spi-nor/core.c +5 -4
index 0369d98b2d12..a2c35ad9645c 100644
@@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
                /* already configured from SFDP */
        } else if (nor->info->addr_width) {
                nor->addr_width = nor->info->addr_width;
-       } else if (nor->mtd.size > 0x1000000) {
-               /* enable 4-byte addressing if the device exceeds 16MiB */
-               nor->addr_width = 4;
        } else {
                nor->addr_width = 3;
        }
 
+       if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+               /* enable 4-byte addressing if the device exceeds 16MiB */
+               nor->addr_width = 4;
+       }
+
        if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
                dev_dbg(nor->dev, "address width is too large: %u\n",
                        nor->addr_width);
--

2.17.1

Reviewed-by Tested-by on v2 1/1
#2 lore raw
In reply to Bert Vermeulen
Quoted 8 lines · Bert Vermeulen

If a flash chip has more than 16MB capacity but its BFPT reports BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_set_addr_width() doesn't catch it because addr_width did get set. This fixes that check.

Signed-off-by Bert Vermeulen <[email protected]>

After replying to the other thread, I just saw this one.

Reviewed-by Joel Stanley <[email protected]>
Tested-by Joel Stanley <[email protected]>

Thanks Bert!

Cheers,

Joel

Quoted 30 lines
---
 drivers/mtd/spi-nor/core.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
drivers/mtd/spi-nor/core.c +5 -4
index 0369d98b2d12..a2c35ad9645c 100644
@@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
                /* already configured from SFDP */
        } else if (nor->info->addr_width) {
                nor->addr_width = nor->info->addr_width;
-       } else if (nor->mtd.size > 0x1000000) {
-               /* enable 4-byte addressing if the device exceeds 16MiB */
-               nor->addr_width = 4;
        } else {
                nor->addr_width = 3;
        }
 
+       if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+               /* enable 4-byte addressing if the device exceeds 16MiB */
+               nor->addr_width = 4;
+       }
+
        if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
                dev_dbg(nor->dev, "address width is too large: %u\n",
                        nor->addr_width);
--

2.17.1

Reviewed-by Tested-by
#3 lore raw
Quoted 8 lines · Joel Stanley
Quoted 7 lines · Bert Vermeulen

If a flash chip has more than 16MB capacity but its BFPT reports BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.

The check in spi_nor_set_addr_width() doesn't catch it because addr_width did get set. This fixes that check.

Quoted 8 lines
Quoted 1 line
Signed-off-by Bert Vermeulen <[email protected]>

After replying to the other thread, I just saw this one.

Reviewed-by Joel Stanley <[email protected]>
Tested-by Joel Stanley <[email protected]>

Thanks Bert!

Yes. I was starting to add bfpt-fixups for all chips we use on Aspeed based system.

Reviewed-by Cédric Le Goater <[email protected]>
Tested-by Cédric Le Goater <[email protected]>

Thanks,

C.

Quoted 34 lines

Cheers,

Joel

Quoted 30 lines
---
 drivers/mtd/spi-nor/core.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
drivers/mtd/spi-nor/core.c +5 -4
index 0369d98b2d12..a2c35ad9645c 100644
@@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
                /* already configured from SFDP */
        } else if (nor->info->addr_width) {
                nor->addr_width = nor->info->addr_width;
-       } else if (nor->mtd.size > 0x1000000) {
-               /* enable 4-byte addressing if the device exceeds 16MiB */
-               nor->addr_width = 4;
        } else {
                nor->addr_width = 3;
        }
 
+       if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+               /* enable 4-byte addressing if the device exceeds 16MiB */
+               nor->addr_width = 4;
+       }
+
        if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
                dev_dbg(nor->dev, "address width is too large: %u\n",
                        nor->addr_width);
--

2.17.1