Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz
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cover Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz
Hi Gregory,
the armada-37xx-cpufreq driver changes base CPU speed from 1000 MHz to 800 MHz on EspressoBIN and Turris MOX. The commit message in patch 2/3 explains why and how can this be discovered.
I have added the Fixes tag so that this is fixed in stable kernels.
Marek
Marek Behún (3):
arm64: dts: marvell: armada-37xx: fix syscon compatible to NB clk node
cpufreq: armada-37xx: Fix setting TBG parent for load levels
clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM
clock
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 3 +- drivers/clk/mvebu/armada-37xx-periph.c | 28 ---------------- drivers/cpufreq/armada-37xx-cpufreq.c | 35 +++++++++++++------- 3 files changed, 25 insertions(+), 41 deletions(-)
Signature · 7 lines
2.26.2 _______________________________________________ linux-arm-kernel mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 1/3 arm64: dts: marvell: armada-37xx: fix syscon compatible to NB clk node
Add "syscon" compatible to the North Bridge clocks node to allow the cpufreq driver to access these registers via syscon API.
This is needed for a fix of cpufreq driver.
--- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/marvell/armada-37xx.dtsi +2 -1
@@ -156,7 +156,8 @@ uart1: serial@12200 { }; nb_periph_clk: nb-periph-clk@13000 { - compatible = "marvell,armada-3700-periph-clock-nb"; + compatible = "marvell,armada-3700-periph-clock-nb", + "syscon"; reg = <0x13000 0x100>; clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>;
Signature · 7 lines
2.26.2 _______________________________________________ linux-arm-kernel mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Re: [PATCH mvebu 1/3] arm64: dts: marvell: armada-37xx: fix syscon compatible to NB clk node
On Wed, 7 Oct 2020 21:35:20 +0200
Marek Behún <[email protected]> wrote:
The subject was meant to be
add syscon compatible to NB clk node
instead of
fix syscon compatible to NB clk node
:(
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PATCH 2/3 cpufreq: armada-37xx: Fix setting TBG parent for load levels
In reply to Marek BehúnWith CPU frequency determining software [1] we have discovered that after this driver does one CPU frequency change, the base frequency of the CPU is set to the frequency of TBG-A-P clock, instead of the TBG that is parent to the CPU.
This can be reproduced on EspressoBIN and Turris MOX:
cd /sys/devices/system/cpu/cpufreq/policy0 echo powersave >scaling_governor
echo performance >scaling_governor
Running the mhz tool before this driver is loaded reports 1000 MHz, and after loading the driver and executing commands above the tool reports 800 MHz.
The change of TBG clock selector is supposed to happen in function armada37xx_cpufreq_dvfs_setup. Before the function returns, it does this:
parent = clk_get_parent(clk);
clk_set_parent(clk, parent);
The armada-37xx-periph clock driver has the .set_parent method implemented correctly for this, so if the method was actually called, this would work. But since the introduction of the common clock framework in commit b2476490ef11 ("clk: introduce the common clock..."), the clk_set_parent function checks whether the parent is actually changing, and if the requested new parent is same as the old parent (which is obviously the case for the code above), the .set_parent method is not called at all.
This patch fixes this issue by filling the correct TBG clock selector directly in the armada37xx_cpufreq_dvfs_setup during the filling of other registers at the same address. But the determination of CPU TBG index cannot be done via the common clock framework, therefore we need to access the North Bridge Peripheral Clock registers directly in this driver.
[1] https://github.com/wtarreau/mhz
--- drivers/cpufreq/armada-37xx-cpufreq.c | 35 ++++++++++++++++++--------- 1 file changed, 23 insertions(+), 12 deletions(-)
drivers/cpufreq/armada-37xx-cpufreq.c +23 -12
@@ -25,6 +25,10 @@#include "cpufreq-dt.h" +/* Clk register set */ +#define ARMADA_37XX_CLK_TBG_SEL 0 +#define ARMADA_37XX_CLK_TBG_SEL_CPU_OFF 22 +/* Power management in North Bridge register set */ #define ARMADA_37XX_NB_L0L1 0x18#define ARMADA_37XX_NB_L2L3 0x1C
@@ -120,10 +124,15 @@ static struct armada_37xx_dvfs *armada_37xx_cpu_freq_info_get(u32 freq)* will be configured then the DVFS will be enabled. */ static void __init armada37xx_cpufreq_dvfs_setup (struct regmap *base, -struct clk *clk,u8 *divider) +struct regmap *clk_base,u8 *divider) { +u32 cpu_tbg_sel;int load_lvl; -struct clk *parent; + +/* Determine to which TBG clock is CPU connected */ +regmap_read (clk_base,ARMADA_37XX_CLK_TBG_SEL , &cpu_tbg_sel); + cpu_tbg_sel >>=ARMADA_37XX_CLK_TBG_SEL_CPU_OFF ; + cpu_tbg_sel &=ARMADA_37XX_NB_TBG_SEL_MASK ;for (load_lvl =0 ; load_lvl <LOAD_LEVEL_NR ; load_lvl++) {unsigned int reg, mask, val, offset =0 ;
@@ -142,6 +151,11 @@ static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base, mask = (ARMADA_37XX_NB_CLK_SEL_MASK <<ARMADA_37XX_NB_CLK_SEL_OFF ); +/* Set TBG index, for all levels we use the same TBG */ + val = cpu_tbg_sel <<ARMADA_37XX_NB_TBG_SEL_OFF ; + mask = (ARMADA_37XX_NB_TBG_SEL_MASK + <<ARMADA_37XX_NB_TBG_SEL_OFF ); +/* * Set cpu divider based on the pre-computed array in * order to have balanced step.
@@ -160,14 +174,6 @@ static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base,regmap_update_bits (base, reg, mask, val); } - -/* -* Set cpu clock source, for all the level we keep the same -* clock source that the one already configured. For this one -* we need to use the clock framework -*/ - parent =clk_get_parent (clk); -clk_set_parent (clk, parent); }/*
@@ -358,11 +364,16 @@ static int __init armada37xx_cpufreq_driver_init(void)struct platform_device *pdev;unsigned long freq;unsigned int cur_frequency, base_frequency; -struct regmap *nb_pm_base, *avs_base; +struct regmap *nb_clk_base, *nb_pm_base, *avs_base;struct device *cpu_dev;int load_lvl, ret;struct clk *clk, *parent; + nb_clk_base = +syscon_regmap_lookup_by_compatible ("marvell,armada-3700-periph-clock-nb" ); +if (IS_ERR (nb_clk_base)) +return -ENODEV ; + nb_pm_base =syscon_regmap_lookup_by_compatible ("marvell,armada-3700-nb-pm" );
@@ -439,7 +450,7 @@ static int __init armada37xx_cpufreq_driver_init(void)armada37xx_cpufreq_avs_configure (avs_base, dvfs);armada37xx_cpufreq_avs_setup (avs_base, dvfs); -armada37xx_cpufreq_dvfs_setup (nb_pm_base, clk, dvfs->divider); +armada37xx_cpufreq_dvfs_setup (nb_pm_base, nb_clk_base, dvfs->divider);clk_put (clk); for (load_lvl = ARMADA_37XX_DVFS_LOAD_0; load_lvl < LOAD_LEVEL_NR;
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2.26.2 _______________________________________________ linux-arm-kernel mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 3/3 clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM clock
In reply to Marek BehúnRemove the .set_parent method in clk_pm_cpu_ops.
This method was supposed to be needed by the armada-37xx-cpufreq driver, but was never actually called due to wrong assumptions in the cpufreq driver. After this was fixed in the cpufreq driver, this method is not needed anymore.
--- drivers/clk/mvebu/armada-37xx-periph.c | 28 -------------------------- 1 file changed, 28 deletions(-)
drivers/clk/mvebu/armada-37xx-periph.c +0 -28
@@ -440,33 +440,6 @@ static u8 clk_pm_cpu_get_parent(struct clk_hw *hw)return val; } -static int clk_pm_cpu_set_parent (struct clk_hw *hw,u8 index) -{ -struct clk_pm_cpu *pm_cpu =to_clk_pm_cpu (hw); -struct regmap *base = pm_cpu->nb_pm_base; -int load_level; - -/* -* We set the clock parent only if the DVFS is available but -* not enabled. -*/ -if (IS_ERR (base) ||armada_3700_pm_dvfs_is_enabled (base)) -return -EINVAL ; - -/* Set the parent clock for all the load level */ -for (load_level =0 ; load_level <LOAD_LEVEL_NR ; load_level++) { -unsigned int reg, mask, val, - offset =ARMADA_37XX_NB_TBG_SEL_OFF ; - -armada_3700_pm_dvfs_update_regs (load_level, ®, &offset); - - val = index << offset; - mask =ARMADA_37XX_NB_TBG_SEL_MASK << offset; -regmap_update_bits (base, reg, mask, val); - } -return 0 ; -} -static unsigned long clk_pm_cpu_recalc_rate (struct clk_hw *hw,unsigned long parent_rate) {
@@ -592,7 +565,6 @@ static int clk_pm_cpu_set_rate(struct clk_hw *hw, unsigned long rate,static const struct clk_ops clk_pm_cpu_ops = { .get_parent = clk_pm_cpu_get_parent, - .set_parent = clk_pm_cpu_set_parent, .round_rate = clk_pm_cpu_round_rate, .set_rate = clk_pm_cpu_set_rate, .recalc_rate = clk_pm_cpu_recalc_rate,
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2.26.2 _______________________________________________ linux-arm-kernel mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Quoted 19 lines · On Wednesday 07 October 2020 21:35:19 Marek Behún wrote:
Hi Gregory,
the armada-37xx-cpufreq driver changes base CPU speed from 1000 MHz to 800 MHz on EspressoBIN and Turris MOX. The commit message in patch 2/3 explains why and how can this be discovered.
I have added the Fixes tag so that this is fixed in stable kernels.
Marek
Cc Gregory CLEMENT <[email protected]>Cc Miquel Raynal <[email protected]>Marek Behún (3):
arm64: dts: marvell: armada-37xx: fix syscon compatible to NB clk node
cpufreq: armada-37xx: Fix setting TBG parent for load levels
clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM
clock
Quoted 8 lines
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 3 +- drivers/clk/mvebu/armada-37xx-periph.c | 28 ---------------- drivers/cpufreq/armada-37xx-cpufreq.c | 35 +++++++++++++------- 3 files changed, 25 insertions(+), 41 deletions(-)Signature · 1 line
2.26.2
Hello! This patch series is causing kernel BUG and board reset after loading ondemand governor on Turris MOX with 5.9.0-rc8 kernel.
Here is log from serial console:
root@turris:/# echo ondemand > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor root@turris:/# [ 51.678502] ------------[ cut here ]------------ [ 51.680411] kernel BUG at arch/arm64/kernel/traps.c:470! [ 51.685876] Internal error: Oops - BUG: 0 [#1] SMP [ 51.690802] Modules linked in: ath9k ath9k_common ath9k_hw ath10k_pci ath10k_core ath rfcomm mwifiex_sdio mwifiex mac80211 hidp hci_uart cfg80211 btmrvl_sdio btmrvl bnep bluetooth hid [ 51.707652] CPU: 0 PID: 23 Comm: kworker/0:1 Not tainted 5.9.0-rc8-mox-00023-g31368bea463b-dirty #359 [ 51.717142] Hardware name: CZ.NIC Turris Mox Board (DT) [ 51.722533] Workqueue: 0x0 (events) [ 51.726195] pstate: 00000085 (nzcv daIf -PAN -UAO BTYPE=--) [ 51.731935] pc : do_undefinstr+0x2d8/0x2e8 [ 51.736138] lr : do_undefinstr+0x22c/0x2e8 [ 51.740349] sp : ffffffc011343b60 [ 51.743754] x29: ffffffc011343b60 x28: ffffff801f670000 [ 51.749218] x27: ffffff801f5a3300 x26: ffffff801f6704e0 [ 51.754684] x25: ffffff801f5a3300 x24: ffffffc010a6c028 [ 51.760150] x23: 0000000060000085 x22: ffffffc01007b000 [ 51.765616] x21: ffffffc011343d00 x20: 00000000b9403820 [ 51.771081] x19: ffffffc011343bc0 x18: 0000000000000000 [ 51.776547] x17: 0000000000000000 x16: 0000000000000000 [ 51.782012] x15: 0000000000000000 x14: 0000000000000000 [ 51.787478] x13: 0000000000000000 x12: 0000000000000000 [ 51.792943] x11: 0000000000000026 x10: 0101010101010101 [ 51.798410] x9 : ffffffc01018d094 x8 : 7f7f7f7f7f7f7f7f [ 51.803874] x7 : 0000000000000209 x6 : ffffffc011343bb0 [ 51.809340] x5 : 0000000000000000 x4 : ffffffc0111ab110 [ 51.814805] x3 : 00000000d5300000 x2 : ffffffc0110889a0 [ 51.820271] x1 : ffffffc0111ab110 x0 : 0000000060000085 [ 51.825737] Call trace: [ 51.828249] do_undefinstr+0x2d8/0x2e8 [ 51.832103] el1_sync_handler+0xb0/0x108 [ 51.836133] el1_sync+0x7c/0x100 [ 51.839450] pick_next_task_fair+0x1e0/0x360 [ 51.843843] __schedule+0x114/0x560 [ 51.847422] schedule+0x50/0xd8 [ 51.850650] worker_thread+0xe8/0x4e8 [ 51.854414] kthread+0x12c/0x130 [ 51.857728] ret_from_fork+0x10/0x18 [ 51.861407] Code: 12003c21 2a144034 17ffff99 a9025bf5 (d4210000) [ 51.867676] ---[ end trace 2384107ae1437c50 ]---
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Quoted 65 lines · On Thursday 08 October 2020 10:21:18 Pali Rohár wrote:
Quoted 19 lines · On Wednesday 07 October 2020 21:35:19 Marek Behún wrote:
Hi Gregory,
the armada-37xx-cpufreq driver changes base CPU speed from 1000 MHz to 800 MHz on EspressoBIN and Turris MOX. The commit message in patch 2/3 explains why and how can this be discovered.
I have added the Fixes tag so that this is fixed in stable kernels.
Marek
Cc Gregory CLEMENT <[email protected]>Cc Miquel Raynal <[email protected]>Marek Behún (3):
arm64: dts: marvell: armada-37xx: fix syscon compatible to NB clk node
cpufreq: armada-37xx: Fix setting TBG parent for load levels
clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM
clockQuoted 8 lines
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 3 +- drivers/clk/mvebu/armada-37xx-periph.c | 28 ---------------- drivers/cpufreq/armada-37xx-cpufreq.c | 35 +++++++++++++------- 3 files changed, 25 insertions(+), 41 deletions(-)Signature · 1 line
2.26.2Hello! This patch series is causing kernel BUG and board reset after loading ondemand governor on Turris MOX with 5.9.0-rc8 kernel.
Here is log from serial console:
root@turris:/# echo ondemand > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor root@turris:/# [ 51.678502] ------------[ cut here ]------------ [ 51.680411] kernel BUG at arch/arm64/kernel/traps.c:470! [ 51.685876] Internal error: Oops - BUG: 0 [#1] SMP [ 51.690802] Modules linked in: ath9k ath9k_common ath9k_hw ath10k_pci ath10k_core ath rfcomm mwifiex_sdio mwifiex mac80211 hidp hci_uart cfg80211 btmrvl_sdio btmrvl bnep bluetooth hid [ 51.707652] CPU: 0 PID: 23 Comm: kworker/0:1 Not tainted 5.9.0-rc8-mox-00023-g31368bea463b-dirty #359 [ 51.717142] Hardware name: CZ.NIC Turris Mox Board (DT) [ 51.722533] Workqueue: 0x0 (events) [ 51.726195] pstate: 00000085 (nzcv daIf -PAN -UAO BTYPE=--) [ 51.731935] pc : do_undefinstr+0x2d8/0x2e8 [ 51.736138] lr : do_undefinstr+0x22c/0x2e8 [ 51.740349] sp : ffffffc011343b60 [ 51.743754] x29: ffffffc011343b60 x28: ffffff801f670000 [ 51.749218] x27: ffffff801f5a3300 x26: ffffff801f6704e0 [ 51.754684] x25: ffffff801f5a3300 x24: ffffffc010a6c028 [ 51.760150] x23: 0000000060000085 x22: ffffffc01007b000 [ 51.765616] x21: ffffffc011343d00 x20: 00000000b9403820 [ 51.771081] x19: ffffffc011343bc0 x18: 0000000000000000 [ 51.776547] x17: 0000000000000000 x16: 0000000000000000 [ 51.782012] x15: 0000000000000000 x14: 0000000000000000 [ 51.787478] x13: 0000000000000000 x12: 0000000000000000 [ 51.792943] x11: 0000000000000026 x10: 0101010101010101 [ 51.798410] x9 : ffffffc01018d094 x8 : 7f7f7f7f7f7f7f7f [ 51.803874] x7 : 0000000000000209 x6 : ffffffc011343bb0 [ 51.809340] x5 : 0000000000000000 x4 : ffffffc0111ab110 [ 51.814805] x3 : 00000000d5300000 x2 : ffffffc0110889a0 [ 51.820271] x1 : ffffffc0111ab110 x0 : 0000000060000085 [ 51.825737] Call trace: [ 51.828249] do_undefinstr+0x2d8/0x2e8 [ 51.832103] el1_sync_handler+0xb0/0x108 [ 51.836133] el1_sync+0x7c/0x100
Quoted 8 lines
[ 51.839450] pick_next_task_fair+0x1e0/0x360 [ 51.843843] __schedule+0x114/0x560 [ 51.847422] schedule+0x50/0xd8 [ 51.850650] worker_thread+0xe8/0x4e8 [ 51.854414] kthread+0x12c/0x130 [ 51.857728] ret_from_fork+0x10/0x18 [ 51.861407] Code: 12003c21 2a144034 17ffff99 a9025bf5 (d4210000) [ 51.867676] ---[ end trace 2384107ae1437c50 ]---
Some more information:
When I choose userspace governor and I'm trying to switch from 200000 or 250000 directly to 1000000, it crashes too.
Also it crashes when I quickly switch from 200000 to 500000 and then immediately to 1000000.
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Quoted 75 lines · On Thursday 08 October 2020 10:56:01 Pali Rohár wrote:
Quoted 65 lines · On Thursday 08 October 2020 10:21:18 Pali Rohár wrote:
Quoted 19 lines · On Wednesday 07 October 2020 21:35:19 Marek Behún wrote:
Hi Gregory,
the armada-37xx-cpufreq driver changes base CPU speed from 1000 MHz to 800 MHz on EspressoBIN and Turris MOX. The commit message in patch 2/3 explains why and how can this be discovered.
I have added the Fixes tag so that this is fixed in stable kernels.
Marek
Cc Gregory CLEMENT <[email protected]>Cc Miquel Raynal <[email protected]>Marek Behún (3):
arm64: dts: marvell: armada-37xx: fix syscon compatible to NB clk node
cpufreq: armada-37xx: Fix setting TBG parent for load levels
clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM
clockQuoted 8 lines
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 3 +- drivers/clk/mvebu/armada-37xx-periph.c | 28 ---------------- drivers/cpufreq/armada-37xx-cpufreq.c | 35 +++++++++++++------- 3 files changed, 25 insertions(+), 41 deletions(-)Signature · 1 line
2.26.2Hello! This patch series is causing kernel BUG and board reset after loading ondemand governor on Turris MOX with 5.9.0-rc8 kernel.
Here is log from serial console:
root@turris:/# echo ondemand > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor root@turris:/# [ 51.678502] ------------[ cut here ]------------ [ 51.680411] kernel BUG at arch/arm64/kernel/traps.c:470! [ 51.685876] Internal error: Oops - BUG: 0 [#1] SMP [ 51.690802] Modules linked in: ath9k ath9k_common ath9k_hw ath10k_pci ath10k_core ath rfcomm mwifiex_sdio mwifiex mac80211 hidp hci_uart cfg80211 btmrvl_sdio btmrvl bnep bluetooth hid [ 51.707652] CPU: 0 PID: 23 Comm: kworker/0:1 Not tainted 5.9.0-rc8-mox-00023-g31368bea463b-dirty #359 [ 51.717142] Hardware name: CZ.NIC Turris Mox Board (DT) [ 51.722533] Workqueue: 0x0 (events) [ 51.726195] pstate: 00000085 (nzcv daIf -PAN -UAO BTYPE=--) [ 51.731935] pc : do_undefinstr+0x2d8/0x2e8 [ 51.736138] lr : do_undefinstr+0x22c/0x2e8 [ 51.740349] sp : ffffffc011343b60 [ 51.743754] x29: ffffffc011343b60 x28: ffffff801f670000 [ 51.749218] x27: ffffff801f5a3300 x26: ffffff801f6704e0 [ 51.754684] x25: ffffff801f5a3300 x24: ffffffc010a6c028 [ 51.760150] x23: 0000000060000085 x22: ffffffc01007b000 [ 51.765616] x21: ffffffc011343d00 x20: 00000000b9403820 [ 51.771081] x19: ffffffc011343bc0 x18: 0000000000000000 [ 51.776547] x17: 0000000000000000 x16: 0000000000000000 [ 51.782012] x15: 0000000000000000 x14: 0000000000000000 [ 51.787478] x13: 0000000000000000 x12: 0000000000000000 [ 51.792943] x11: 0000000000000026 x10: 0101010101010101 [ 51.798410] x9 : ffffffc01018d094 x8 : 7f7f7f7f7f7f7f7f [ 51.803874] x7 : 0000000000000209 x6 : ffffffc011343bb0 [ 51.809340] x5 : 0000000000000000 x4 : ffffffc0111ab110 [ 51.814805] x3 : 00000000d5300000 x2 : ffffffc0110889a0 [ 51.820271] x1 : ffffffc0111ab110 x0 : 0000000060000085 [ 51.825737] Call trace: [ 51.828249] do_undefinstr+0x2d8/0x2e8 [ 51.832103] el1_sync_handler+0xb0/0x108 [ 51.836133] el1_sync+0x7c/0x100Quoted 8 lines
[ 51.839450] pick_next_task_fair+0x1e0/0x360 [ 51.843843] __schedule+0x114/0x560 [ 51.847422] schedule+0x50/0xd8 [ 51.850650] worker_thread+0xe8/0x4e8 [ 51.854414] kthread+0x12c/0x130 [ 51.857728] ret_from_fork+0x10/0x18 [ 51.861407] Code: 12003c21 2a144034 17ffff99 a9025bf5 (d4210000) [ 51.867676] ---[ end trace 2384107ae1437c50 ]---
Quoted 7 lines
Some more information:
When I choose userspace governor and I'm trying to switch from 200000 or 250000 directly to 1000000, it crashes too.
Also it crashes when I quickly switch from 200000 to 500000 and then immediately to 1000000.
After investigation we found out that problem is switching CPU to 1GHz. Seems that CPU needs to be at 500MHz for some time before it is switched to 1GHz. Marek is preparing new patches to address this issue.
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