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pinctrl: intel: Add Intel Alder Lake pin controller support

PATCH Superseded Andy Shevchenko 2 participants 3 messages Oct 26, 2020 – Oct 29, 2020

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v1 of 2 Superseded Latest is v2 →

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#0 lore raw

PATCH 1/1 pinctrl: intel: Add Intel Alder Lake pin controller support

This driver adds pinctrl/GPIO support for Intel Alder Lake SoC. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel core pinctrl/GPIO driver.

---
 drivers/pinctrl/intel/Kconfig             |   9 +
 drivers/pinctrl/intel/Makefile            |   1 +
 drivers/pinctrl/intel/pinctrl-alderlake.c | 437 ++++++++++++++++++++++
 3 files changed, 447 insertions(+)
 create mode 100644 drivers/pinctrl/intel/pinctrl-alderlake.c
drivers/pinctrl/intel/Kconfig +9 -0
index b9d78a4187e0..98494c8fdaf8 100644
@@ -70,6 +70,14 @@ config PINCTRL_INTEL
 	select GPIOLIB
 	select GPIOLIB_IRQCHIP
 
+config PINCTRL_ALDERLAKE
+	tristate "Intel Alder Lake pinctrl and GPIO driver"
+	depends on ACPI
+	select PINCTRL_INTEL
+	help
+	  This pinctrl driver provides an interface that allows configuring
+	  of Intel Alder Lake PCH pins and using them as GPIOs.
+
 config PINCTRL_BROXTON
 	tristate "Intel Broxton pinctrl and GPIO driver"
 	depends on ACPI
@@ -158,4 +166,5 @@ config PINCTRL_TIGERLAKE
 	help
 	  This pinctrl driver provides an interface that allows configuring
 	  of Intel Tiger Lake PCH pins and using them as GPIOs.
+
 endif
drivers/pinctrl/intel/Makefile +1 -0
index a726dd7e6c6f..0510e62475ab 100644
@@ -9,6 +9,7 @@ obj-$(CONFIG_PINCTRL_LYNXPOINT)		+= pinctrl-lynxpoint.o
 obj-$(CONFIG_PINCTRL_MERRIFIELD)	+= pinctrl-merrifield.o
 obj-$(CONFIG_PINCTRL_MOOREFIELD)	+= pinctrl-moorefield.o
 obj-$(CONFIG_PINCTRL_INTEL)		+= pinctrl-intel.o
+obj-$(CONFIG_PINCTRL_ALDERLAKE)		+= pinctrl-alderlake.o
 obj-$(CONFIG_PINCTRL_BROXTON)		+= pinctrl-broxton.o
 obj-$(CONFIG_PINCTRL_CANNONLAKE)	+= pinctrl-cannonlake.o
 obj-$(CONFIG_PINCTRL_CEDARFORK)		+= pinctrl-cedarfork.o
drivers/pinctrl/intel/pinctrl-alderlake.c new file +437 -0

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Signature · 1 line
2.28.0
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#1 lore raw

Hi,

I think the $subject should say "Alder Lake-S" as this is for -S variant.

Quoted 32 lines · Andy Shevchenko

This driver adds pinctrl/GPIO support for Intel Alder Lake SoC. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel core pinctrl/GPIO driver.

---
 drivers/pinctrl/intel/Kconfig             |   9 +
 drivers/pinctrl/intel/Makefile            |   1 +
 drivers/pinctrl/intel/pinctrl-alderlake.c | 437 ++++++++++++++++++++++
 3 files changed, 447 insertions(+)
 create mode 100644 drivers/pinctrl/intel/pinctrl-alderlake.c
drivers/pinctrl/intel/Kconfig +8 -0
index b9d78a4187e0..98494c8fdaf8 100644
@@ -70,6 +70,14 @@ config PINCTRL_INTEL
 	select GPIOLIB
 	select GPIOLIB_IRQCHIP
 
+config PINCTRL_ALDERLAKE
+	tristate "Intel Alder Lake pinctrl and GPIO driver"
+	depends on ACPI
+	select PINCTRL_INTEL
+	help
+	  This pinctrl driver provides an interface that allows configuring
+	  of Intel Alder Lake PCH pins and using them as GPIOs.
+
 config PINCTRL_BROXTON
 	tristate "Intel Broxton pinctrl and GPIO driver"
 	depends on ACPI

drivers/pinctrl/intel/Kconfig config PINCTRL_TIGERLAKE · line 169

Quoted 4 lines
drivers/pinctrl/intel/Kconfig +1 -0
@@ -158,4 +166,5 @@ config PINCTRL_TIGERLAKE
 	help
 	  This pinctrl driver provides an interface that allows configuring
 	  of Intel Tiger Lake PCH pins and using them as GPIOs.
+

Is this intentional ws change?

drivers/pinctrl/intel/Kconfig config PINCTRL_TIGERLAKE · line 170

Quoted 1 line
drivers/pinctrl/intel/Kconfig +0 -0
 endif

Otherwise looks good to me.

#2 lore raw
Quoted 2 lines · Mika Westerberg

I think the $subject should say "Alder Lake-S" as this is for -S variant.

OK!

...

Quoted 7 lines

drivers/pinctrl/intel/Kconfig config PINCTRL_TIGERLAKE · line 169

Quoted 5 lines
drivers/pinctrl/intel/Kconfig +1 -0
@@ -158,4 +166,5 @@ config PINCTRL_TIGERLAKE
 	help
 	  This pinctrl driver provides an interface that allows configuring
 	  of Intel Tiger Lake PCH pins and using them as GPIOs.
+

Is this intentional ws change?

I guess it was intentional at some point, but not strictly related to this new driver. I can split it out.

Quoted 3 lines

Review config PINCTRL_TIGERLAKE · line 170

Quoted 1 line
(quoted diff) +0 -0
 endif

Otherwise looks good to me.

I'll send v2 soon.

Signature · 2 lines
With Best Regards,
Andy Shevchenko