dt-bindings: pinctrl: qcom: Add SDX55 pinctrl bindings
Subsystems (6)
PATCH v2 1/2 dt-bindings: pinctrl: qcom: Add SDX55 pinctrl bindings
Add device tree binding Documentation details for Qualcomm SDX55 pinctrl driver.
--- .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 145 ++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml new file +145 -0
@@ -0,0 +1,145 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,sdx55-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. SDX55 TLMM block + +maintainers: + - Vinod Koul <[email protected]> + +description: | + This binding describes the Top Level Mode Multiplexer block found in the + SDX55 platform. + +properties: + compatible: + const: qcom,sdx55-pinctrl + + reg: + maxItems: 1 + + interrupts: + description: Specifies the TLMM summary IRQ + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: + Specifies the PIN numbers and Flags, as defined in defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + + wakeup-parent: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: "/schemas/pinctrl/pincfg-node.yaml" + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this subnode. + items: + oneOf: + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$" + - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ] + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specified + pins. Functions are only valid for gpio pins. + enum: [ adsp_ext, atest, audio_ref, bimc_dte0, bimc_dte1, blsp_i2c1, + blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_spi1, blsp_spi2, + blsp_spi3, blsp_spi4, blsp_uart1, blsp_uart2, blsp_uart3, + blsp_uart4, char_exec, coex_uart, coex_uart2, cri_trng, + cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, + ebi0_wrcdc, ebi2_a, ebi2_lcd, emac_gcc0, emac_gcc1, + emac_pps0, emac_pps1, ext_dbg, gcc_gp1, gcc_gp2, gcc_gp3, + gcc_plltest, gpio, i2s_mclk, jitter_bist, ldo_en, ldo_update, + mgpi_clk, m_voc, native_char, native_char0, native_char1, + native_char2, native_char3, native_tsens, native_tsense, + nav_gpio, pa_indicator, pcie_clkreq, pci_e, pll_bist, pll_ref, + pll_test, pri_mi2s, prng_rosc, qdss_cti, qdss_gpio, + qdss_gpio0, qdss_gpio1, qdss_gpio2, qdss_gpio3, qdss_gpio4, + qdss_gpio5, qdss_gpio6, qdss_gpio7, qdss_gpio8, qdss_gpio9, + qdss_gpio10, qdss_gpio11, qdss_gpio12, qdss_gpio13, + qdss_gpio14, qdss_gpio15, qdss_stm0, qdss_stm1, qdss_stm2, + qdss_stm3, qdss_stm4, qdss_stm5, qdss_stm6, qdss_stm7, + qdss_stm8, qdss_stm9, qdss_stm10, qdss_stm11, qdss_stm12, + qdss_stm13, qdss_stm14, qdss_stm15, qdss_stm16, qdss_stm17, + qdss_stm18, qdss_stm19, qdss_stm20, qdss_stm21, qdss_stm22, + qdss_stm23, qdss_stm24, qdss_stm25, qdss_stm26, qdss_stm27, + qdss_stm28, qdss_stm29, qdss_stm30, qdss_stm31, qlink0_en, + qlink0_req, qlink0_wmss, qlink1_en, qlink1_req, qlink1_wmss, + spmi_coex, sec_mi2s, spmi_vgi, tgu_ch0, uim1_clk, uim1_data, + uim1_present, uim1_reset, uim2_clk, uim2_data, uim2_present, + uim2_reset, usb2phy_ac, vsense_trigger ] + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@1f00000 { + compatible = "qcom,sdx55-pinctrl"; + reg = <0x0f100000 0x300000>; + interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + interrupt-controller; + gpio-controller; + #gpio-cells = <2>; + }; + +...
Signature · 1 line
2.26.2
PATCH v2 2/2 pinctrl: qcom: Add SDX55 pincontrol driver
From: Jeevan Shriram <[email protected]>
Add initial Qualcomm SDX55 pinctrl driver to support pin configuration with pinctrl framewor for SDX55 SoC.
--- drivers/pinctrl/qcom/Kconfig | 9 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-sdx55.c | 1018 ++++++++++++++++++++++++++ 3 files changed, 1028 insertions(+) create mode 100644 drivers/pinctrl/qcom/pinctrl-sdx55.c
drivers/pinctrl/qcom/Kconfig +9 -0
@@ -218,6 +218,15 @@ config PINCTRL_SDM845 Qualcomm Technologies Inc TLMM block found on the Qualcomm Technologies Inc SDM845 platform. +config PINCTRL_SDX55 + tristate "Qualcomm Technologies Inc SDX55 pin controller driver" + depends on GPIOLIB && OF + select PINCTRL_MSM + help + This is the pinctrl, pinmux, pinconf and gpiolib driver for the + Qualcomm Technologies Inc TLMM block found on the Qualcomm + Technologies Inc SDX55 platform. + config PINCTRL_SM8150 tristate "Qualcomm Technologies Inc SM8150 pin controller driver" depends on GPIOLIB && OF
drivers/pinctrl/qcom/Makefile +1 -0
@@ -26,5 +26,6 @@ obj-$(CONFIG_PINCTRL_QCOM_SSBI_PMIC) += pinctrl-ssbi-mpp.o obj-$(CONFIG_PINCTRL_SC7180) += pinctrl-sc7180.o obj-$(CONFIG_PINCTRL_SDM660) += pinctrl-sdm660.o obj-$(CONFIG_PINCTRL_SDM845) += pinctrl-sdm845.o +obj-$(CONFIG_PINCTRL_SDX55) += pinctrl-sdx55.o obj-$(CONFIG_PINCTRL_SM8150) += pinctrl-sm8150.o obj-$(CONFIG_PINCTRL_SM8250) += pinctrl-sm8250.o
drivers/pinctrl/qcom/pinctrl-sdx55.c new file +1018 -0
1,018 lines not on this page · raw message
Signature · 1 line
2.26.2
Re: [PATCH v2 2/2] pinctrl: qcom: Add SDX55 pincontrol driver
Quoted 9 lines · Vinod Koul
From: Jeevan Shriram <[email protected]>
Add initial Qualcomm SDX55 pinctrl driver to support pin configuration with pinctrl framewor for SDX55 SoC.
Signed-off-by Jeevan Shriram <[email protected]>[ported from downstream and tidy up]Signed-off-by Vinod Koul <[email protected]>---
No changes since v1? ;)
Quoted 5 lines
drivers/pinctrl/qcom/Kconfig | 9 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-sdx55.c | 1018 ++++++++++++++++++++++++++ 3 files changed, 1028 insertions(+) create mode 100644 drivers/pinctrl/qcom/pinctrl-sdx55.c
[..]
Quoted 1 line
drivers/pinctrl/qcom/pinctrl-sdx55.c +0
-0
[..]
Quoted 104 lines
drivers/pinctrl/qcom/pinctrl-sdx55.c +104
-0+static const struct msm_pingroup sdx55_groups[] = { + [0 ] =PINGROUP (0 , uim2_data, blsp_uart1, qdss_stm, ebi0_wrcdc, _, _, _, _, _), + [1 ] =PINGROUP (1 , uim2_present, blsp_uart1, qdss_stm, _, _, _, _, _, _), + [2 ] =PINGROUP (2 , uim2_reset, blsp_uart1, blsp_i2c1, qdss_stm, ebi0_wrcdc, _, _, _, _), + [3 ] =PINGROUP (3 , uim2_clk, blsp_uart1, blsp_i2c1, qdss_stm, _, _, _, _, _), + [4 ] =PINGROUP (4 , blsp_spi2, blsp_uart2, _, qdss_stm, qdss_gpio, _, _, _, _), + [5 ] =PINGROUP (5 , blsp_spi2, blsp_uart2, _, qdss_stm, qdss_gpio, _, _, _, _), + [6 ] =PINGROUP (6 , blsp_spi2, blsp_uart2, blsp_i2c2, char_exec, _, qdss_stm, qdss_gpio, _, _), + [7 ] =PINGROUP (7 , blsp_spi2, blsp_uart2, blsp_i2c2, char_exec, _, qdss_stm, qdss_gpio, _, _), + [8 ] =PINGROUP (8 , pri_mi2s, blsp_spi3, blsp_uart3, ext_dbg, ldo_en, _, _, _, _), + [9 ] =PINGROUP (9 , pri_mi2s, blsp_spi3, blsp_uart3, ext_dbg, _, _, _, _, _), + [10 ] =PINGROUP (10 , pri_mi2s, blsp_spi3, blsp_uart3, blsp_i2c3, ext_dbg, _, _, _, _), + [11 ] =PINGROUP (11 , pri_mi2s, blsp_spi3, blsp_uart3, blsp_i2c3, ext_dbg, gcc_gp3, _, _, _), + [12 ] =PINGROUP (12 , pri_mi2s, _, qdss_stm, qdss_gpio, _, _, _, _, _), + [13 ] =PINGROUP (13 , pri_mi2s, _, qdss_stm, qdss_gpio, _, _, _, _, _), + [14 ] =PINGROUP (14 , pri_mi2s, emac_gcc1, _, _, qdss_stm, qdss_gpio, bimc_dte0, native_tsens, vsense_trigger), + [15 ] =PINGROUP (15 , pri_mi2s, emac_gcc0, _, _, qdss_stm, qdss_gpio, bimc_dte1, _, _), + [16 ] =PINGROUP (16 , sec_mi2s, blsp_spi4, blsp_uart4, qdss_cti, qdss_cti, _, _, qdss_stm, qdss_gpio), + [17 ] =PINGROUP (17 , sec_mi2s, blsp_spi4, blsp_uart4, qdss_cti, qdss_cti, _, qdss_stm, qdss_gpio, _), + [18 ] =PINGROUP (18 , sec_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, gcc_gp1, qdss_stm, qdss_gpio, _, _), + [19 ] =PINGROUP (19 , sec_mi2s, blsp_spi4, blsp_uart4, blsp_i2c4, jitter_bist, gcc_gp2, _, qdss_stm, qdss_gpio), + [20 ] =PINGROUP (20 , sec_mi2s, ebi2_a, blsp_uart1, blsp_uart4, qdss_stm, _, _, _, _), + [21 ] =PINGROUP (21 , sec_mi2s, ebi2_lcd, blsp_uart1, blsp_uart4, _, qdss_stm, _, _, _), + [22 ] =PINGROUP (22 , sec_mi2s, ebi2_lcd, blsp_uart1, qdss_cti, qdss_cti, blsp_uart4, pll_bist, _, qdss_stm), + [23 ] =PINGROUP (23 , sec_mi2s, ebi2_lcd, qdss_cti, qdss_cti, blsp_uart1, blsp_uart4, qdss_stm, _, _), + [24 ] =PINGROUP (24 , adsp_ext, _, _, _, _, _, _, _, _), + [25 ] =PINGROUP (25 , adsp_ext, _, _, _, _, _, _, _, _), + [26 ] =PINGROUP (26 , _, _, _, native_char, _, _, _, _, _), + [27 ] =PINGROUP (27 , _, _, _, _, _, _, _, _, _), + [28 ] =PINGROUP (28 , qlink0_wmss, _, native_char3, _, _, _, _, _, _), + [29 ] =PINGROUP (29 , _, _, _, native_char2, native_tsense, _, _, _, _), + [30 ] =PINGROUP (30 , _, _, _, _, _, _, _, _, _), + [31 ] =PINGROUP (31 , nav_gpio, _, _, _, _, _, _, _, _), + [32 ] =PINGROUP (32 , nav_gpio, pll_ref, _, _, _, _, _, _, _), + [33 ] =PINGROUP (33 , _, pa_indicator, native_char0, _, _, _, _, _, _), + [34 ] =PINGROUP (34 , qlink0_en, _, _, _, _, _, _, _, _), + [35 ] =PINGROUP (35 , qlink0_req, pll_test, _, _, _, _, _, _, _), + [36 ] =PINGROUP (36 , _, _, cri_trng, dbg_out, _, _, _, _, _), + [37 ] =PINGROUP (37 , _, _, _, _, _, _, _, _, _), + [38 ] =PINGROUP (38 , _, _, prng_rosc, _, _, _, _, _, _), + [39 ] =PINGROUP (39 , _, _, _, _, _, _, _, _, _), + [40 ] =PINGROUP (40 , _, _, cri_trng0, _, _, _, _, _, _), + [41 ] =PINGROUP (41 , _, _, cri_trng1, _, _, _, _, _, _), + [42 ] =PINGROUP (42 , _, qdss_gpio, native_char1, _, _, _, _, _, _), + [43 ] =PINGROUP (43 , _, _, _, _, _, _, _, _, _), + [44 ] =PINGROUP (44 , coex_uart, spmi_coex, _, qdss_stm, _, _, _, _, _), + [45 ] =PINGROUP (45 , coex_uart, spmi_coex, qdss_stm, ddr_pxi0, _, _, _, _, _), + [46 ] =PINGROUP (46 , m_voc, ddr_bist, ddr_pxi0, _, _, _, _, _, _), + [47 ] =PINGROUP (47 , ddr_bist, _, _, _, _, _, _, _, _), + [48 ] =PINGROUP (48 , m_voc, ddr_bist, _, _, _, _, _, _, _), + [49 ] =PINGROUP (49 , m_voc, ddr_bist, _, _, _, _, _, _, _), + [50 ] =PINGROUP (50 , _, _, _, _, _, _, _, _, _), + [51 ] =PINGROUP (51 , _, _, _, _, _, _, _, _, _), + [52 ] =PINGROUP (52 , blsp_spi2, blsp_spi1, blsp_spi3, blsp_spi4, _, _, qdss_stm, _, _), + [53 ] =PINGROUP (53 , pci_e, _, _, qdss_stm, _, _, _, _, _), + [54 ] =PINGROUP (54 , qdss_cti, qdss_cti, _, _, _, _, _, _, _), + [55 ] =PINGROUP (55 , qdss_cti, qdss_cti, tgu_ch0, _, _, _, _, _, _), + [56 ] =PINGROUP (56 , pcie_clkreq, _, qdss_stm, _, _, _, _, _, _), + [57 ] =PINGROUP (57 , _, qdss_stm, _, _, _, _, _, _, _), + [58 ] =PINGROUP (58 , _, _, _, _, _, _, _, _, _), + [59 ] =PINGROUP (59 , qdss_cti, m_voc, bimc_dte0, _, _, _, _, _, _), + [60 ] =PINGROUP (60 , qdss_cti, _, m_voc, _, _, _, _, _, _), + [61 ] =PINGROUP (61 , mgpi_clk, qdss_stm, qdss_gpio, bimc_dte1, _, _, _, _, _), + [62 ] =PINGROUP (62 , i2s_mclk, audio_ref, blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4, ldo_update, qdss_stm, _), + [63 ] =PINGROUP (63 , blsp_uart2, _, qdss_stm, qdss_gpio, atest, _, _, _, _), + [64 ] =PINGROUP (64 , blsp_uart2, qdss_stm, qdss_gpio, atest, _, _, _, _, _), + [65 ] =PINGROUP (65 , blsp_uart2, blsp_i2c2, _, qdss_stm, qdss_gpio, atest, _, _, _), + [66 ] =PINGROUP (66 , blsp_uart2, blsp_i2c2, qdss_stm, qdss_gpio, atest, _, _, _, _), + [67 ] =PINGROUP (67 , uim1_data, atest, _, _, _, _, _, _, _), + [68 ] =PINGROUP (68 , uim1_present, _, _, _, _, _, _, _, _), + [69 ] =PINGROUP (69 , uim1_reset, _, _, _, _, _, _, _, _), + [70 ] =PINGROUP (70 , uim1_clk, _, _, _, _, _, _, _, _), + [71 ] =PINGROUP (71 , mgpi_clk, blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4, _, _, _, _), + [72 ] =PINGROUP (72 , qlink1_en, _, _, _, _, _, _, _, _), + [73 ] =PINGROUP (73 , qlink1_req, _, _, _, _, _, _, _, _), + [74 ] =PINGROUP (74 , qlink1_wmss, _, _, _, _, _, _, _, _), + [75 ] =PINGROUP (75 , coex_uart2, _, _, _, _, _, _, _, _), + [76 ] =PINGROUP (76 , coex_uart2, nav_gpio, _, _, _, _, _, _, _), + [77 ] =PINGROUP (77 , _, _, _, _, _, _, _, _, _), + [78 ] =PINGROUP (78 , spmi_vgi, blsp_i2c4, _, _, _, _, _, _, _), + [79 ] =PINGROUP (79 , spmi_vgi, blsp_i2c4, _, _, _, _, _, _, _), + [80 ] =PINGROUP (80 , _, blsp_spi1, _, _, _, _, _, _, _), + [81 ] =PINGROUP (81 , _, blsp_spi1, _, gcc_plltest, _, _, _, _, _), + [82 ] =PINGROUP (82 , _, blsp_spi1, _, blsp_i2c1, gcc_plltest, _, _, _, _), + [83 ] =PINGROUP (83 , _, blsp_spi1, _, blsp_i2c1, _, _, _, _, _), + [84 ] =PINGROUP (84 , _, _, _, _, _, _, _, _, _), + [85 ] =PINGROUP (85 , _, _, _, _, _, _, _, _, _), + [86 ] =PINGROUP (86 , _, _, _, _, _, _, _, _, _), + [87 ] =PINGROUP (87 , _, _, _, _, _, _, _, _, _), + [88 ] =PINGROUP (88 , _, _, _, _, _, _, _, _, _), + [89 ] =PINGROUP (89 , _, _, _, _, _, _, _, _, _), + [90 ] =PINGROUP (90 , _, _, _, _, _, _, _, _, _), + [91 ] =PINGROUP (91 , _, _, _, _, _, _, _, _, _), + [92 ] =PINGROUP (92 , _, _, _, _, _, _, _, _, _), + [93 ] =PINGROUP (93 , _, _, usb2phy_ac, _, _, _, _, _, _), + [94 ] =PINGROUP (94 , qdss_cti, qdss_cti, _, _, _, _, _, _, _), + [95 ] =PINGROUP (95 , qdss_cti, qdss_cti, emac_pps1, _, _, _, _, _, _), + [96 ] =PINGROUP (96 , _, _, _, _, _, _, _, _, _), + [97 ] =PINGROUP (97 , _, _, _, _, _, _, _, _, _), + [98 ] =PINGROUP (98 , _, _, _, _, _, _, _, _, _), + [99 ] =PINGROUP (99 , _, _, _, _, _, _, _, _, _), + [100 ] =PINGROUP (100 , _, _, _, _, _, _, _, _, _), + [101 ] =PINGROUP (101 , _, _, _, _, _, _, _, _, _), + [102 ] =PINGROUP (102 , _, _, _, _, _, _, _, _, _),
drivers/pinctrl/qcom/pinctrl-sdx55.c line 973
Quoted 10 lines
drivers/pinctrl/qcom/pinctrl-sdx55.c +10
-0+ [103] = PINGROUP(103, _, _, _, _, _, _, _, _, _), + [104] = PINGROUP(104, _, _, _, _, _, _, _, _, _), + [105] = PINGROUP(105, _, _, _, _, _, _, _, _, _), + [106] = PINGROUP(106, emac_pps0, _, _, _, _, _, _, _, _), + [107] = PINGROUP(107, _, _, _, _, _, _, _, _, _), + [109] = SDC_PINGROUP(sdc1_rclk, 0x9a000, 15, 0), + [110] = SDC_PINGROUP(sdc1_clk, 0x9a000, 13, 6), + [111] = SDC_PINGROUP(sdc1_cmd, 0x9a000, 11, 3), + [112] = SDC_PINGROUP(sdc1_data, 0x9a000, 9, 0), +};
Looks better, and ngpios is good.
Thanks,
Bjorn
Re: [PATCH v2 2/2] pinctrl: qcom: Add SDX55 pincontrol driver
In reply to Vinod KoulQuoted 8 lines · Vinod Koul
From: Jeevan Shriram <[email protected]>
Add initial Qualcomm SDX55 pinctrl driver to support pin configuration with pinctrl framewor for SDX55 SoC.
Signed-off-by Jeevan Shriram <[email protected]>[ported from downstream and tidy up]Signed-off-by Vinod Koul <[email protected]>
The v2 version looks nice, but Rob's bot is complaining about the YAML bindings?
Please look into it when you have time, apart from this the patch set seems complete, include Bjorn's ACKs on reposts please.
Yours,
Linus Walleij
Re: [PATCH v2 2/2] pinctrl: qcom: Add SDX55 pincontrol driver
Quoted 11 lines · Linus Walleij
Quoted 8 lines · Vinod Koul
From: Jeevan Shriram <[email protected]>
Add initial Qualcomm SDX55 pinctrl driver to support pin configuration with pinctrl framewor for SDX55 SoC.
Signed-off-by Jeevan Shriram <[email protected]>[ported from downstream and tidy up]Signed-off-by Vinod Koul <[email protected]>
Quoted 5 lines
The v2 version looks nice, but Rob's bot is complaining about the YAML bindings?
Please look into it when you have time, apart from this the patch set seems complete, include Bjorn's ACKs on reposts please.
Thanks will do, looks like I need to update the tool version I have. Will post v3 and include changes in each version (somehow missed this time)
Signature · 1 line
~Vinod
Quoted 147 lines · Vinod Koul
Add device tree binding Documentation details for Qualcomm SDX55 pinctrl driver.
Signed-off-by Vinod Koul <[email protected]>--- .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 145 ++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yamlDocumentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml new file +132
-0@@ -0,0 +1,145 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,sdx55-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. SDX55 TLMM block + +maintainers: + - Vinod Koul <[email protected]> + +description: | + This binding describes the Top Level Mode Multiplexer block found in the + SDX55 platform. + +properties: + compatible: + const: qcom,sdx55-pinctrl + + reg: + maxItems: 1 + + interrupts: + description: Specifies the TLMM summary IRQ + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: + Specifies the PIN numbers and Flags, as defined in defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + + wakeup-parent: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: "/schemas/pinctrl/pincfg-node.yaml" + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this subnode. + items: + oneOf: + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$" + - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ] + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specified + pins. Functions are only valid for gpio pins. + enum: [ adsp_ext, atest, audio_ref, bimc_dte0, bimc_dte1, blsp_i2c1, + blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_spi1, blsp_spi2, + blsp_spi3, blsp_spi4, blsp_uart1, blsp_uart2, blsp_uart3, + blsp_uart4, char_exec, coex_uart, coex_uart2, cri_trng, + cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, + ebi0_wrcdc, ebi2_a, ebi2_lcd, emac_gcc0, emac_gcc1, + emac_pps0, emac_pps1, ext_dbg, gcc_gp1, gcc_gp2, gcc_gp3, + gcc_plltest, gpio, i2s_mclk, jitter_bist, ldo_en, ldo_update, + mgpi_clk, m_voc, native_char, native_char0, native_char1, + native_char2, native_char3, native_tsens, native_tsense, + nav_gpio, pa_indicator, pcie_clkreq, pci_e, pll_bist, pll_ref, + pll_test, pri_mi2s, prng_rosc, qdss_cti, qdss_gpio, + qdss_gpio0, qdss_gpio1, qdss_gpio2, qdss_gpio3, qdss_gpio4, + qdss_gpio5, qdss_gpio6, qdss_gpio7, qdss_gpio8, qdss_gpio9, + qdss_gpio10, qdss_gpio11, qdss_gpio12, qdss_gpio13, + qdss_gpio14, qdss_gpio15, qdss_stm0, qdss_stm1, qdss_stm2, + qdss_stm3, qdss_stm4, qdss_stm5, qdss_stm6, qdss_stm7, + qdss_stm8, qdss_stm9, qdss_stm10, qdss_stm11, qdss_stm12, + qdss_stm13, qdss_stm14, qdss_stm15, qdss_stm16, qdss_stm17, + qdss_stm18, qdss_stm19, qdss_stm20, qdss_stm21, qdss_stm22, + qdss_stm23, qdss_stm24, qdss_stm25, qdss_stm26, qdss_stm27, + qdss_stm28, qdss_stm29, qdss_stm30, qdss_stm31, qlink0_en, + qlink0_req, qlink0_wmss, qlink1_en, qlink1_req, qlink1_wmss, + spmi_coex, sec_mi2s, spmi_vgi, tgu_ch0, uim1_clk, uim1_data, + uim1_present, uim1_reset, uim2_clk, uim2_data, uim2_present, + uim2_reset, usb2phy_ac, vsense_trigger ] + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + +additionalProperties: false + +examples:
Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml line 142
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml new file +10
-0+ - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + pinctrl@1f00000 { + compatible = "qcom,sdx55-pinctrl"; + reg = <0x0f100000 0x300000>; + interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + interrupt-controller; + gpio-controller; + #gpio-cells = <2>;
Isn't gpio-ranges a required property? Perhaps that's only a functional requirement for the hogs to work?
Regards,
Bjorn
Quoted 6 lines
Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml new file +3
-0+ }; + +...Signature · 1 line
2.26.2
Rob Herring
maintainerQuoted 9 lines · Vinod Koul
Add device tree binding Documentation details for Qualcomm SDX55 pinctrl driver.
Signed-off-by Vinod Koul <[email protected]>--- .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 145 ++++++++++++++++++ 1 file changed, 145 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties:required: ['pins', 'function'] is not of type 'object', 'boolean'
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties:function: Additional properties are not allowed ('bias-pull-down', 'output-low', 'output-high', 'bias-disable', 'drive-strength', 'bias-pull-up' were unexpected)
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties:function: 'drive-strength' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize', 'unevaluatedProperties', 'uniqueItems'] /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties:function: 'bias-pull-down' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize', 'unevaluatedProperties', 'uniqueItems'] /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties:function: 'bias-pull-up' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize', 'unevaluatedProperties', 'uniqueItems'] /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties:function: 'bias-disable' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize', 'unevaluatedProperties', 'uniqueItems'] /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties:function: 'output-high' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize', 'unevaluatedProperties', 'uniqueItems'] /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties:function: 'output-low' is not one of ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'exclusiveMaximum', 'exclusiveMinimum', 'items', 'if', 'minItems', 'minimum', 'maxItems', 'maximum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'required', 'then', 'type', 'typeSize', 'unevaluatedProperties', 'uniqueItems'] /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties: {'enum': ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'if', 'items', 'maxItems', 'maximum', 'minItems', 'minimum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'propertyNames', 'required', 'then', 'unevaluatedProperties']} is not allowed for 'required' /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: patternProperties:-pins$:properties: {'enum': ['$ref', 'additionalItems', 'additionalProperties', 'allOf', 'anyOf', 'const', 'contains', 'default', 'dependencies', 'deprecated', 'description', 'else', 'enum', 'if', 'items', 'maxItems', 'maximum', 'minItems', 'minimum', 'multipleOf', 'not', 'oneOf', 'pattern', 'patternProperties', 'properties', 'propertyNames', 'required', 'then', 'unevaluatedProperties']} is not allowed for 'additionalProperties' /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml: ignoring, error in schema: patternProperties: -pins$: properties: required
warning: no schema found in file: ./Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
See https://patchwork.ozlabs.org/patch/1392657
The base for the patch is generally the last rc1. Any dependencies should be noted.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit.