memory: tegra for v5.11, fixed (2nd)
Hi,
This replaces my pull 2/2 from yesterday as few dt-binding headers should go via SoC tree (to make everyone's life easier - drivers do not depend on them so there is no cross-tree merge).
The Tegra memory controllers work was big enough to get its own branch and tag. It also includes few SoC and clock patches, which I shared externally via a stable tag to devfreq tree.
The work is not yet finished, so more patches from Dmitry will be coming. However I want to flush my queue now.
Best regards,
Krzysztof
The following changes since commit 3650b228f83adda7e5ee532e2b90429c03f7b9ec:
Linux 5.10-rc1 (2020-10-25 15:14:11 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git tags/memory-controller-drv-tegra-5.11-2
for you to fetch changes up to 0e1bcf2c05d0a681c04351fbd60812aea99354b6:
memory: tegra30-emc: Remove unnecessary of_node_put in tegra_emc_probe (2020-11-26 18:50:37 +0100)
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Memory controller drivers for v5.11 - Tegra SoC
There is a bigger work from Dmitry Osipenko around Tegra SoC memory controller drivers, mostly towards adding interconnect support and integration with devfreq. This work touches all Tegra memory controller drivers and also few other SoC-related parts. It's not yet finished but the intermediate stage seems ready to merge.
Beside that Tegra 210 memory controller got few fixes and received new swgroups (work of Nicolin Chen).
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Dmitry Osipenko (32):
dt-bindings: memory: tegra20: emc: Correct registers range in example
clk: tegra: Export Tegra20 EMC kernel symbols
soc/tegra: fuse: Export tegra_read_ram_code()
soc/tegra: fuse: Add stub for tegra_sku_info
dt-bindings: memory: tegra20: emc: Document nvidia, memory-controller property
dt-bindings: memory: tegra20: mc: Document new interconnect property
dt-bindings: memory: tegra20: emc: Document new interconnect property
dt-bindings: memory: tegra20: emc: Document OPP table and voltage regulator
dt-bindings: memory: tegra30: mc: Document new interconnect property
dt-bindings: memory: tegra30: emc: Document new interconnect property
dt-bindings: memory: tegra30: emc: Document OPP table and voltage regulator
dt-bindings: memory: tegra124: mc: Document new interconnect property
dt-bindings: memory: tegra124: emc: Document new interconnect property
dt-bindings: memory: tegra124: emc: Document OPP table and voltage regulator
dt-bindings: tegra30-actmon: Document OPP and interconnect properties
dt-bindings: host1x: Document new interconnect properties
memory: tegra: Add and use devm_tegra_memory_controller_get()
memory: tegra: Use devm_platform_ioremap_resource()
memory: tegra: Remove superfluous error messages around platform_get_irq()
memory: tegra: Add missing latency allowness entry for Page Table Cache
memory: tegra-mc: Add interconnect framework
memory: tegra20-emc: Make driver modular
memory: tegra20-emc: Continue probing if timings are missing in device-tree
memory: tegra20: Support interconnect framework
memory: tegra: Correct stub of devm_tegra_memory_controller_get()
memory: tegra20-emc: Use dev_pm_opp_set_clkname()
memory: tegra20-emc: Factor out clk initialization
memory: tegra20-emc: Remove IRQ number from error message
memory: tegra20-emc: Add devfreq support
memory: tegra30: Add FIFO sizes to memory clients
memory: tegra30-emc: Make driver modular
memory: tegra30-emc: Continue probing if timings are missing in device-tree
Krzysztof Kozlowski (1):
Merge tag 'tegra-soc-clk-drivers-5.11' into for-v5.11/tegra-mc
Nathan Chancellor (1):
memory: tegra30-emc: Remove unnecessary of_node_put in tegra_emc_probe
Nicolin Chen (5):
memory: tegra: Correct la.reg address of seswr
memory: tegra: Correct tegra210_mc_clients def values
memory: tegra: Sort tegra210_swgroups by reg address
dt-bindings: memory: tegra: Add missing swgroups
memory: tegra: Complete tegra210_swgroups
.../bindings/arm/tegra/nvidia,tegra30-actmon.txt | 25 + .../display/tegra/nvidia,tegra20-host1x.txt | 68 +++ .../memory-controllers/nvidia,tegra124-emc.yaml | 19 + .../memory-controllers/nvidia,tegra124-mc.yaml | 5 + .../memory-controllers/nvidia,tegra20-emc.txt | 22 +- .../memory-controllers/nvidia,tegra20-mc.txt | 3 + .../memory-controllers/nvidia,tegra30-emc.yaml | 18 + .../memory-controllers/nvidia,tegra30-mc.yaml | 5 + drivers/clk/tegra/clk-tegra20-emc.c | 3 + drivers/memory/tegra/Kconfig | 9 +- drivers/memory/tegra/mc.c | 155 +++++- drivers/memory/tegra/mc.h | 22 + drivers/memory/tegra/tegra114.c | 6 + drivers/memory/tegra/tegra124-emc.c | 22 +- drivers/memory/tegra/tegra124.c | 6 + drivers/memory/tegra/tegra20-emc.c | 528 +++++++++++++++++++-- drivers/memory/tegra/tegra20.c | 77 +++ drivers/memory/tegra/tegra210-emc-core.c | 39 +- drivers/memory/tegra/tegra210.c | 60 ++- drivers/memory/tegra/tegra30-emc.c | 73 ++- drivers/memory/tegra/tegra30.c | 72 +++ drivers/soc/tegra/fuse/tegra-apbmisc.c | 2 + include/dt-bindings/memory/tegra210-mc.h | 10 + include/soc/tegra/fuse.h | 4 + include/soc/tegra/mc.h | 27 ++ 25 files changed, 1111 insertions(+), 169 deletions(-)
Arnd Bergmann
AppliedFrom: Arnd Bergmann <[email protected]>
Quoted 9 lines · Krzysztof Kozlowski
This replaces my pull 2/2 from yesterday as few dt-binding headers should go via SoC tree (to make everyone's life easier - drivers do not depend on them so there is no cross-tree merge).
The Tegra memory controllers work was big enough to get its own branch and tag. It also includes few SoC and clock patches, which I shared externally via a stable tag to devfreq tree.
[...]
Merged into arm/drivers, thanks!
merge commit: 8f2685c9c4ffb68dd4360ea8c70fd75c3414bdb3
Arnd