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arm64: dts: renesas: beacon kit: Configure programmable clocks

PATCH In review Adam Ford 3 participants 20 messages Dec 24, 2020 – Jan 8, 2021

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Device tree bindings Arm/RISC-V/Renesas architecture
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Adam Ford

author
#0 lore raw

PATCH v2 1/9 arm64: dts: renesas: beacon kit: Configure programmable clocks

When the board was added, clock drivers were being updated done at the same time to allow the versaclock driver to properly configure the modes. Unfortunately, the updates were not applied to the board files at the time they should have been, so do it now.

Signed-off-by Adam Ford <[email protected]>

---
V2: Limit the changes to the versaclocks chips.

arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +26 -1
index cc0e7ce8e503..46a3ba895330 100644
@@ -5,6 +5,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/clk/versaclock.h>
 
 / {
 	backlight_lvds: backlight-lvds {

@@ -347,12 +348,36 @@ versaclock6_bb: clock-controller@6a {
 		#clock-cells = <1>;
 		clocks = <&x304_clk>;
 		clock-names = "xin";
-		/* CSI0_MCLK, CSI1_MCLK, AUDIO_CLKIN, USB_HUB_MCLK_BB */
+
 		assigned-clocks = <&versaclock6_bb 1>,
 				   <&versaclock6_bb 2>,
 				   <&versaclock6_bb 3>,
 				   <&versaclock6_bb 4>;
 		assigned-clock-rates =	<24000000>, <24000000>, <24000000>, <24576000>;
+
+		OUT1 {
+			idt,mode = <VC5_CMOS>;
+			idt,voltage-microvolt = <1800000>;
+			idt,slew-percent = <100>;
+		};
+
+		OUT2 {
+			idt,mode = <VC5_CMOS>;
+			idt,voltage-microvolt = <1800000>;
+			idt,slew-percent = <100>;
+		};
+
+		OUT3 {
+			idt,mode = <VC5_CMOS>;
+			idt,voltage-microvolt = <3300000>;
+			idt,slew-percent = <100>;
+		};
+
+		OUT4 {
+			idt,mode = <VC5_CMOS>;
+			idt,voltage-microvolt = <3300000>;
+			idt,slew-percent = <100>;
+		};
 	};
 };
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +26 -0
index e6885d50bb62..ade2f58ad99b 100644
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clk/versaclock.h>
 
 / {
 	memory@48000000 {

@@ -169,7 +170,32 @@ versaclock5: versaclock_som@6a {
 				   <&versaclock5 2>,
 				   <&versaclock5 3>,
 				   <&versaclock5 4>;
+
 		assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
+
+		OUT1 {
+			idt,mode = <VC5_CMOS>;
+			idt,voltage-microvolt = <1800000>;
+			idt,slew-percent = <100>;
+		};
+
+		OUT2 {
+			idt,mode = <VC5_CMOS>;
+			idt,voltage-microvolt = <1800000>;
+			idt,slew-percent = <100>;
+		};
+
+		OUT3 {
+			idt,mode = <VC5_CMOS>;
+			idt,voltage-microvolt = <1800000>;
+			idt,slew-percent = <100>;
+		};
+
+		OUT4 {
+			idt,mode = <VC5_CMOS>;
+			idt,voltage-microvolt = <3300000>;
+			idt,slew-percent = <100>;
+		};
 	};
 };
Signature · 1 line
2.25.1
author
#1 lore raw

PATCH v2 2/9 arm64: dts: renesas: beacon kit: Fix Audio Clock sources

The SoC was expecting two clock sources with different frequencies. One to support 44.1KHz and one to support 48KHz. With the newly added ability to configure the programmably clock, configure both clocks.

Assign the rcar-sound clocks to reference the versaclock instead of the fixed clock.

Signed-off-by Adam Ford <[email protected]>

---
V2: Go from fixed-factor-clock to just redefining the rcar-sound node
to reference the versaclock instead of the audio_clk_a.

arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +1 -24
index 46a3ba895330..4e86d308d07e 100644
@@ -223,12 +223,6 @@ x304_clk: x304-clock {
 	};
 };
 
-&audio_clk_a {
-	clock-frequency = <24576000>;
-	assigned-clocks = <&versaclock6_bb 4>;
-	assigned-clock-rates = <24576000>;
-};
-
 &audio_clk_b {
 	clock-frequency = <22579200>;
 };

@@ -574,7 +568,7 @@ sound_pins: sound {
 	};
 
 	sound_clk_pins: sound_clk {
-		groups = "audio_clk_a_a";
+		groups = "audio_clk_a_a", "audio_clk_b_a";
 		function = "audio_clk";
 	};
 

@@ -625,23 +619,6 @@ &rcar_sound {
 
 	status = "okay";
 
-	clocks = <&cpg CPG_MOD 1005>,
-		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
-		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
-		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
-		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
-		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
-		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
-		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
-		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
-		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
-		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
-		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
-		 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
-		 <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
-
 	ports {
 		#address-cells = <1>;
 		#size-cells = <0>;
arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts +21 -0
index 2c5b057c30c6..25eeac411f12 100644
@@ -27,3 +27,24 @@ chosen {
 		stdout-path = "serial0:115200n8";
 	};
 };
+
+/* Reference versaclock instead of audio_clk_a */
+&rcar_sound {
+	clocks = <&cpg CPG_MOD 1005>,
+		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+		 <&versaclock6_bb 4>, <&audio_clk_b>,
+		 <&audio_clk_c>,
+		 <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
+};
Signature · 1 line
2.25.1
#2 lore raw

Re: [PATCH V2 2/9] arm64: dts: renesas: beacon kit: Fix Audio Clock sources

Quoted 3 lines · Adam Ford

The SoC was expecting two clock sources with different frequencies. One to support 44.1KHz and one to support 48KHz. With the newly added ability to configure the programmably clock, configure both clocks.

Programmable.

Quoted 4 lines

Assign the rcar-sound clocks to reference the versaclock instead of the fixed clock.

Signed-off-by Adam Ford <[email protected]>

[...]

MBR, Sergei

Reviewed-by on v2 2/9
#3 lore raw

Re: [PATCH V2 2/9] arm64: dts: renesas: beacon kit: Fix Audio Clock sources

In reply to Adam Ford
Quoted 8 lines · Adam Ford

The SoC was expecting two clock sources with different frequencies. One to support 44.1KHz and one to support 48KHz. With the newly added ability to configure the programmably clock, configure both clocks.

Assign the rcar-sound clocks to reference the versaclock instead of the fixed clock.

Signed-off-by Adam Ford <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>

i.e. will queue in renesas-devel for v5.12 (with the "programmably" typo fixed).

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
author
#4 lore raw

PATCH v2 3/9 arm64: dts: renesas: beacon: Configure Audio CODEC clocks

In reply to Adam Ford

With the newly added configurable clock options, the audio CODEC can configure the mclk automatically. Add the reference to the versaclock. Since the devices on I2C5 can communicate at 400KHz, let's also increase that too

Signed-off-by Adam Ford <[email protected]>

---
V2: Remove the un-used clock-names reference.

     Base on: https://patchwork.kernel.org/project/alsa-devel/patch/[email protected]/
arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +2 -1
index 4e86d308d07e..dc5e05d7a792 100644
@@ -385,13 +385,14 @@ &i2c0 {
 
 &i2c5 {
 	status = "okay";
-	clock-frequency = <100000>;
+	clock-frequency = <400000>;
 	pinctrl-0 = <&i2c5_pins>;
 	pinctrl-names = "default";
 
 	codec: wm8962@1a {
 		compatible = "wlf,wm8962";
 		reg = <0x1a>;
+		clocks = <&versaclock6_bb 3>;
 		DCVDD-supply = <&reg_audio>;
 		DBVDD-supply = <&reg_audio>;
 		AVDD-supply = <&reg_audio>;
Signature · 1 line
2.25.1
Reviewed-by on v2 3/9
#5 lore raw

Re: [PATCH V2 3/9] arm64: dts: renesas: beacon: Configure Audio CODEC clocks

Quoted 6 lines · Adam Ford

With the newly added configurable clock options, the audio CODEC can configure the mclk automatically. Add the reference to the versaclock. Since the devices on I2C5 can communicate at 400KHz, let's also increase that too

Signed-off-by Adam Ford <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>

i.e. will queue in renesas-devel for v5.12.

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
author
#6 lore raw

PATCH v2 4/9 arm64: dts: renesas: beacon: Better describe keys

In reply to Adam Ford

The keys on the baseboard are laid out in an diamond pattern, up, down, left, right and center. Update the descriptions to make it easier to read.

Signed-off-by Adam Ford <[email protected]>

---
V2: Make keycode match the key name.

arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +15 -15
index dc5e05d7a792..a54ec36c69e4 100644
@@ -40,38 +40,38 @@ hdmi0_con: endpoint {
 	keys {
 		compatible = "gpio-keys";
 
-		key-1 {
+		key-1 { /* S19 */
 			gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_1>;
-			label = "Switch-1";
+			linux,code = <KEY_UP>;
+			label = "Up";
 			wakeup-source;
 			debounce-interval = <20>;
 		};
-		key-2 {
+		key-2 { /*S20 */
 			gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_2>;
-			label = "Switch-2";
+			linux,code = <KEY_LEFT>;
+			label = "Left";
 			wakeup-source;
 			debounce-interval = <20>;
 		};
-		key-3 {
+		key-3 { /* S21 */
 			gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_3>;
-			label = "Switch-3";
+			linux,code = <KEY_DOWN>;
+			label = "Down";
 			wakeup-source;
 			debounce-interval = <20>;
 		};
-		key-4 {
+		key-4 { /* S22 */
 			gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_4>;
-			label = "Switch-4";
+			linux,code = <KEY_RIGHT>;
+			label = "Right";
 			wakeup-source;
 			debounce-interval = <20>;
 		};
-		key-5 {
+		key-5 { /* S23 */
 			gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_5>;
-			label = "Switch-4";
+			linux,code = <KEY_ENTER>;
+			label = "Center";
 			wakeup-source;
 			debounce-interval = <20>;
 		};
Signature · 1 line
2.25.1
Reviewed-by on v2 4/9
#7 lore raw

Re: [PATCH V2 4/9] arm64: dts: renesas: beacon: Better describe keys

Quoted 5 lines · Adam Ford

The keys on the baseboard are laid out in an diamond pattern, up, down, left, right and center. Update the descriptions to make it easier to read.

Signed-off-by Adam Ford <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>

i.e. will queue in renesas-devel for v5.12.

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
author
#8 lore raw

PATCH v2 5/9 arm64: dts: renesas: beacon: Cleanup USB References

In reply to Adam Ford

The programmable versaclock is used for the usb_extal reference clock for the EHCI driver instead of a fixed-clock. Because the versaclock needs to be enabled, the clock reference needs to be added to the clocks list.

For the USB3 Phy, the perferred clock reference is usb3s_clk, so remove the usb_extal reference.

Signed-off-by Adam Ford <[email protected]>

---
V2: Split this off into its own patch.

arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +12 -2
index a54ec36c69e4..3b3efaf749bb 100644
@@ -263,12 +263,22 @@ &du_out_rgb {
 &ehci0 {
 	dr_mode = "otg";
 	status = "okay";
-	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
+	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>;
 };
 
 &ehci1 {
 	status = "okay";
-	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
+	clocks = <&cpg CPG_MOD 702>, <&versaclock5 3>;
+};
+
+&gpio6 {
+
+	usb_hub_reset {
+		gpio-hog;
+		gpios = <10 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "usb-hub-reset";
+	};
 };
 
 &hdmi0 {
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +1 -14
index ade2f58ad99b..a6f7193e4d97 100644
@@ -75,15 +75,6 @@ &extalr_clk {
 	clock-frequency = <32768>;
 };
 
-&gpio6 {
-	usb_hub_reset {
-		gpio-hog;
-		gpios = <10 GPIO_ACTIVE_HIGH>;
-		output-high;
-		line-name = "usb-hub-reset";
-	};
-};
-
 &hscif0 {
 	pinctrl-0 = <&hscif0_pins>;
 	pinctrl-names = "default";

@@ -315,16 +306,12 @@ &sdhi3 {
 	vmmc-supply = <&reg_3p3v>;
 	vqmmc-supply = <&reg_1p8v>;
 	bus-width = <8>;
-	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
 	non-removable;
 	fixed-emmc-driver-type = <1>;
 	status = "okay";
 };
 
-&usb_extal_clk {
-	clock-frequency = <50000000>;
-};
-
 &usb3s0_clk {
 	clock-frequency = <100000000>;
 };
Signature · 1 line
2.25.1
#9 lore raw

Re: [PATCH V2 5/9] arm64: dts: renesas: beacon: Cleanup USB References

Quoted 5 lines · Adam Ford

The programmable versaclock is used for the usb_extal reference clock for the EHCI driver instead of a fixed-clock. Because the versaclock needs to be enabled, the clock reference needs to be added to the clocks list.

For the USB3 Phy, the perferred clock reference is usb3s_clk, so

PHY. Preferred.

Quoted 3 lines

remove the usb_extal reference.

Signed-off-by Adam Ford <[email protected]>

[...]

Quoted 4 lines
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +0 -0
index ade2f58ad99b..a6f7193e4d97 100644

[...]

arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi &sdhi3 { · line 309

Quoted 6 lines
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +1 -1
@@ -315,16 +306,12 @@ &sdhi3 {
  	vmmc-supply = <&reg_3p3v>;
  	vqmmc-supply = <&reg_1p8v>;
  	bus-width = <8>;
-	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;

Unrelated?

arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi &sdhi3 { · line 313

Quoted 4 lines
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +0 -0
  	non-removable;
  	fixed-emmc-driver-type = <1>;
  	status = "okay";
  };

[...]

MBR, Sergei

author
#10 lore raw

PATCH v2 6/9 arm64: dts: renesas: beacon-rzg2m-kit: Rearange SoC unique functions

In reply to Adam Ford

In preparation for adding new dev kits, move anything specific to the RZ/G2M from the SOM-level and baseboard-levels and move them to the kit-level. This allows the SOM and baseboard to be reused with other SoC's.

Signed-off-by Adam Ford <[email protected]>

---
V2: Fix missing entries in dts file.

arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +0 -15
index 3b3efaf749bb..a6aa0b815c46 100644
@@ -241,21 +241,6 @@ &can1 {
 	status = "okay";
 };
 
-&du {
-	pinctrl-0 = <&du_pins>;
-	pinctrl-names = "default";
-	status = "okay";
-
-	clocks = <&cpg CPG_MOD 724>,
-		<&cpg CPG_MOD 723>,
-		<&cpg CPG_MOD 722>,
-		<&versaclock5 1>,
-		<&x302_clk>,
-		<&versaclock5 2>;
-	clock-names = "du.0", "du.1", "du.2",
-		"dclkin.0", "dclkin.1", "dclkin.2";
-};
-
 &du_out_rgb {
 	remote-endpoint = <&rgb_panel>;
 };
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +0 -5
index a6f7193e4d97..b34ffa1e77fa 100644
@@ -13,11 +13,6 @@ memory@48000000 {
 		reg = <0x0 0x48000000 0x0 0x78000000>;
 	};
 
-	memory@600000000 {
-		device_type = "memory";
-		reg = <0x6 0x00000000 0x0 0x80000000>;
-	};
-
 	osc_32k: osc_32k {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts +20 -0
index 25eeac411f12..501cb05da228 100644
@@ -26,6 +26,26 @@ aliases {
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	memory@600000000 {
+		device_type = "memory";
+		reg = <0x6 0x00000000 0x0 0x80000000>;
+	};
+};
+
+&du {
+	pinctrl-0 = <&du_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	clocks = <&cpg CPG_MOD 724>,
+		 <&cpg CPG_MOD 723>,
+		 <&cpg CPG_MOD 722>,
+		 <&versaclock5 1>,
+		 <&x302_clk>,
+		 <&versaclock5 2>;
+	clock-names = "du.0", "du.1", "du.2",
+		      "dclkin.0", "dclkin.1", "dclkin.2";
 };
 
 /* Reference versaclock instead of audio_clk_a */
Signature · 1 line
2.25.1
Reviewed-by on v2 6/9
#11 lore raw

Re: [PATCH V2 6/9] arm64: dts: renesas: beacon-rzg2m-kit: Rearange SoC unique functions

Quoted 6 lines · Adam Ford

In preparation for adding new dev kits, move anything specific to the RZ/G2M from the SOM-level and baseboard-levels and move them to the kit-level. This allows the SOM and baseboard to be reused with other SoC's.

Signed-off-by Adam Ford <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>

i.e. will queue in renesas-devel for v5.12.

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
author
#12 lore raw

PATCH v2 7/9 arm64: dts: renesas: Introduce r8a774b1-beacon-rzg2n-kit

In reply to Adam Ford

Beacon EmebeddedWorks is introducing a new kit based on the RZ/G2N SoC from Renesas.

The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio.

The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM as the RZ/G2M.

This SOM has only 2GB of DDR, and beacon-renesom-som.dtsi contains the base memory node, so an additional memory node isn't necessary.

Signed-off-by Adam Ford <[email protected]>

---
V2: Add missing du node entries.

arch/arm64/boot/dts/renesas/Makefile +1 -0
index dffefe030a76..cf7e2f77e4ea 100644
@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2.dtb
 dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex.dtb
 dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
 
+dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-beacon-rzg2n-kit.dtb
 dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb
 dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb
 dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex-idk-1110wr.dtb
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts new file +66 -0

66 lines not on this page · raw message

Signature · 1 line
2.25.1
Reviewed-by on v2 7/9
#13 lore raw

Re: [PATCH V2 7/9] arm64: dts: renesas: Introduce r8a774b1-beacon-rzg2n-kit

Hi Adam,

Quoted 11 lines · Adam Ford

Beacon EmebeddedWorks is introducing a new kit based on the RZ/G2N SoC from Renesas.

The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio.

The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM as the RZ/G2M.

Quoted 6 lines

This SOM has only 2GB of DDR, and beacon-renesom-som.dtsi contains the base memory node, so an additional memory node isn't necessary.

Signed-off-by Adam Ford <[email protected]>

---
V2: Add missing du node entries.

Thanks for the update!

Reviewed-by Geert Uytterhoeven <[email protected]>

i.e. will queue in renesas-devel for v5.12.

Quoted 12 lines
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts new file +9 -0
 
+/* Reference versaclock instead of audio_clk_a */
+&rcar_sound {
+       clocks = <&cpg CPG_MOD 1005>,
+                <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+                <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+                <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+                <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+                <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+                <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,

arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts line 65

Quoted 10 lines
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts new file +10 -0
+                <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+                <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+                <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+                <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+                <&versaclock6_bb 4>, <&audio_clk_b>,
+                <&audio_clk_c>,
+                <&cpg CPG_CORE R8A774B1_CLK_S0D4>;

BTW, r8a774[abe]1.dtsi define CPG_AUDIO_CLK_I. If you would use that instead of R8A774[ABE]1_CLK_S0D4, all rcar_sound clocks properties overrides would become identical, and you could consolidate them back in beacon-renesom-baseboard.dtsi.

That can be done in a single patch on top later, though.

Quoted 1 line

+};

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
author
#14 lore raw

PATCH v2 8/9 arm64: dts: renesas: Introduce r8a774e1-beacon-rzg2h-kit

In reply to Adam Ford

eacon EmebeddedWorks is introducing a new kit based on the RZ/G2H SoC from Renesas.

The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio.

The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM files as the RZ/G2M and RZ/G2N kits.

Signed-off-by Adam Ford <[email protected]>

---
V2: Add missing du node entries

arch/arm64/boot/dts/renesas/Makefile +1 -0
index cf7e2f77e4ea..5c68de184501 100644
@@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-ek874.dtb
 dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-ek874-idk-2121wr.dtb
 dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-ek874-mipi-2.1.dtb
 
+dtb-$(CONFIG_ARCH_R8A774E1) += r8a774e1-beacon-rzg2h-kit.dtb
 dtb-$(CONFIG_ARCH_R8A774E1) += r8a774e1-hihope-rzg2h.dtb
 dtb-$(CONFIG_ARCH_R8A774E1) += r8a774e1-hihope-rzg2h-ex.dtb
 dtb-$(CONFIG_ARCH_R8A774E1) += r8a774e1-hihope-rzg2h-ex-idk-1110wr.dtb
arch/arm64/boot/dts/renesas/r8a774e1-beacon-rzg2h-kit.dts new file +71 -0

71 lines not on this page · raw message

Signature · 1 line
2.25.1
#15 lore raw

Re: [PATCH V2 8/9] arm64: dts: renesas: Introduce r8a774e1-beacon-rzg2h-kit

Quoted 1 line · Adam Ford

eacon EmebeddedWorks is introducing a new kit based on the

Beacon?

Quoted 11 lines

RZ/G2H SoC from Renesas.

The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio.

The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM files as the RZ/G2M and RZ/G2N kits.

Signed-off-by Adam Ford <[email protected]>

[...]

MBR, Sergei

Reviewed-by on v2 8/9
#16 lore raw

Re: [PATCH V2 8/9] arm64: dts: renesas: Introduce r8a774e1-beacon-rzg2h-kit

In reply to Adam Ford
Quoted 6 lines · Adam Ford

eacon EmebeddedWorks is introducing a new kit based on the RZ/G2H SoC from Renesas.

The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio.

Quoted 6 lines

The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM files as the RZ/G2M and RZ/G2N kits.

Signed-off-by Adam Ford <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>

i.e. will queue in renesas-devel for v5.12 (with the company name typos fixed, also in PATCH 7/9).

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
author
#17 lore raw

PATCH v2 9/9 arm64: dts: renesas: beacon: Increase sdhi speeds

In reply to Adam Ford

The eMMC can run at hs400 and the WiFi chip can run at sdr104. Set the respective flags to push the sdhi faster.

Signed-off-by Adam Ford <[email protected]>

---
V2: New to series

arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +4 -1
index b34ffa1e77fa..56bdd80e36d0 100644
@@ -271,8 +271,9 @@ &scif2 {
 };
 
 &sdhi2 {
-	pinctrl-names = "default";
 	pinctrl-0 = <&sdhi2_pins>;
+	pinctrl-1 = <&sdhi2_pins>;
+	pinctrl-names = "default", "state_uhs";
 	bus-width = <4>;
 	vmmc-supply = <&reg_3p3v>;
 	vqmmc-supply = <&reg_1p8v>;

@@ -281,6 +282,8 @@ &sdhi2 {
 	pm-ignore-notify;
 	keep-power-in-suspend;
 	mmc-pwrseq = <&wlan_pwrseq>;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
 	status = "okay";
 	#address-cells = <1>;
 	#size-cells = <0>;
Signature · 1 line
2.25.1
Reviewed-by on v2 9/9
#18 lore raw

Re: [PATCH V2 9/9] arm64: dts: renesas: beacon: Increase sdhi speeds

Hi Adam,

Quoted 4 lines · Adam Ford

The eMMC can run at hs400 and the WiFi chip can run at sdr104. Set the respective flags to push the sdhi faster.

Signed-off-by Adam Ford <[email protected]>

Thanks for your patch!

Quoted 14 lines
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +2 -1
@@ -271,8 +271,9 @@ &scif2 {
 };
 
 &sdhi2 {
-       pinctrl-names = "default";
        pinctrl-0 = <&sdhi2_pins>;
+       pinctrl-1 = <&sdhi2_pins>;
+       pinctrl-names = "default", "state_uhs";
        bus-width = <4>;
        vmmc-supply = <&reg_3p3v>;
        vqmmc-supply = <&reg_1p8v>;

arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi &sdhi2 { · line 289

Quoted 8 lines
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +2 -0
@@ -281,6 +282,8 @@ &sdhi2 {
        pm-ignore-notify;
        keep-power-in-suspend;
        mmc-pwrseq = <&wlan_pwrseq>;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
        status = "okay";
        #address-cells = <1>;
        #size-cells = <0>;

The HS400 change was accidentally part of "[PATCH V2 5/9] arm64: dts:
renesas: beacon: Cleanup USB References":

| @@ -315,16 +306,12 @@ &sdhi3 {
|   vmmc-supply = <&reg_3p3v>;
|   vqmmc-supply = <&reg_1p8v>;
|   bus-width = <8>;
| - mmc-hs200-1_8v;
| + mmc-hs400-1_8v;
|   non-removable;
|   fixed-emmc-driver-type = <1>;
|   status = "okay";

You probably want to keep, not replace, the "mmc-hs200-1_8v" property, though.

With that fixed:

Reviewed-by Geert Uytterhoeven <[email protected]>

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Reviewed-by on v2 1/9
#19 lore raw
In reply to Adam Ford
Quoted 6 lines · Adam Ford

When the board was added, clock drivers were being updated done at the same time to allow the versaclock driver to properly configure the modes. Unfortunately, the updates were not applied to the board files at the time they should have been, so do it now.

Signed-off-by Adam Ford <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>

i.e. will queue in renesas-devel for v5.12.

Gr{oetje,eeting}s,

Geert

Signature · 5 lines
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds