Add support for Realtek RTL838x/RTL839x switch SoCs
Subsystems (3)
PATCH v3 1/4 Add support for Realtek RTL838x/RTL839x switch SoCs
The RTL838x/839x family of SoCs are Realtek switches with an embedded MIPS core.
* RTL838x - 500MHz 4kce single core - 1Gbit ports and L2 features
* RTL839x - 700MHz 34Kc single core - 1Gbit ports and L2 features
These switches, depending on the exact part number, will have anywhere between 8 and 50 ports. The MIPS core is wired to a switch cpu port which has a tagging feature allowing us to make use of the DSA subsystem. The SoCs are somewhat basic in certain areas, getting better with more advanced features on newer series.
The switch functionality is MMIO-mapped via a large MFD region.
The SoCs have the following peripherals
* ethernet
* switch
* uart - ns16550a
* spi-flash interface
* gpio
* wdt
* led
The code was derived from various vendor SDKs based on Linux v2.6 kernels.
This patchset allows us to boot RTL838x/RTL839x units with basic support. Most of the other drivers are already written and functional, and work to get them upstream is already in progress.
--- .../devicetree/bindings/mips/realtek-rtl.yaml | 24 ++++++ arch/mips/boot/dts/Makefile | 1 + arch/mips/boot/dts/realtek/rtl838x.dtsi | 21 +++++ arch/mips/boot/dts/realtek/rtl839x.dtsi | 21 +++++ arch/mips/boot/dts/realtek/rtl83xx.dtsi | 83 +++++++++++++++++++ 5 files changed, 150 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/realtek-rtl.yaml create mode 100644 arch/mips/boot/dts/realtek/rtl838x.dtsi create mode 100644 arch/mips/boot/dts/realtek/rtl839x.dtsi create mode 100644 arch/mips/boot/dts/realtek/rtl83xx.dtsi
Documentation/devicetree/bindings/mips/realtek-rtl.yaml new file +24 -0
@@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/realtek-rtl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTL83xx/93xx SoC series device tree bindings + +maintainers: + - Bert Vermeulen <[email protected]> + - Sander Vanheule <[email protected]> + +properties: + $nodename: + const: "/" + compatible: + oneOf: + # RTL8382-based boards + - items: + - enum: + - cisco,sg220-26 + - const: realtek,rtl8382-soc + +additionalProperties: true
arch/mips/boot/dts/Makefile +1 -0
@@ -14,6 +14,7 @@ subdir-$(CONFIG_FIT_IMAGE_FDT_NI169445) += ni subdir-$(CONFIG_MACH_PIC32) += pic32 subdir-$(CONFIG_ATH79) += qca subdir-$(CONFIG_RALINK) += ralink +subdir-$(CONFIG_MACH_REALTEK_RTL) += realtek subdir-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += xilfpga obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y))
arch/mips/boot/dts/realtek/rtl838x.dtsi new file +21 -0
@@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "mips,mips4KEc"; + reg = <0>; + clocks = <&baseclk 0>; + clock-names = "cpu"; + }; + }; + + baseclk: baseclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <500000000>; + }; +};
arch/mips/boot/dts/realtek/rtl839x.dtsi new file +21 -0
@@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "mips,mips34Kc"; + reg = <0>; + clocks = <&baseclk 0>; + clock-names = "cpu"; + }; + }; + + baseclk: baseclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <500000000>; + }; +};
arch/mips/boot/dts/realtek/rtl83xx.dtsi new file +83 -0
83 lines not on this page · raw message
Signature · 1 line
2.25.1
PATCH v3 2/4 MIPS: Add Realtek RTL838x/RTL839x support as generic MIPS system
This is just enough system to boot the kernel with earlycon working.
--- arch/mips/Kconfig | 21 ++++++++++++++++++ arch/mips/generic/Platform | 1 + arch/mips/include/asm/realtek/ioremap.h | 29 +++++++++++++++++++++++++ 3 files changed, 51 insertions(+) create mode 100644 arch/mips/include/asm/realtek/ioremap.h
arch/mips/Kconfig +21 -0
@@ -627,6 +627,27 @@ config RALINK select ARCH_HAS_RESET_CONTROLLER select RESET_CONTROLLER +config MACH_REALTEK_RTL + bool "Realtek RTL838x/RTL839x based machines" + select MIPS_GENERIC + select DMA_NONCOHERENT + select IRQ_MIPS_CPU + select CSRC_R4K + select CEVT_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_MULTITHREADING + select SYS_SUPPORTS_VPE_LOADER + select SYS_HAS_EARLY_PRINTK + select SYS_HAS_EARLY_PRINTK_8250 + select USE_GENERIC_EARLY_PRINTK_8250 + select BOOT_RAW + select PINCTRL + select USE_OF + config SGI_IP22 bool "SGI IP22 (Indy/Indigo2)" select ARC_MEMORY
arch/mips/generic/Platform +1 -0
@@ -10,6 +10,7 @@ # Note: order matters, keep the asm/mach-generic include last. cflags-$(CONFIG_MACH_INGENIC_SOC) += -I$(srctree)/arch/mips/include/asm/mach-ingenic +cflags-$(CONFIG_MACH_REALTEK_RTL) += -I$(srctree)/arch/mips/include/asm/realtek cflags-$(CONFIG_MIPS_GENERIC) += -I$(srctree)/arch/mips/include/asm/mach-generic load-$(CONFIG_MIPS_GENERIC) += 0xffffffff80100000
arch/mips/include/asm/realtek/ioremap.h new file +29 -0
@@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _REALTEK_RTL_IOREMAP_H_ +#define _REALTEK_RTL_IOREMAP_H_ + +static inline int is_rtl8380_internal_registers (phys_addr_t offset) +{ +/* IO Block */ +if (offset >=0xb8000000 && offset <0xb9000000 ) +return 1 ; +/* Switch block */ +if (offset >=0xbb000000 && offset <0xbc000000 ) +return 1 ; +return 0 ; +} + +static inline void __iomem *plat_ioremap (phys_addr_t offset,unsigned long size, +unsigned long flags) +{ +if (is_rtl8380_internal_registers (offset)) +return (void __iomem *)offset; +return NULL ; +} + +static inline int plat_iounmap (const volatile void __iomem *addr) +{ +return is_rtl8380_internal_registers ((unsigned long )addr); +} + +#endif /* _REALTEK_RTL_IOREMAP_H_ */
Signature · 1 line
2.25.1
Thomas Bogendoerfer
maintainerRe: [PATCH v3 2/4] MIPS: Add Realtek RTL838x/RTL839x support as generic MIPS system
Quoted 36 lines · Bert Vermeulen
This is just enough system to boot the kernel with earlycon working.
Signed-off-by Bert Vermeulen <[email protected]>Signed-off-by Sander Vanheule <[email protected]>--- arch/mips/Kconfig | 21 ++++++++++++++++++ arch/mips/generic/Platform | 1 + arch/mips/include/asm/realtek/ioremap.h | 29 +++++++++++++++++++++++++ 3 files changed, 51 insertions(+) create mode 100644 arch/mips/include/asm/realtek/ioremap.h[..]
arch/mips/include/asm/realtek/ioremap.h new file +19
-0@@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _REALTEK_RTL_IOREMAP_H_ +#define _REALTEK_RTL_IOREMAP_H_ + +static inline int is_rtl8380_internal_registers (phys_addr_t offset) +{ +/* IO Block */ +if (offset >=0xb8000000 && offset <0xb9000000 ) +return 1 ; +/* Switch block */ +if (offset >=0xbb000000 && offset <0xbc000000 ) +return 1 ; +return 0 ; +} + +static inline void __iomem *plat_ioremap (phys_addr_t offset,unsigned long size, +unsigned long flags) +{ +if (is_rtl8380_internal_registers (offset))
arch/mips/include/asm/realtek/ioremap.h line 29
Quoted 10 lines
arch/mips/include/asm/realtek/ioremap.h new file +10
-0+return (void __iomem *)offset; + return NULL; +} + +static inline int plat_iounmap (const volatile void __iomem *addr) +{ +return is_rtl8380_internal_registers ((unsigned long )addr); +} + +#endif /* _REALTEK_RTL_IOREMAP_H_ */
this looks like papering over using KSEG1 addresses instead of physical addresses in your DT. You should be able to drop this file and use 0x18000000/0x1B000000 instead of 0xb8000000/0xbb000000 in the DT file.
Thomas.
Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
PATCH v3 3/4 dt-bindings: Add Cisco prefix to vendor list
In reply to Bert Vermeulen--- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/vendor-prefixes.yaml +2 -0
@@ -229,6 +229,8 @@ patternProperties: description: Computadora Industrial Abierta Argentina "^cirrus,.*": description: Cirrus Logic, Inc. + "^cisco,.*": + description: Cisco Systems, Inc. "^cloudengines,.*": description: Cloud Engines, Inc. "^cnm,.*":
Signature · 1 line
2.25.1
Re: [PATCH v3 3/4] dt-bindings: Add Cisco prefix to vendor list
Quoted 6 lines · Bert Vermeulen
Signed-off-by Bert Vermeulen <[email protected]>Signed-off-by Sander Vanheule <[email protected]>--- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+)
PATCH v3 4/4 dts: Add support for Cisco SG220-26 switch
In reply to Bert Vermeulen--- arch/mips/Kconfig | 10 +++ arch/mips/boot/dts/realtek/Makefile | 2 + arch/mips/boot/dts/realtek/cisco_sg220-26.dts | 81 +++++++++++++++++++ 3 files changed, 93 insertions(+) create mode 100644 arch/mips/boot/dts/realtek/Makefile create mode 100644 arch/mips/boot/dts/realtek/cisco_sg220-26.dts
arch/mips/Kconfig +10 -0
@@ -1055,6 +1055,16 @@ config NLM_XLP_BOARD endchoice +if MACH_REALTEK_RTL +choice + prompt "Realtek RTL838x/RTL839x-based switch" + optional + + config DT_CISCO_SG220_26 + bool "Cisco SG220-26" +endchoice +endif + source "arch/mips/alchemy/Kconfig" source "arch/mips/ath25/Kconfig" source "arch/mips/ath79/Kconfig"
arch/mips/boot/dts/realtek/Makefile new file +2 -0
@@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_DT_CISCO_SG220_26) += cisco_sg220-26.dtb
arch/mips/boot/dts/realtek/cisco_sg220-26.dts new file +81 -0
81 lines not on this page · raw message
Signature · 1 line
2.25.1
Quoted 2 lines · Bert Vermeulen
The RTL838x/839x family of SoCs are Realtek switches with an embedded MIPS core.
Oops, forgot patch version note:
v3:
- all code removed, the base system is now only device tree files and docs and some build config.
- ioremap.h restored to the v1 version, with hardcoded I/O ranges, since I got flak on changing that as suggested. This brings it in line with other systems in arch/mips/generic.
Signature · 2 lines
Bert Vermeulen [email protected]
Rob Herring
maintainerQuoted 30 lines · Bert Vermeulen
The RTL838x/839x family of SoCs are Realtek switches with an embedded MIPS core.
* RTL838x - 500MHz 4kce single core - 1Gbit ports and L2 features
* RTL839x - 700MHz 34Kc single core - 1Gbit ports and L2 featuresThese switches, depending on the exact part number, will have anywhere between 8 and 50 ports. The MIPS core is wired to a switch cpu port which has a tagging feature allowing us to make use of the DSA subsystem. The SoCs are somewhat basic in certain areas, getting better with more advanced features on newer series.
The switch functionality is MMIO-mapped via a large MFD region.
The SoCs have the following peripherals
* ethernet
* switch
* uart - ns16550a
* spi-flash interface
* gpio
* wdt
* ledThe code was derived from various vendor SDKs based on Linux v2.6 kernels.
This patchset allows us to boot RTL838x/RTL839x units with basic support. Most of the other drivers are already written and functional, and work to get them upstream is already in progress.
Quoted 6 lines
Signed-off-by Birger Koblitz <[email protected]>Signed-off-by Bert Vermeulen <[email protected]>Signed-off-by John Crispin <[email protected]>Signed-off-by Sander Vanheule <[email protected]>--- .../devicetree/bindings/mips/realtek-rtl.yaml | 24 ++++++
Generally, this should be a separate patch.
Quoted 128 lines
arch/mips/boot/dts/Makefile | 1 + arch/mips/boot/dts/realtek/rtl838x.dtsi | 21 +++++ arch/mips/boot/dts/realtek/rtl839x.dtsi | 21 +++++ arch/mips/boot/dts/realtek/rtl83xx.dtsi | 83 +++++++++++++++++++ 5 files changed, 150 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/realtek-rtl.yaml create mode 100644 arch/mips/boot/dts/realtek/rtl838x.dtsi create mode 100644 arch/mips/boot/dts/realtek/rtl839x.dtsi create mode 100644 arch/mips/boot/dts/realtek/rtl83xx.dtsiDocumentation/devicetree/bindings/mips/realtek-rtl.yaml new file +24
-0@@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/realtek-rtl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTL83xx/93xx SoC series device tree bindings + +maintainers: + - Bert Vermeulen <[email protected]> + - Sander Vanheule <[email protected]> + +properties: + $nodename: + const: "/" + compatible: + oneOf: + # RTL8382-based boards + - items: + - enum: + - cisco,sg220-26 + - const: realtek,rtl8382-soc + +additionalProperties: truearch/mips/boot/dts/Makefile +1
-0@@ -14,6 +14,7 @@ subdir-$(CONFIG_FIT_IMAGE_FDT_NI169445) += ni subdir-$(CONFIG_MACH_PIC32) += pic32 subdir-$(CONFIG_ATH79) += qca subdir-$(CONFIG_RALINK) += ralink +subdir-$(CONFIG_MACH_REALTEK_RTL) += realtek subdir-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += xilfpga obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y))arch/mips/boot/dts/realtek/rtl838x.dtsi new file +21
-0@@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "mips,mips4KEc"; + reg = <0>; + clocks = <&baseclk 0>; + clock-names = "cpu"; + }; + }; + + baseclk: baseclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <500000000>; + }; +};arch/mips/boot/dts/realtek/rtl839x.dtsi new file +21
-0@@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "mips,mips34Kc"; + reg = <0>; + clocks = <&baseclk 0>; + clock-names = "cpu"; + }; + }; + + baseclk: baseclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <500000000>; + }; +};arch/mips/boot/dts/realtek/rtl83xx.dtsi new file +16
-0@@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause + +/ { + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + cpuintc: cpuintc { + compatible = "mti,cpu-interrupt-controller"; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller;
arch/mips/boot/dts/realtek/rtl83xx.dtsi line 26
Quoted 10 lines
arch/mips/boot/dts/realtek/rtl83xx.dtsi new file +10
-0+ }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xb8000000 0x10000>; + + spi: spi@1200 { + compatible = "realtek,rtl-spi";
Not documented. Needs to have an SoC specific compatible.
arch/mips/boot/dts/realtek/rtl83xx.dtsi line 35
Quoted 9 lines
arch/mips/boot/dts/realtek/rtl83xx.dtsi new file +9
-0+ reg = <0x1200 0x100>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + uart0: uart@2000 {
serial@2000
Build the dtb with W=1 and run 'make dtbs_check' and fix any warnings. The above issue should show up.
arch/mips/boot/dts/realtek/rtl83xx.dtsi line 36
Quoted 1 line
arch/mips/boot/dts/realtek/rtl83xx.dtsi new file +1
-0+ compatible = "ns16550a";
No quirks for this? Best to have a more specific compatible in case you do.
Quoted 24 lines
arch/mips/boot/dts/realtek/rtl83xx.dtsi new file +24
-0+ reg = <0x2000 0x100>; + + clock-frequency = <200000000>; + + interrupt-parent = <&intc>; + interrupts = <31>; + + reg-io-width = <1>; + reg-shift = <2>; + fifo-size = <1>; + no-loopback-test; + + status = "disabled"; + }; + + uart1: uart@2100 { + compatible = "ns16550a"; + reg = <0x2100 0x100>; + + clock-frequency = <200000000>; + + interrupt-parent = <&intc>; + interrupts = <30>; +
arch/mips/boot/dts/realtek/rtl83xx.dtsi line 70
Quoted 10 lines
arch/mips/boot/dts/realtek/rtl83xx.dtsi new file +10
-0+ reg-io-width = <1>; + reg-shift = <2>; + fifo-size = <1>; + no-loopback-test; + + status = "disabled"; + }; + + intc: interrupt-controller@3000 { + compatible = "realtek,rtl-intc";
Not documented.
Quoted 16 lines
arch/mips/boot/dts/realtek/rtl83xx.dtsi new file +13
-0+ #interrupt-cells = <1>; + interrupt-controller; + reg = <0x3000 0x20>; + }; + }; + + switch_bus: switch-bus@bb000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xbb000000 0x10000>; + }; +};Signature · 1 line
2.25.1