lib/hash: support non sse42 cpu architecture
PATCH 1/1 lib/hash: support non sse42 cpu architecture
add _SSE42_ flag to enable compilation of
sse42 specific instructions only on supported
architecture
--- lib/librte_hash/rte_hash_crc.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
lib/librte_hash/rte_hash_crc.h +8 -8
@@ -358,7 +358,7 @@ crc32c_2words(uint64_t data, uint32_t init_val)return crc; } -#if defined(RTE_ARCH_X86 ) +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)static inline uint32_t crc32c_sse42_u8 (uint8_t data,uint32_t init_val) {
@@ -404,7 +404,7 @@ crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val) }#endif -#ifdef RTE_ARCH_X86_64 +#if defined(RTE_ARCH_X86_64 ) && defined(__SSE42__)static inline uint32_t crc32c_sse42_u64 (uint64_t data,uint64_t init_val) {
@@ -442,7 +442,7 @@ static uint8_t crc32_alg = CRC32_SW;static inline void rte_hash_crc_set_alg (uint8_t alg) { -#if defined(RTE_ARCH_X86 ) +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (alg == CRC32_SSE42_x64 && !rte_cpu_get_flag_enabled (RTE_CPUFLAG_EM64T )) alg =CRC32_SSE42 ;
@@ -471,7 +471,7 @@ RTE_INIT(rte_hash_crc_init_alg)static inline uint32_t rte_hash_crc_1byte (uint8_t data,uint32_t init_val) { -#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u8 (data, init_val);#endif
@@ -494,7 +494,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)static inline uint32_t rte_hash_crc_2byte (uint16_t data,uint32_t init_val) { -#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u16 (data, init_val);#endif
@@ -517,7 +517,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)static inline uint32_t rte_hash_crc_4byte (uint32_t data,uint32_t init_val) { -#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u32 (data, init_val);#endif
@@ -540,12 +540,12 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)static inline uint32_t rte_hash_crc_8byte (uint64_t data,uint32_t init_val) { -#ifdef RTE_ARCH_X86_64 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg == CRC32_SSE42_x64))return crc32c_sse42_u64 (data, init_val);#endif -#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u64_mimic (data, init_val);#endif
Signature · 1 line
2.25.1
There was no review of this patch in last 2 months. +Cc Yipeng and Sameh
12/01/2021 08:24, kumar amber:
Quoted 83 lines
add _SSE42_ flag to enable compilation of
sse42 specific instructions only on supported
architectureSigned-off-by kumar amber <[email protected]>--- lib/librte_hash/rte_hash_crc.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)lib/librte_hash/rte_hash_crc.h +8
-8@@ -358,7 +358,7 @@ crc32c_2words(uint64_t data, uint32_t init_val)return crc; } -#if defined(RTE_ARCH_X86 ) +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)static inline uint32_t crc32c_sse42_u8 (uint8_t data,uint32_t init_val) {@@ -404,7 +404,7 @@ crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val) }#endif -#ifdef RTE_ARCH_X86_64 +#if defined(RTE_ARCH_X86_64 ) && defined(__SSE42__)static inline uint32_t crc32c_sse42_u64 (uint64_t data,uint64_t init_val) {@@ -442,7 +442,7 @@ static uint8_t crc32_alg = CRC32_SW;static inline void rte_hash_crc_set_alg (uint8_t alg) { -#if defined(RTE_ARCH_X86 ) +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (alg == CRC32_SSE42_x64 && !rte_cpu_get_flag_enabled (RTE_CPUFLAG_EM64T )) alg =CRC32_SSE42 ;@@ -471,7 +471,7 @@ RTE_INIT(rte_hash_crc_init_alg)static inline uint32_t rte_hash_crc_1byte (uint8_t data,uint32_t init_val) { -#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u8 (data, init_val);#endif @@ -494,7 +494,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)static inline uint32_t rte_hash_crc_2byte (uint16_t data,uint32_t init_val) { -#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u16 (data, init_val);#endif @@ -517,7 +517,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)static inline uint32_t rte_hash_crc_4byte (uint32_t data,uint32_t init_val) { -#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u32 (data, init_val);#endif @@ -540,12 +540,12 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)static inline uint32_t rte_hash_crc_8byte (uint64_t data,uint32_t init_val) { -#ifdef RTE_ARCH_X86_64 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg == CRC32_SSE42_x64))return crc32c_sse42_u64 (data, init_val);#endif -#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u64_mimic (data, init_val);#endif
Quoted 28 lines
-----Original Message-----
From: dev <[email protected]> On Behalf Of kumar amber
Sent: Monday, January 11, 2021 11:25 PM
To: [email protected]
Cc: Richardson, Bruce <[email protected]>
Subject: [dpdk-dev] [PATCH v1] lib/hash: support non sse42 cpu architectureadd _SSE42_ flag to enable compilation of
sse42 specific instructions only on supported architectureSigned-off-by kumar amber <[email protected]>--- lib/librte_hash/rte_hash_crc.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)lib/librte_hash/rte_hash_crc.h +1
-1@@ -358,7 +358,7 @@ crc32c_2words(uint64_t data, uint32_t init_val)return crc; } -#if defined(RTE_ARCH_X86 ) +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)static inline uint32_t crc32c_sse42_u8(uint8_t data, uint32_t init_val) { @@ -404,7 +404,7 @@
crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val)} #endif
...
Quoted 6 lines
lib/librte_hash/rte_hash_crc.h +1
-2-#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u64_mimic (data, init_val);#endif --2.25.1
[Wang, Yipeng]
Hi, Kumar, thanks for the patch.
I think the minimum required machine for x86 is sse4.2 compatible already. So I wonder if we really need this.
Also, I think the right way to check machine flag in DPDK should be:
#If defined (RTE_MACHINE_CPUFLAG_SSE4_2)
Instead of using compiler dependent macro.
24/03/2021 23:59, Wang, Yipeng1:
Quoted 26 lines
From: kumar amber
Quoted 22 lines
add _SSE42_ flag to enable compilation of
sse42 specific instructions only on supported architectureSigned-off-by kumar amber <[email protected]>--- lib/librte_hash/rte_hash_crc.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)lib/librte_hash/rte_hash_crc.h +1
-1@@ -358,7 +358,7 @@ crc32c_2words(uint64_t data, uint32_t init_val)return crc; } -#if defined(RTE_ARCH_X86 ) +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)static inline uint32_t crc32c_sse42_u8(uint8_t data, uint32_t init_val) { @@ -404,7 +404,7 @@
crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val)} #endif...
Quoted 10 lines
Quoted 6 lines
lib/librte_hash/rte_hash_crc.h +1
-2-#if definedRTE_ARCH_X86 +#if defined(RTE_ARCH_X86 ) && defined(__SSE42__)if (likely (crc32_alg &CRC32_SSE42 ))return crc32c_sse42_u64_mimic (data, init_val);#endif --2.25.1
[Wang, Yipeng]
Hi, Kumar, thanks for the patch.
I think the minimum required machine for x86 is sse4.2 compatible already. So I wonder if we really need this.
Yes, that's why I don't understand this patch.
Quoted 2 lines
Also, I think the right way to check machine flag in DPDK should be:
#If defined (RTE_MACHINE_CPUFLAG_SSE4_2)
These macros have been removed in DPDK 20.11.
Quoted 1 line
Instead of using compiler dependent macro.
Compiler macros are well standardized, it is OK.
25/03/2021 09:06, Thomas Monjalon:
Quoted 7 lines
24/03/2021 23:59, Wang, Yipeng1:
Quoted 6 lines
From: kumar amber
Quoted 5 lines
add _SSE42_ flag to enable compilation of
sse42 specific instructions only on supported architectureSigned-off-by kumar amber <[email protected]>
[...]
Quoted 5 lines
Quoted 3 lines
[Wang, Yipeng]
Hi, Kumar, thanks for the patch.
I think the minimum required machine for x86 is sse4.2 compatible already. So I wonder if we really need this.Yes, that's why I don't understand this patch.
Any comment? Should we reject the patch?
Quoted 8 lines · On Fri, 09 Apr 2021 00:41:34 +0200 Thomas Monjalon <[email protected]> wrote:
25/03/2021 09:06, Thomas Monjalon:
Quoted 7 lines
24/03/2021 23:59, Wang, Yipeng1:
Quoted 6 lines
From: kumar amber
Quoted 5 lines
add _SSE42_ flag to enable compilation of
sse42 specific instructions only on supported architectureSigned-off-by kumar amber <[email protected]>
Quoted 11 lines
[...]
Quoted 5 lines
Quoted 3 lines
[Wang, Yipeng]
Hi, Kumar, thanks for the patch.
I think the minimum required machine for x86 is sse4.2 compatible already. So I wonder if we really need this.Yes, that's why I don't understand this patch.
Any comment? Should we reject the patch?
The only use case would be running DPDK in a VM for a hypervisor that disables those instructions in guest. Some old crufty hypervisors don't handle it??
Hi Thomas ,
Pls reject it
-----Original Message-----
From: Thomas Monjalon <[email protected]>
Sent: Friday, April 9, 2021 4:12 AM
To: Amber, Kumar <[email protected]>
Cc: Wang, Yipeng1 <[email protected]>; [email protected]; Richardson, Bruce <[email protected]>; Gobriel, Sameh <[email protected]>
Subject: Re: [dpdk-dev] [PATCH v1] lib/hash: support non sse42 cpu architecture
25/03/2021 09:06, Thomas Monjalon:
Quoted 7 lines
24/03/2021 23:59, Wang, Yipeng1:
Quoted 6 lines
From: kumar amber
Quoted 5 lines
add _SSE42_ flag to enable compilation of
sse42 specific instructions only on supported architectureSigned-off-by kumar amber <[email protected]>
[...]
Quoted 5 lines
Quoted 3 lines
[Wang, Yipeng]
Hi, Kumar, thanks for the patch.
I think the minimum required machine for x86 is sse4.2 compatible already. So I wonder if we really need this.Yes, that's why I don't understand this patch.
Any comment? Should we reject the patch?