ASoC: qcom: lpass-cpu: Remove bit clock state check
Subsystems (4)
PATCH 1/1 ASoC: qcom: lpass-cpu: Remove bit clock state check
No need of BCLK state maintenance from driver side as clock_enable and clk_disable API's maintaing state counter.
One of the major issue was spotted when Headset jack inserted while playback continues, due to same PCM device node opens twice for playaback/capture and closes once for capture and playback continues.
It can resolve the errors in such scenarios.
--- sound/soc/qcom/lpass-cpu.c | 22 ++++++++-------------- sound/soc/qcom/lpass-lpaif-reg.h | 3 --- sound/soc/qcom/lpass.h | 1 - 3 files changed, 8 insertions(+), 18 deletions(-)
sound/soc/qcom/lpass-cpu.c +8 -14
@@ -286,16 +286,12 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,dev_err (dai->dev,"error writing to i2sctl reg: %d\n" , ret); -if (drvdata->bit_clk_state[id] ==LPAIF_BIT_CLK_DISABLE ) { - ret =clk_enable (drvdata->mi2s_bit_clk[id]); -if (ret) { -dev_err (dai->dev,"error in enabling mi2s bit clk: %d\n" , ret); -clk_disable (drvdata->mi2s_osr_clk[id]); -return ret; - } - drvdata->bit_clk_state[id] =LPAIF_BIT_CLK_ENABLE ; + ret =clk_enable (drvdata->mi2s_bit_clk[id]); +if (ret) { +dev_err (dai->dev,"error in enabling mi2s bit clk: %d\n" , ret); +clk_disable (drvdata->mi2s_osr_clk[id]); +return ret; } -break ;case SNDRV_PCM_TRIGGER_STOP :case SNDRV_PCM_TRIGGER_SUSPEND :
@@ -310,10 +306,9 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,if (ret)dev_err (dai->dev,"error writing to i2sctl reg: %d\n" , ret); -if (drvdata->bit_clk_state[id] ==LPAIF_BIT_CLK_ENABLE ) { -clk_disable (drvdata->mi2s_bit_clk[dai->driver->id]); - drvdata->bit_clk_state[id] =LPAIF_BIT_CLK_DISABLE ; - } + +clk_disable (drvdata->mi2s_bit_clk[dai->driver->id]); +break ; }
@@ -861,7 +856,6 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) PTR_ERR(drvdata->mi2s_bit_clk[dai_id]));return PTR_ERR (drvdata->mi2s_bit_clk[dai_id]); } - drvdata->bit_clk_state[dai_id] =LPAIF_BIT_CLK_DISABLE ; }/* Allocation for i2sctl regmap fields */
sound/soc/qcom/lpass-lpaif-reg.h +0 -3
@@ -60,9 +60,6 @@#define LPAIF_I2SCTL_BITWIDTH_24 1#define LPAIF_I2SCTL_BITWIDTH_32 2 -#define LPAIF_BIT_CLK_DISABLE 0 -#define LPAIF_BIT_CLK_ENABLE 1 -#define LPAIF_I2SCTL_RESET_STATE 0x003C0004#define LPAIF_DMACTL_RESET_STATE 0x00200000
sound/soc/qcom/lpass.h +0 -1
@@ -68,7 +68,6 @@ struct lpass_data {unsigned int mi2s_playback_sd_mode[LPASS_MAX_MI2S_PORTS ];unsigned int mi2s_capture_sd_mode[LPASS_MAX_MI2S_PORTS ];int hdmi_port_enable; -int bit_clk_state[LPASS_MAX_MI2S_PORTS ];/* low-power audio interface (LPAIF) registers */ void __iomem *lpaif;
Signature · 2 lines
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Quoted 10 lines · Srinivasa Rao Mandadapu
No need of BCLK state maintenance from driver side as
clock_enableandclk_disableAPI's maintaing state counter.One of the major issue was spotted when Headset jack inserted while playback continues, due to same PCM device node opens twice for playaback/capture and closes once for capture and playback continues.
It can resolve the errors in such scenarios.
Signed-off-by Srinivasa Rao Mandadapu <[email protected]>
Thanks for the cleanup, yes clk core will take care of this by enable_count check!
You should add
Quoted 16 lines
--- sound/soc/qcom/lpass-cpu.c | 22 ++++++++-------------- sound/soc/qcom/lpass-lpaif-reg.h | 3 --- sound/soc/qcom/lpass.h | 1 - 3 files changed, 8 insertions(+), 18 deletions(-)sound/soc/qcom/lpass-cpu.c +0
-2@@ -286,16 +286,12 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,dev_err (dai->dev,"error writing to i2sctl reg: %d\n" , ret); -if (drvdata->bit_clk_state[id] ==LPAIF_BIT_CLK_DISABLE ) { - ret =clk_enable (drvdata->mi2s_bit_clk[id]);
sound/soc/qcom/lpass-cpu.c static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, · line 292
Quoted 10 lines
sound/soc/qcom/lpass-cpu.c +4
-6-if (ret) { -dev_err (dai->dev,"error in enabling mi2s bit clk: %d\n" , ret); -clk_disable (drvdata->mi2s_osr_clk[id]); -return ret; - } - drvdata->bit_clk_state[id] =LPAIF_BIT_CLK_ENABLE ; + ret =clk_enable (drvdata->mi2s_bit_clk[id]); +if (ret) { +dev_err (dai->dev,"error in enabling mi2s bit clk: %d\n" , ret); +clk_disable (drvdata->mi2s_osr_clk[id]);
Can you also remove this unnecessary disable here!
-srini
Quoted 55 lines
sound/soc/qcom/lpass-cpu.c +4
-6+return ret; } -break ;case SNDRV_PCM_TRIGGER_STOP :case SNDRV_PCM_TRIGGER_SUSPEND :@@ -310,10 +306,9 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,if (ret)dev_err (dai->dev,"error writing to i2sctl reg: %d\n" , ret); -if (drvdata->bit_clk_state[id] ==LPAIF_BIT_CLK_ENABLE ) { -clk_disable (drvdata->mi2s_bit_clk[dai->driver->id]); - drvdata->bit_clk_state[id] =LPAIF_BIT_CLK_DISABLE ; - } + +clk_disable (drvdata->mi2s_bit_clk[dai->driver->id]); +break ; }@@ -861,7 +856,6 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) PTR_ERR(drvdata->mi2s_bit_clk[dai_id]));return PTR_ERR (drvdata->mi2s_bit_clk[dai_id]); } - drvdata->bit_clk_state[dai_id] =LPAIF_BIT_CLK_DISABLE ; }/* Allocation for i2sctl regmap fields */ sound/soc/qcom/lpass-lpaif-reg.h +0
-3@@ -60,9 +60,6 @@#define LPAIF_I2SCTL_BITWIDTH_24 1#define LPAIF_I2SCTL_BITWIDTH_32 2 -#define LPAIF_BIT_CLK_DISABLE 0 -#define LPAIF_BIT_CLK_ENABLE 1 -#define LPAIF_I2SCTL_RESET_STATE 0x003C0004#define LPAIF_DMACTL_RESET_STATE 0x00200000sound/soc/qcom/lpass.h +0
-1@@ -68,7 +68,6 @@ struct lpass_data {unsigned int mi2s_playback_sd_mode[LPASS_MAX_MI2S_PORTS ];unsigned int mi2s_capture_sd_mode[LPASS_MAX_MI2S_PORTS ];int hdmi_port_enable; -int bit_clk_state[LPASS_MAX_MI2S_PORTS ];/* low-power audio interface (LPAIF) registers */ void __iomem *lpaif;
Thanks Srinivas For Your time!!!
Quoted 12 lines · Srinivas Kandagatla
Quoted 9 lines · Srinivasa Rao Mandadapu
No need of BCLK state maintenance from driver side as
clock_enableandclk_disableAPI's maintaing state counter.One of the major issue was spotted when Headset jack inserted while playback continues, due to same PCM device node opens twice for playaback/capture and closes once for capture and playback continues.
It can resolve the errors in such scenarios.
Quoted 8 lines
Quoted 1 line
Signed-off-by Srinivasa Rao Mandadapu <[email protected]>Thanks for the cleanup, yes clk core will take care of this by
enable_countcheck!You should add
Fixes b1824968221c ("ASoC: qcom: Fix enabling BCLK and LRCLK in LPAIF invalid state")
Okay. I will do in next patch.
Quoted 23 lines
Quoted 23 lines
---
sound/soc/qcom/lpass-cpu.c | 22 ++++++++--------------sound/soc/qcom/lpass-lpaif-reg.h| 3 --- sound/soc/qcom/lpass.h | 1 -3 files changed, 8 insertions(+), 18 deletions(-)sound/soc/qcom/lpass-cpu.c +0
-6@@ -286,16 +286,12 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); - if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_DISABLE) { - ret = clk_enable(drvdata->mi2s_bit_clk[id]); - if (ret) { - dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); - clk_disable(drvdata->mi2s_osr_clk[id]); - return ret; - }
Quoted 10 lines
sound/soc/qcom/lpass-cpu.c static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, · line 292
Quoted 6 lines
sound/soc/qcom/lpass-cpu.c +4
-1- drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_ENABLE; + ret = clk_enable(drvdata->mi2s_bit_clk[id]); + if (ret) { + dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); + clk_disable(drvdata->mi2s_osr_clk[id]);Can you also remove this unnecessary disable here!
Actually this is MI2S OSR clock disable on failure of bit clock enable.
Do You think it's redundant?
Quoted 53 lines
-srini
Quoted 51 lines
sound/soc/qcom/lpass-cpu.c +1
-1+ return ret; } -break;
caseSNDRV_PCM_TRIGGER_STOP:
caseSNDRV_PCM_TRIGGER_SUSPEND:sound/soc/qcom/lpass-cpu.c +3
-4@@ -310,10 +306,9 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, if (ret) dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); - if (drvdata->bit_clk_state[id] == LPAIF_BIT_CLK_ENABLE) { -clk_disable (drvdata->mi2s_bit_clk[dai->driver->id]); - drvdata->bit_clk_state[id] = LPAIF_BIT_CLK_DISABLE; - } + +clk_disable (drvdata->mi2s_bit_clk[dai->driver->id]); + break; }@@ -861,7 +856,6 @@ int
asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)PTR_ERR(drvdata->mi2s_bit_clk[dai_id]));
returnPTR_ERR(drvdata->mi2s_bit_clk[dai_id]);
}
- drvdata->bit_clk_state[dai_id] =LPAIF_BIT_CLK_DISABLE;
}
/* Allocation for i2sctl regmap fields */sound/soc/qcom/lpass-lpaif-reg.h +0
-0@@ -60,9 +60,6 @@ #define LPAIF_I2SCTL_BITWIDTH_24 1 #define LPAIF_I2SCTL_BITWIDTH_32 2-#define LPAIF_BIT_CLK_DISABLE 0
sound/soc/qcom/lpass-lpaif-reg.h +0
-2-#define LPAIF_BIT_CLK_ENABLE 1 -#define LPAIF_I2SCTL_RESET_STATE
0x003C0004#define LPAIF_DMACTL_RESET_STATE0x00200000diff --gita/sound/soc/qcom/lpass.hb/sound/soc/qcom/lpass.hindex2d68af0da34d..83b2e08ade06100644sound/soc/qcom/lpass.h +0
-1@@ -68,7 +68,6 @@ struct lpass_data { unsigned int mi2s_playback_sd_mode[LPASS_MAX_MI2S_PORTS]; unsigned int mi2s_capture_sd_mode[LPASS_MAX_MI2S_PORTS]; int hdmi_port_enable; - int bit_clk_state[LPASS_MAX_MI2S_PORTS]; /* low-power audio interface (LPAIF) registers */ void __iomem *lpaif;
Signature · 2 lines
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Quoted 4 lines · Srinivasa Rao Mandadapu
Quoted 1 line
Actually this is MI2S OSR clock disable on failure of bit clock enable.
Do You think it's redundant?
My Bad!! Just ignore my comment on removing this!
--srini