ARM: dts: ebaz4205: add pinctrl entries for switches
Subsystems (2)
PATCH 1/1 ARM: dts: ebaz4205: add pinctrl entries for switches
Add the pinctrl entries for the GPIOs which are connected to the push buttons on this board.
Signed-off-by Michael Walle <[email protected]>
--- arch/arm/boot/dts/zynq-ebaz4205.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
arch/arm/boot/dts/zynq-ebaz4205.dts +23 -0
@@ -43,7 +43,30 @@ }; }; +&gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_default>; +}; + &pinctrl0 { + pinctrl_gpio0_default: gpio0-default { + mux { + groups = "gpio0_20_grp", "gpio0_32_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_20_grp", "gpio0_32_grp"; + io-standard = <3>; + slew-rate = <0>; + }; + + conf-pull-up { + pins = "MIO20", "MIO32"; + bias-disable; + }; + }; + pinctrl_sdhci0_default: sdhci0-default { mux { groups = "sdio0_2_grp";
Signature · 1 line
2.20.1
Michal Simek
AppliedQuoted 34 lines · Michael Walle
Add the pinctrl entries for the GPIOs which are connected to the push buttons on this board.
Signed-off-by Michael Walle <[email protected]>--- arch/arm/boot/dts/zynq-ebaz4205.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)arch/arm/boot/dts/zynq-ebaz4205.dts +16
-0@@ -43,7 +43,30 @@ }; }; +&gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_default>; +}; + &pinctrl0 { + pinctrl_gpio0_default: gpio0-default { + mux { + groups = "gpio0_20_grp", "gpio0_32_grp"; + function = "gpio0"; + }; + + conf { + groups = "gpio0_20_grp", "gpio0_32_grp"; + io-standard = <3>; + slew-rate = <0>; + };
arch/arm/boot/dts/zynq-ebaz4205.dts line 72
Quoted 10 lines
arch/arm/boot/dts/zynq-ebaz4205.dts +7
-0+ + conf-pull-up { + pins = "MIO20", "MIO32"; + bias-disable; + }; + }; + pinctrl_sdhci0_default: sdhci0-default { mux { groups = "sdio0_2_grp";
Applied.
M
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