soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva

On reset deassert, we must wait a bit after the rstst bit change before we allow clockdomain autoidle again. Otherwise we get the following oops sometimes on dra7 with iva:

Unhandled fault: imprecise external abort (0x1406) at 0x00000000 44000000.ocp:L3 Standard Error: MASTER MPU TARGET IVA_CONFIG (Read Link):
At Address: 0x0005A410 : Data Access in User mode during Functional access

Internal error: : 1406 [#1] SMP ARM

...
(sysc_write_sysconfig) from [<c0782cb0>] (sysc_enable_module+0xcc/0x260) (sysc_enable_module) from [<c0782f0c>] (sysc_runtime_resume+0xc8/0x174) (sysc_runtime_resume) from [<c0a3e1ac>] (genpd_runtime_resume+0x94/0x224) (genpd_runtime_resume) from [<c0a33f0c>] (__rpm_callback+0xd8/0x180)

It is unclear what all devices this might affect, but presumably other devices with the rstst bit too can be affected. So let's just enable the delay for all the devices with rstst bit for now. Later on we may want to limit the list to the know affected devices if needed.

---
 drivers/soc/ti/omap_prm.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

@@ -830,8 +830,12 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev,
 		       reset->prm->data->name, id);
 
 exit:
-	if (reset->clkdm)
+	if (reset->clkdm) {
+		/* At least dra7 iva needs a delay before clkdm idle */
+		if (has_rstst)
+			udelay(1);
 		pdata->clkdm_allow_idle(reset->clkdm);
+	}
 
 	return ret;
 }

2.30.1

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OK great. May I add your Tested-by: to the patch?

Regards,

Tony