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csky: Enable generic clockevent broadcast

PATCH In review [email protected] 4 participants 5 messages Mar 7, 2021 – Mar 17, 2021

Subsystems (3)
RISC-V Generic include/asm header files C-sky architecture
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#0 lore raw

PATCH 1/2 csky: Enable generic clockevent broadcast

From: Guo Ren <[email protected]>

When percpu-timers are stopped by deep power saving mode, we need system timer help to broadcast IPI_TIMER.

This is first introduced by broken x86 hardware, where the local apic timer stops in C3 state. But many other architectures(powerpc, mips, arm, hexagon, openrisc, sh) have supported the infrastructure to deal with Power Management issues.

Signed-off-by Guo Ren <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Daniel Lezcano <[email protected]>
---
 arch/csky/Kconfig      |  2 ++
 arch/csky/kernel/smp.c | 17 +++++++++++++++++
 2 files changed, 19 insertions(+)
arch/csky/Kconfig +2 -0
index 34e91224adc3..4328511ac050 100644
@@ -6,6 +6,7 @@ config CSKY
 	select ARCH_HAS_GCOV_PROFILE_ALL
 	select ARCH_HAS_SYNC_DMA_FOR_CPU
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
+	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
 	select ARCH_USE_BUILTIN_BSWAP
 	select ARCH_USE_QUEUED_RWLOCKS
 	select ARCH_WANT_FRAME_POINTERS if !CPU_CK610

@@ -19,6 +20,7 @@ config CSKY
 	select IRQ_DOMAIN
 	select HANDLE_DOMAIN_IRQ
 	select DW_APB_TIMER_OF
+	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 	select GENERIC_IOREMAP
 	select GENERIC_LIB_ASHLDI3
 	select GENERIC_LIB_ASHRDI3
arch/csky/kernel/smp.c +17 -0
index 0f9f5eef9338..76d38d84da70 100644
@@ -8,6 +8,7 @@
 #include <linux/kernel_stat.h>
 #include <linux/notifier.h>
 #include <linux/cpu.h>
+#include <linux/clockchips.h>
 #include <linux/percpu.h>
 #include <linux/delay.h>
 #include <linux/err.h>

@@ -32,6 +33,7 @@ enum ipi_message_type {
 	IPI_RESCHEDULE,
 	IPI_CALL_FUNC,
 	IPI_IRQ_WORK,
+	IPI_TIMER,
 	IPI_MAX
 };
 

@@ -67,6 +69,13 @@ static irqreturn_t handle_ipi(int irq, void *dev)
 			irq_work_run();
 		}
 
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+		if (ops & (1 << IPI_TIMER)) {
+			stats[IPI_TIMER]++;
+			tick_receive_broadcast();
+		}
+#endif
+
 		BUG_ON((ops >> IPI_MAX) != 0);
 	}
 

@@ -102,6 +111,7 @@ static const char * const ipi_names[] = {
 	[IPI_RESCHEDULE]	= "Rescheduling interrupts",
 	[IPI_CALL_FUNC]		= "Function call interrupts",
 	[IPI_IRQ_WORK]		= "Irq work interrupts",
+	[IPI_TIMER]		= "Timer broadcast interrupts",
 };
 
 int arch_show_interrupts(struct seq_file *p, int prec)

@@ -130,6 +140,13 @@ void arch_send_call_function_single_ipi(int cpu)
 	send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
 }
 
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+void tick_broadcast(const struct cpumask *mask)
+{
+	send_ipi_message(mask, IPI_TIMER);
+}
+#endif
+
 static void ipi_stop(void *unused)
 {
 	while (1);
Signature · 7 lines
2.25.1


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author maintainer
#1 lore raw

PATCH 2/2 riscv: Enable generic clockevent broadcast

From: Guo Ren <[email protected]>

When percpu-timers are stopped by deep power saving mode, we need system timer help to broadcast IPI_TIMER.

This is first introduced by broken x86 hardware, where the local apic timer stops in C3 state. But many other architectures(powerpc, mips, arm, hexagon, openrisc, sh) have supported the infrastructure to deal with Power Management issues.

Signed-off-by Guo Ren <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Daniel Lezcano <[email protected]>
Cc Anup Patel <[email protected]>
Cc Atish Patra <[email protected]>
Cc Palmer Dabbelt <[email protected]>
Cc Greentime Hu <[email protected]>
---
 arch/riscv/Kconfig      |  2 ++
 arch/riscv/kernel/smp.c | 16 ++++++++++++++++
 2 files changed, 18 insertions(+)
arch/riscv/Kconfig +2 -0
index 85d626b8ce5e..8637e7344abe 100644
@@ -28,6 +28,7 @@ config RISCV
 	select ARCH_HAS_SET_DIRECT_MAP
 	select ARCH_HAS_SET_MEMORY
 	select ARCH_HAS_STRICT_KERNEL_RWX if MMU
+	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
 	select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
 	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU

@@ -39,6 +40,7 @@ config RISCV
 	select EDAC_SUPPORT
 	select GENERIC_ARCH_TOPOLOGY if SMP
 	select GENERIC_ATOMIC64 if !64BIT
+	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 	select GENERIC_EARLY_IOREMAP
 	select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO
 	select GENERIC_IOREMAP
arch/riscv/kernel/smp.c +16 -0
index ea028d9e0d24..8325d33411d8 100644
@@ -9,6 +9,7 @@
  */
 
 #include <linux/cpu.h>
+#include <linux/clockchips.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/profile.h>

@@ -27,6 +28,7 @@ enum ipi_message_type {
 	IPI_CALL_FUNC,
 	IPI_CPU_STOP,
 	IPI_IRQ_WORK,
+	IPI_TIMER,
 	IPI_MAX
 };
 

@@ -176,6 +178,12 @@ void handle_IPI(struct pt_regs *regs)
 			irq_work_run();
 		}
 
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+		if (ops & (1 << IPI_TIMER)) {
+			stats[IPI_TIMER]++;
+			tick_receive_broadcast();
+		}
+#endif
 		BUG_ON((ops >> IPI_MAX) != 0);
 
 		/* Order data access and bit testing. */

@@ -192,6 +200,7 @@ static const char * const ipi_names[] = {
 	[IPI_CALL_FUNC]		= "Function call interrupts",
 	[IPI_CPU_STOP]		= "CPU stop interrupts",
 	[IPI_IRQ_WORK]		= "IRQ work interrupts",
+	[IPI_TIMER]		= "Timer broadcast interrupts",
 };
 
 void show_ipi_stats(struct seq_file *p, int prec)

@@ -217,6 +226,13 @@ void arch_send_call_function_single_ipi(int cpu)
 	send_ipi_single(cpu, IPI_CALL_FUNC);
 }
 
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+void tick_broadcast(const struct cpumask *mask)
+{
+	send_ipi_mask(mask, IPI_TIMER);
+}
+#endif
+
 void smp_send_stop(void)
 {
 	unsigned long timeout;
Signature · 7 lines
2.25.1


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Reviewed-by on v1 2/2
#2 lore raw

Re: [PATCH 2/2] riscv: Enable generic clockevent broadcast

Quoted 11 lines · On Sun, Mar 7, 2021 at 7:55 AM <[email protected]> wrote:

From: Guo Ren <[email protected]>

When percpu-timers are stopped by deep power saving mode, we need system timer help to broadcast IPI_TIMER.

This is first introduced by broken x86 hardware, where the local apic timer stops in C3 state. But many other architectures(powerpc, mips, arm, hexagon, openrisc, sh) have supported the infrastructure to deal with Power Management issues.

Quoted 8 lines
Signed-off-by Guo Ren <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Daniel Lezcano <[email protected]>
Cc Anup Patel <[email protected]>
Cc Atish Patra <[email protected]>
Cc Palmer Dabbelt <[email protected]>
Cc Greentime Hu <[email protected]>

Looks good to me.

Reviewed-by Anup Patel <[email protected]>

Regards,
Anup

Quoted 84 lines
---
 arch/riscv/Kconfig      |  2 ++
 arch/riscv/kernel/smp.c | 16 ++++++++++++++++
 2 files changed, 18 insertions(+)
arch/riscv/Kconfig +2 -0
index 85d626b8ce5e..8637e7344abe 100644
@@ -28,6 +28,7 @@ config RISCV
        select ARCH_HAS_SET_DIRECT_MAP
        select ARCH_HAS_SET_MEMORY
        select ARCH_HAS_STRICT_KERNEL_RWX if MMU
+       select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
        select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
        select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
        select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU

@@ -39,6 +40,7 @@ config RISCV
        select EDAC_SUPPORT
        select GENERIC_ARCH_TOPOLOGY if SMP
        select GENERIC_ATOMIC64 if !64BIT
+       select GENERIC_CLOCKEVENTS_BROADCAST if SMP
        select GENERIC_EARLY_IOREMAP
        select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO
        select GENERIC_IOREMAP
arch/riscv/kernel/smp.c +16 -1
index ea028d9e0d24..8325d33411d8 100644
@@ -9,6 +9,7 @@
  */
 
 #include <linux/cpu.h>
+#include <linux/clockchips.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/profile.h>

@@ -27,6 +28,7 @@ enum ipi_message_type {
        IPI_CALL_FUNC,
        IPI_CPU_STOP,
        IPI_IRQ_WORK,
+       IPI_TIMER,
        IPI_MAX
 };
 

@@ -176,6 +178,12 @@ void handle_IPI(struct pt_regs *regs)
                        irq_work_run();
                }
 
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+               if (ops & (1 << IPI_TIMER)) {
+                       stats[IPI_TIMER]++;
+                       tick_receive_broadcast();
+               }
+#endif
                BUG_ON((ops >> IPI_MAX) != 0);
 
                /* Order data access and bit testing. */

@@ -192,6 +200,7 @@ static const char * const ipi_names[] = {
        [IPI_CALL_FUNC]         = "Function call interrupts",
        [IPI_CPU_STOP]          = "CPU stop interrupts",
        [IPI_IRQ_WORK]          = "IRQ work interrupts",
+       [IPI_TIMER]             = "Timer broadcast interrupts",
 };
 
 void show_ipi_stats(struct seq_file *p, int prec)

@@ -217,6 +226,13 @@ void arch_send_call_function_single_ipi(int cpu)
        send_ipi_single(cpu, IPI_CALL_FUNC);
 }
 
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+void tick_broadcast(const struct cpumask *mask)
+{
+       send_ipi_mask(mask, IPI_TIMER);
+}
+#endif
+
 void smp_send_stop(void)
 {
        unsigned long timeout;
--

2.25.1

Quoted 4 lines

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#3 lore raw

Re: [PATCH 2/2] riscv: Enable generic clockevent broadcast

In reply to [email protected]
Quoted 88 lines · On Sat, 06 Mar 2021 18:24:46 PST (-0800), [email protected] wrote:

From: Guo Ren <[email protected]>

When percpu-timers are stopped by deep power saving mode, we need system timer help to broadcast IPI_TIMER.

This is first introduced by broken x86 hardware, where the local apic timer stops in C3 state. But many other architectures(powerpc, mips, arm, hexagon, openrisc, sh) have supported the infrastructure to deal with Power Management issues.

Signed-off-by Guo Ren <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Daniel Lezcano <[email protected]>
Cc Anup Patel <[email protected]>
Cc Atish Patra <[email protected]>
Cc Palmer Dabbelt <[email protected]>
Cc Greentime Hu <[email protected]>
---
 arch/riscv/Kconfig      |  2 ++
 arch/riscv/kernel/smp.c | 16 ++++++++++++++++
 2 files changed, 18 insertions(+)
arch/riscv/Kconfig +2 -0
index 85d626b8ce5e..8637e7344abe 100644
@@ -28,6 +28,7 @@ config RISCV
 	select ARCH_HAS_SET_DIRECT_MAP
 	select ARCH_HAS_SET_MEMORY
 	select ARCH_HAS_STRICT_KERNEL_RWX if MMU
+	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
 	select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
 	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU

@@ -39,6 +40,7 @@ config RISCV
 	select EDAC_SUPPORT
 	select GENERIC_ARCH_TOPOLOGY if SMP
 	select GENERIC_ATOMIC64 if !64BIT
+	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 	select GENERIC_EARLY_IOREMAP
 	select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO
 	select GENERIC_IOREMAP
arch/riscv/kernel/smp.c +9 -0
index ea028d9e0d24..8325d33411d8 100644
@@ -9,6 +9,7 @@
  */
 
 #include <linux/cpu.h>
+#include <linux/clockchips.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/profile.h>

@@ -27,6 +28,7 @@ enum ipi_message_type {
 	IPI_CALL_FUNC,
 	IPI_CPU_STOP,
 	IPI_IRQ_WORK,
+	IPI_TIMER,
 	IPI_MAX
 };
 

@@ -176,6 +178,12 @@ void handle_IPI(struct pt_regs *regs)
 			irq_work_run();
 		}
 
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+		if (ops & (1 << IPI_TIMER)) {
+			stats[IPI_TIMER]++;
+			tick_receive_broadcast();
+		}
+#endif
 		BUG_ON((ops >> IPI_MAX) != 0);
 
 		/* Order data access and bit testing. */

@@ -192,6 +200,7 @@ static const char * const ipi_names[] = {
 	[IPI_CALL_FUNC]		= "Function call interrupts",
 	[IPI_CPU_STOP]		= "CPU stop interrupts",
 	[IPI_IRQ_WORK]		= "IRQ work interrupts",
+	[IPI_TIMER]		= "Timer broadcast interrupts",
 };
 
 void show_ipi_stats(struct seq_file *p, int prec)

@@ -217,6 +226,13 @@ void arch_send_call_function_single_ipi(int cpu)
 	send_ipi_single(cpu, IPI_CALL_FUNC);
 }

arch/riscv/kernel/smp.c void arch_send_call_function_single_ipi(int cpu) · line 238

Quoted 10 lines
arch/riscv/kernel/smp.c +7 -0
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+void tick_broadcast(const struct cpumask *mask)
+{
+	send_ipi_mask(mask, IPI_TIMER);
+}
+#endif
+
 void smp_send_stop(void)
 {
 	unsigned long timeout;

Thanks, this is on for-next.

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Acked-by on v1 1/2
#4 lore raw
In reply to [email protected]
Quoted 10 lines · On 07/03/2021 03:24, [email protected] wrote:

From: Guo Ren <[email protected]>

When percpu-timers are stopped by deep power saving mode, we need system timer help to broadcast IPI_TIMER.

This is first introduced by broken x86 hardware, where the local apic timer stops in C3 state. But many other architectures(powerpc, mips, arm, hexagon, openrisc, sh) have supported the infrastructure to deal with Power Management issues.

Quoted 5 lines
Signed-off-by Guo Ren <[email protected]>
Cc Arnd Bergmann <[email protected]>
Cc Thomas Gleixner <[email protected]>
Cc Daniel Lezcano <[email protected]>

---

Acked-by Daniel Lezcano <[email protected]>
Signature · 10 lines
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