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arm64: dts: sc7280: Add qspi, qupv3_0 and qupv3_1 nodes

PATCH In review Roja Rani Yarubandi 3 participants 4 messages Apr 22, 2021 – May 25, 2021

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PATCH v2 1/1 arm64: dts: sc7280: Add qspi, qupv3_0 and qupv3_1 nodes

Add QSPI and QUP SE instances configuration for sc7280.

---
Changes in V2:
- As per Doug's comments removed pinmux/pinconf subnodes.
- As per Doug's comments split of SPI, UART nodes has been done.
- Moved QSPI node before aps_smmu as per the order.

This patch depends on interconnect changes [1]
[1] https://lore.kernel.org/patchwork/project/lkml/list/?series=488429

 arch/arm64/boot/dts/qcom/sc7280-idp.dts |  131 +-
 arch/arm64/boot/dts/qcom/sc7280.dtsi    | 2377 +++++++++++++++++++----
 2 files changed, 2089 insertions(+), 419 deletions(-)
arch/arm64/boot/dts/qcom/sc7280-idp.dts +123 -8
index 54d2cb365b71..b1e948a72eb1 100644
@@ -15,6 +15,7 @@ / {
 
 	aliases {
 		serial0 = &uart5;
+		hsuart0 = &uart7;
 	};
 
 	chosen {
@@ -234,26 +235,140 @@ vreg_l6e_0p8: ldo6 {
 	};
 };
 
+&qspi {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+
+		/* TODO: Increase frequency after testing */
+		spi-max-frequency = <25000000>;
+		spi-tx-bus-width = <2>;
+		spi-rx-bus-width = <2>;
+	};
+};
+
 &qupv3_id_0 {
 	status = "okay";
 };
 
+&qupv3_id_1 {
+	status = "okay";
+};
+
 &uart5 {
 	status = "okay";
 };
 
+&uart7 {
+	status = "okay";
+
+	/delete-property/interrupts;
+	interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
+				<&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
+	pinctrl-names = "default", "sleep";
+	pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
+};
+
 /* PINCTRL - additions to nodes defined in sc7280.dtsi */
 
-&qup_uart5_default {
-	tx {
-		pins = "gpio46";
-		drive-strength = <2>;
-		bias-disable;
+&qspi_cs0 {
+	bias-disable;
+};
+
+&qspi_clk {
+	bias-disable;
+};
+
+&qspi_data01 {
+	/* High-Z when no transfers; nice to park the lines */
+	bias-pull-up;
+};
+
+&qup_uart5_tx {
+	drive-strength = <2>;
+	bias-disable;
+};
+
+&qup_uart5_rx {
+	drive-strength = <2>;
+	bias-pull-up;
+};
+
+&qup_uart7_cts {
+	/*
+	 * Configure a pull-down on CTS to match the pull of
+	 * the Bluetooth module.
+	 */
+	bias-pull-down;
+};
+
+&qup_uart7_rts {
+	/* We'll drive RTS, so no pull */
+	drive-strength = <2>;
+	bias-disable;
+};
+
+&qup_uart7_tx {
+	/* We'll drive TX, so no pull */
+	drive-strength = <2>;
+	bias-disable;
+};
+
+&qup_uart7_rx {
+	/*
+	 * Configure a pull-up on RX. This is needed to avoid
+	 * garbage data when the TX pin of the Bluetooth module is
+	 * in tri-state (module powered off or not driving the
+	 * signal yet).
+	 */
+	bias-pull-up;
+};
+
+&tlmm {
+	qup_uart7_sleep_cts: qup-uart7-sleep-cts {
+		pins = "gpio28";
+		function = "gpio";
+		/*
+		 * Configure a pull-down on CTS to match the pull of
+		 * the Bluetooth module.
+		 */
+		bias-pull-down;
+	};
+
+	qup_uart7_sleep_rts: qup-uart7-sleep-rts {
+		pins = "gpio29";
+		function = "gpio";
+		/*
+		 * Configure pull-down on RTS. As RTS is active low
+		 * signal, pull it low to indicate the BT SoC that it
+		 * can wakeup the system anytime from suspend state by
+		 * pulling RX low (by sending wakeup bytes).
+		 */
+		bias-pull-down;
+	};
+
+	qup_uart7_sleep_tx: qup-uart7-sleep-tx {
+		pins = "gpio30";
+		function = "gpio";
+		/*
+		 * Configure pull-up on TX when it isn't actively driven
+		 * to prevent BT SoC from receiving garbage during sleep.
+		 */
+		bias-pull-up;
 	};
 
-	rx {
-		pins = "gpio47";
-		drive-strength = <2>;
+	qup_uart7_sleep_rx: qup-uart7-sleep-rx {
+		pins = "gpio31";
+		function = "gpio";
+		/*
+		 * Configure a pull-up on RX. This is needed to avoid
+		 * garbage data when the TX pin of the Bluetooth module
+		 * is floating which may cause spurious wakeups.
+		 */
 		bias-pull-up;
 	};
 };
arch/arm64/boot/dts/qcom/sc7280.dtsi +1966 -411

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QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation
#1 lore raw
Thank you for the patch! Yet something to improve:

Hi Roja,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on next-20210422]
[cannot apply to robh/for-next v5.12-rc8 v5.12-rc7 v5.12-rc6 v5.12-rc8] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Roja-Rani-Yarubandi/arm64-dts-sc7280-Add-qspi-qupv3_0-and-qupv3_1-nodes/20210422-230756
base:    c457d9676496f5a895509f9c510278beaaffc829
config: arm64-randconfig-r012-20210421 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project f5446b769a7929806f72256fccd4826d66502e59)

reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# https://github.com/0day-ci/linux/commit/78ed1b1d4c9f34dd06ae4494b78d70334fa8d7c1
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Roja-Rani-Yarubandi/arm64-dts-sc7280-Add-qspi-qupv3_0-and-qupv3_1-nodes/20210422-230756 git checkout 78ed1b1d4c9f34dd06ae4494b78d70334fa8d7c1
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=arm64

If you fix the issue, kindly add following tag as appropriate

All errors (new ones prefixed by >>):

>> Error: arch/arm64/boot/dts/qcom/sc7280.dtsi:325.31-32 syntax error

FATAL ERROR: Unable to parse input tree

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

#2 lore raw
Quoted 33 lines · kernel test robot

Hi Roja,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on next-20210422]
[cannot apply to robh/for-next v5.12-rc8 v5.12-rc7 v5.12-rc6 v5.12-rc8] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Roja-Rani-Yarubandi/arm64-dts-sc7280-Add-qspi-qupv3_0-and-qupv3_1-nodes/20210422-230756
base: c457d9676496f5a895509f9c510278beaaffc829
config: arm64-randconfig-r012-20210421 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project
f5446b769a7929806f72256fccd4826d66502e59)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross
-O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
#
https://github.com/0day-ci/linux/commit/78ed1b1d4c9f34dd06ae4494b78d70334fa8d7c1
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review
Roja-Rani-Yarubandi/arm64-dts-sc7280-Add-qspi-qupv3_0-and-qupv3_1-nodes/20210422-230756
git checkout 78ed1b1d4c9f34dd06ae4494b78d70334fa8d7c1
# save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1
ARCH=arm64

Quoted 8 lines

If you fix the issue, kindly add following tag as appropriate

All errors (new ones prefixed by >>):

Quoted 1 line
Quoted 1 line

Error: arch/arm64/boot/dts/qcom/sc7280.dtsi:325.31-32 syntax error

FATAL ERROR: Unable to parse input tree

This error is due to "clk_virt" node parse issue which will be defined in ICC patches
https://lore.kernel.org/patchwork/project/lkml/list/?series=488429
I also mentioned the dependency in the patch.

Quoted 3 lines

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

#3 lore raw
Quoted 42 lines · rojay(a)codeaurora.org
Quoted 41 lines · kernel test robot

Hi Roja,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on next-20210422]
[cannot apply to robh/for-next v5.12-rc8 v5.12-rc7 v5.12-rc6 v5.12-rc8] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Roja-Rani-Yarubandi/arm64-dts-sc7280-Add-qspi-qupv3_0-and-qupv3_1-nodes/20210422-230756

base:    c457d9676496f5a895509f9c510278beaaffc829
config: arm64-randconfig-r012-20210421 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project
f5446b769a7929806f72256fccd4826d66502e59)
reproduce (this is a W=1 build):
        wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross
-O ~/bin/make.cross
        chmod +x ~/bin/make.cross

        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        #
https://github.com/0day-ci/linux/commit/78ed1b1d4c9f34dd06ae4494b78d70334fa8d7c1 

        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Roja-Rani-Yarubandi/arm64-dts-sc7280-Add-qspi-qupv3_0-and-qupv3_1-nodes/20210422-230756

        git checkout 78ed1b1d4c9f34dd06ae4494b78d70334fa8d7c1

        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1
ARCH=arm64

If you fix the issue, kindly add following tag as appropriate

All errors (new ones prefixed by >>):

Quoted 8 lines
Quoted 3 lines
Quoted 1 line
Quoted 1 line

Error: arch/arm64/boot/dts/qcom/sc7280.dtsi:325.31-32 syntax error

   FATAL ERROR: Unable to parse input tree

This error is due to "clk_virt" node parse issue which will be defined in ICC patches
https://lore.kernel.org/patchwork/project/lkml/list/?series=488429
I also mentioned the dependency in the patch.

Hi Roja,

Thanks for the clarification, we can parse the base commit from patch to avoid false positive:

     $ man git format-patch

         With git format-patch --base=P -3 C (or variants thereof, e.g.
with --cover-letter or using Z..C instead of -3 C to specify the range), the base tree information block is shown at the end of the first message the command outputs (either the first patch, or the cover
       letter), like this:

           base-commit: P
           prerequisite-patch-id: X
           prerequisite-patch-id: Y
           prerequisite-patch-id: Z

Best Regards,
Rong Chen