hwmon: sbrmi: Add support for sbrmi power module
Subsystems (3)
PATCH 1/3 hwmon: sbrmi: Add support for sbrmi power module
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the Remote Management Interface (SB-Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to report power consumption and power limits of the CPU socket.
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the board management controller (BMC) to the CPU.
--- drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 394 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 405 insertions(+) create mode 100644 drivers/hwmon/sbrmi.c
drivers/hwmon/Kconfig +10 -0
@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST
drivers/hwmon/Makefile +1 -0
@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.o
drivers/hwmon/sbrmi.c new file +394 -0
394 lines not on this page · raw message
Signature · 1 line
2.17.1
PATCH 2/3 hwmon: sbrmi: Add Documentation
From: Akshay Gupta <[email protected]>
- Add documentation for sbrmi module
--- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/sbrmi.rst | 79 +++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) create mode 100644 Documentation/hwmon/sbrmi.rst
Documentation/hwmon/index.rst +1 -0
@@ -158,6 +158,7 @@ Hardware Monitoring Kernel Drivers q54sj108a2 raspberrypi-hwmon sbtsi_temp + sbrmi sch5627 sch5636 scpi-hwmon
Documentation/hwmon/sbrmi.rst new file +79 -0
79 lines not on this page · raw message
Signature · 1 line
2.17.1
Guenter Roeck
maintainerRe: [PATCH 2/3] hwmon: sbrmi: Add Documentation
Quoted 77 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
- Add documentation for sbrmi module
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>--- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/sbrmi.rst | 79 +++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) create mode 100644 Documentation/hwmon/sbrmi.rstDocumentation/hwmon/index.rst +1
-0@@ -158,6 +158,7 @@ Hardware Monitoring Kernel Drivers q54sj108a2 raspberrypi-hwmon sbtsi_temp + sbrmi sch5627 sch5636 scpi-hwmonDocumentation/hwmon/sbrmi.rst new file +47
-0@@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver sbrmi +=================== + +Supported hardware: + + * Sideband Remote Management Interface (SB-RMI) compliant AMD SoC + device connected to the BMC via the APML. + + Prefix: 'sbrmi' + + Addresses scanned: This driver doesn't support address scanning. + + To instantiate this driver on an AMD CPU with SB-RMI + support, the i2c bus number would be the bus connected from the board + management controller (BMC) to the CPU. + The SMBus address is really 7 bits. Some vendors and the SMBus + specification show the address as 8 bits, left justified with the R/W + bit as a write (0) making bit 0. Some vendors use only the 7 bits + to describe the address. + As mentioned in AMD's APML specification, The SB-RMI address is + normally 78h(0111 100W) or 3Ch(011 1100) for socket 0 and 70h(0111 000W) + or 38h(011 1000) for socket 1, but it could vary based on hardware + address select pins. + + Datasheet: The SB-RMI interface and protocol along with the Advanced + Platform Management Link (APML) Specification is available + as part of the open source SoC register reference at: + + https://www.amd.com/en/support/tech-docs?keyword=55898 + +Author: Akshay Gupta <[email protected]> + +Description +----------- + +The APML provides a way to communicate with the SB Remote Management interface +(SB-RMI) module from the external SMBus master that can be used to report socket +power on AMD platforms using mailbox command and resembles a typical 8-pin remote +power sensor's I2C interface to BMC. + +This driver implements current power with power cap and power cap max. + +sysfs-Interface +--------------- +Power sensors can be queried and set via the standard ``hwmon`` interface
Documentation/hwmon/sbrmi.rst line 57
Quoted 10 lines
Documentation/hwmon/sbrmi.rst new file +10
-0+on ``sysfs``, under the directory ``/sys/class/hwmon/hwmonX`` for some value +of ``X`` (search for the ``X`` such that ``/sys/class/hwmon/hwmonX/name`` has +content ``sbrmi``) + +================ ===== ======================================================== +Name Perm Description +================ ===== ======================================================== +power#_input RO Current Power consumed +power#_cap RW Power limit can be set between 0 and power#_cap_max +power#_cap_max RO Maximum powerlimit calculated and reported by the SMU FW
'#' is always '1', so just say so.
Quoted 22 lines
Documentation/hwmon/sbrmi.rst new file +22
-0+================ ===== ======================================================== + +The following example show how the 'Power' attribute from the i2c-addresses +can be monitored using the userspace utilities like ``sensors`` binary:: + + # sensors + sbrmi-i2c-1-38 + Adapter: bcm2835 I2C adapter + power1: 61.00 W (cap = 225.00 W) + + sbrmi-i2c-1-3c + Adapter: bcm2835 I2C adapter + power1: 28.39 W (cap = 224.77 W) + # + +Also, Below shows how get and set the values from sysfs entries individually:: + # cat /sys/class/hwmon/hwmon1/power1_cap_max + 225000000 + + # echo 180000000 > /sys/class/hwmon/hwmon1/power1_cap + # cat /sys/class/hwmon/hwmon1/power1_cap + 180000000
PATCH 3/3 dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings
In reply to Naveen Krishna ChatradhiFrom: Akshay Gupta <[email protected]>
- Document device tree bindings for AMD SB-RMI emulated service.
--- .../devicetree/bindings/hwmon/amd,sbrmi.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml
Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml new file +53 -0
@@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/amd,sbrmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: > + Sideband Remote Management Interface (SB-RMI) compliant + AMD SoC power device. + +maintainers: + - Akshay Gupta <[email protected]> + +description: | + SB Remote Management Interface (SB-RMI) is an SMBus compatible + interface that reports AMD SoC's Power (normalized Power) using, + Mailbox Service Request and resembles a typical 8-pin remote power + sensor's I2C interface to BMC. The power attributes in hwmon + reports power in microwatts. + +properties: + compatible: + enum: + - amd,sbrmi + + reg: + maxItems: 1 + description: | + I2C bus address of the device as specified in Section SBI SMBus Address + of the SoC register reference. The SB-RMI address is normally 78h for + socket 0 and 70h for socket 1, but it could vary based on hardware + address select pins. + \[open source SoC register reference\] + https://www.amd.com/en/support/tech-docs?keyword=55898 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + sbrmi@3c { + compatible = "amd,sbrmi"; + reg = <0x3c>; + }; + }; +...
Signature · 1 line
2.17.1
Guenter Roeck
maintainerQuoted 3 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management
This is a bit too long for checkpatch.
Quoted 7 lines
Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the Remote Management Interface (SB-Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to report power consumption and power limits of the CPU socket.
Quoted 6 lines
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the board management controller (BMC) to the CPU.
This is a bit vague. Would this driver be instantiated on the host CPU or on the BMC ?
Quoted 54 lines
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>--- drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 394 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 405 insertions(+)create mode 100644
drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TESTdrivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file +6
-0@@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc.
drivers/hwmon/sbrmi.c line 16
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+*/ + +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> +#include <linux/of_device.h>
I don't immediately see why this include is needed.
drivers/hwmon/sbrmi.c line 17
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <asm-generic/ioctl.h>
This looks wrong, and I don't immediately see why it would be needed.
drivers/hwmon/sbrmi.c line 18
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <linux/delay.h>
Alphabetic include file order, please.
drivers/hwmon/sbrmi.c line 24
Quoted 6 lines
drivers/hwmon/sbrmi.c new file +6
-0+ +/* Do not allow setting negative power limit */ +#define SBRMI_PWR_MIN 0 +/* Mask for Status Register bit[1] */ +#define SW_ALERT_MASK 0x2 +
Please always use
#define<space>DEFINITION<tab>value
^^^^^Quoted 32 lines
drivers/hwmon/sbrmi.c new file +32
-0+/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 , +SBRMI_INBNDMSG3 ,
drivers/hwmon/sbrmi.c line 66
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , + SBRMI_SW_INTERRUPT, +}; + +/* +* Each client has this additional data +*/
Please be consistent with comments: This does not really need to be a multi-line comment. While that does not really matter, you use a single-line comment to describe the next structure. Please make it both either single-line or multi-line.
drivers/hwmon/sbrmi.c line 75
Quoted 9 lines
drivers/hwmon/sbrmi.c new file +9
-0+struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +}; + +/* Mailbox message data format */ +union mailbox_word { +u8 bytes[4 ]; +u32 value;
That strongly suggests that the driver will only work on either little-endian or big-endian systems, depending on the byte order of transfers. Please restrict it accordingly.
drivers/hwmon/sbrmi.c line 86
Quoted 11 lines
drivers/hwmon/sbrmi.c new file +11
-0+}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +union mailbox_word data_in; +union mailbox_word data_out; +}; + +static int print_mailbox_error (struct sbrmi_data *data) +{
Nit> Many functions only use data>client and, in some cases, dereference it several times. It might be easier to just pass 'client'.
drivers/hwmon/sbrmi.c line 91
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+int status; + +/* Mailbox error code will be written by Firmware in +* SBRMI::OutBndMsg_inst7 (SBRMI_x37) +*/
/*
* Please use standard multi-line comments. Applies to entire driver. */
Quoted 11 lines
drivers/hwmon/sbrmi.c new file +11
-0+ status =i2c_smbus_read_byte_data (data->client,SBRMI_OUTBNDMSG7 ); +if (status <0 ) { +pr_err ("SMBUS translation failed\n" ); +return status; + } + +switch (status) { +case 0x0 :/* Success */ +break ; +case 0x1 : +pr_err ("Mailbox message command is aborted\n" );
drivers/hwmon/sbrmi.c line 112
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+break ; +case 0x2 : +pr_err ("Unknown mailbox message\n" ); +break ; +case 0x3 : +pr_err ("Invalid core is specified in mailbox message parameters\n" ); +break ; +default : +pr_err ("Unknown Error\n" ); + }
Is this noise necessary ? I am concerned that, if it occurs, it would be persistent and fill up the kernel log with noise.
drivers/hwmon/sbrmi.c line 114
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ +return status;
Error codes are supposed to be negative and standard Linux error codes. Please convert the above errors to standard Linux error codes.
Quoted 17 lines
drivers/hwmon/sbrmi.c new file +17
-0+} + +static int sbrmi_enable_alert (struct sbrmi_data *data) +{ +int ctrl; + +/* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (data->client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; +return i2c_smbus_write_byte_data (data->client, +SBRMI_CTRL , ctrl);
drivers/hwmon/sbrmi.c line 141
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) +{ +union mailbox_word output, input; +int i, err =0 , retry =10 ;
Initializing 'err' is unnecessary.
Quoted 17 lines
drivers/hwmon/sbrmi.c new file +17
-0+int sw_status; + +mutex_lock (&data->lock); + + err =sbrmi_enable_alert (data); +if (err <0 ) + goto exit_unlock; + +/* Indicate firmware a command is to be serviced */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (err <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd);
drivers/hwmon/sbrmi.c line 168
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+if (err <0 ) + goto exit_mod; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ + input = msg->data_in; +for (i =0 ; i <3 ; i++) {
This writes 3 bytes. Is that on purpose ? If so please explain since the above suggests that 4 bytes should be written.
drivers/hwmon/sbrmi.c line 170
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ err = i2c_smbus_write_byte_data(data->client, + (SBRMI_INBNDMSG1 + i),
Unnecessary ( )
Quoted 23 lines
drivers/hwmon/sbrmi.c new file +23
-0+ input.bytes[i]); +if (err <0 ) + goto exit_mod; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (err <0 ) + goto exit_mod; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/ + do { + sw_status = i2c_smbus_read_byte_data(data->client, + SBRMI_STATUS); + if (sw_status < 0) {
drivers/hwmon/sbrmi.c line 203
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ err = sw_status; + goto exit_mod; + } +if (sw_status &SW_ALERT_MASK ) +break ; +usleep_range (50 ,100 ); + }while (retry--); + +if (retry <0 ) { +pr_err ("Firmware fail to indicate command colmpletion\n" );
completion
drivers/hwmon/sbrmi.c line 216
Quoted 13 lines
drivers/hwmon/sbrmi.c new file +13
-0+ err =-1 ; + goto exit_mod; + } + +/* +* For a read operation, the initiator (BMC) reads the firmware response +* Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + output.bytes[i] =i2c_smbus_read_byte_data (data->client, + (SBRMI_OUTBNDMSG1 + i));
Unnecessary ().
drivers/hwmon/sbrmi.c line 217
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+if (output.bytes[i] <0 ) {
output.bytes is defined as u8. This will not catch errors.
drivers/hwmon/sbrmi.c line 230
Quoted 13 lines
drivers/hwmon/sbrmi.c new file +13
-0+ err = output.bytes[i]; + goto exit_mod; + } + } + } + msg->data_out = output; + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + err =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + (sw_status |SW_ALERT_MASK ));
Unnecessary ().
Quoted 109 lines
drivers/hwmon/sbrmi.c new file +109
-0+ +exit_mod: +if (err <0 ) +pr_err ("SMBUS translation failed\n" ); +else + err =print_mailbox_error (data); +exit_unlock: +mutex_unlock (&data->lock); +return err; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) +{ +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +default : +return -EINVAL ; + } +/* +* hwmon power attributes are in microWatt +*/ + *val = (long )msg.data_out.value *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) +{ +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; + +if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.data_in.value =0 ; + msg.read = true; +rmi_mailbox_xfer (data, &msg); + + val =clamp_val (val,SBRMI_PWR_MIN , msg.data_out.value); + + msg.cmd =SBRMI_WRITE_PKG_PWR_LIMIT ; + msg.data_in.value = val; + msg.read = false; + +return rmi_mailbox_xfer (data, &msg); +} + +static umode_t sbrmi_is_visible (const void *data, +enum hwmon_sensor_types type, +u32 attr,int channel) +{ +switch (type) { +case hwmon_power: +switch (attr) { +case hwmon_power_input: +case hwmon_power_cap_max: +return 0444 ; +case hwmon_power_cap: +return 0644 ; + } +break ; +default : +break ; + } +return 0 ; +} + +static const struct hwmon_channel_info *sbrmi_info[] = { +HWMON_CHANNEL_INFO (power, +HWMON_P_INPUT |HWMON_P_CAP |HWMON_P_CAP_MAX ), +NULL +}; + +static const struct hwmon_ops sbrmi_hwmon_ops = { + .is_visible = sbrmi_is_visible, + .read = sbrmi_read, + .write = sbrmi_write, +}; + +static const struct hwmon_chip_info sbrmi_chip_info = { + .ops = &sbrmi_hwmon_ops, + .info = sbrmi_info, +};
drivers/hwmon/sbrmi.c line 349
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ +static int sbrmi_probe (struct i2c_client *client, +const struct i2c_device_id *id) +{ +struct device *dev = &client->dev; +struct device *hwmon_dev; +struct sbrmi_data *data; + +if (!i2c_check_functionality (client->adapter,I2C_FUNC_I2C )) { +dev_err (&client->dev,"adapter does not support true I2C\n" );
Why would that matter? It only uses SMBus functions.
Quoted 46 lines
drivers/hwmon/sbrmi.c new file +45
-0+return -ENODEV ; + } + + data =devm_kzalloc (dev,sizeof (struct sbrmi_data ),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->client = client; +mutex_init (&data->lock); + + hwmon_dev =devm_hwmon_device_register_with_info (dev, client->name, data, + &sbrmi_chip_info,NULL ); + +return PTR_ERR_OR_ZERO (hwmon_dev); +} + +static const struct i2c_device_id sbrmi_id[] = { + {"sbrmi" ,0 }, + {} +}; +MODULE_DEVICE_TABLE (i2c, sbrmi_id); + +static const struct of_device_id __maybe_unused sbrmi_of_match[] = { + { + .compatible ="amd,sbrmi" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, sbrmi_of_match); + +static struct i2c_driver sbrmi_driver = { + .class =I2C_CLASS_HWMON , + .driver = { + .name ="sbrmi" , + .of_match_table =of_match_ptr (sbrmi_of_match), + }, + .probe = sbrmi_probe, + .id_table = sbrmi_id, +}; + +module_i2c_driver (sbrmi_driver); + +MODULE_AUTHOR ("Akshay Gupta <[email protected]>" ); +MODULE_DESCRIPTION ("Hwmon driver for AMD SB-RMI emulated sensor" ); +MODULE_LICENSE ("GPL" );
[AMD Official Use Only]
Hi Guenter,
-----Original Message-----
From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
Sent: Monday, June 28, 2021 8:29 PM
To: Chatradhi, Naveen Krishna <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: Re: [PATCH 1/3] hwmon: sbrmi: Add support for sbrmi power module
[CAUTION: External Email]
Quoted 4 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management
This is a bit too long for checkpatch.
Quoted 7 lines
Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the Remote Management Interface (SB-Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to report power consumption and power limits of the CPU socket.
Quoted 6 lines
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the board management controller (BMC) to the CPU.
This is a bit vague. Would this driver be instantiated on the host CPU or on the BMC ?
Quoted 53 lines
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>--- drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 394 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 405 insertions(+)create mode 100644
drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig index renamed from drivers/hwmon/Kconfig +0
-0
87624902ea80..d1813ea8382c100644drivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST diff --gita/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index
59e78bc212cf..8031acf58936100644drivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file renamed from drivers/hwmon/sbrmi.c +0
-0mode 100644 index 000000000000..c35829513459
drivers/hwmon/sbrmi.c new file +6
-0@@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc.
drivers/hwmon/sbrmi.c line 16
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+*/ + +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> +#include <linux/of_device.h>
I don't immediately see why this include is needed.
drivers/hwmon/sbrmi.c line 17
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <asm-generic/ioctl.h>
This looks wrong, and I don't immediately see why it would be needed.
drivers/hwmon/sbrmi.c line 18
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <linux/delay.h>
Alphabetic include file order, please.
drivers/hwmon/sbrmi.c line 23
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+ +/* Do not allow setting negative power limit */ #define SBRMI_PWR_MIN +0 +/* Mask for Status Register bit[1] */ #define SW_ALERT_MASK 0x2 +
Please always use
#define<space>DEFINITION<tab>value
^^^^^Quoted 32 lines
drivers/hwmon/sbrmi.c new file +32
-0+/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power +management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 ,
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+SBRMI_INBNDMSG3 , +SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , + SBRMI_SW_INTERRUPT, +}; + +/* +* Each client has this additional data */
Please be consistent with comments: This does not really need to be a multi-line comment. While that does not really matter, you use a single-line comment to describe the next structure. Please make it both either single-line or multi-line.
drivers/hwmon/sbrmi.c line 75
Quoted 9 lines
drivers/hwmon/sbrmi.c new file +9
-0+struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +}; + +/* Mailbox message data format */ +union mailbox_word { +u8 bytes[4 ]; +u32 value;
That strongly suggests that the driver will only work on either little-endian or big-endian systems, depending on the byte order of transfers. Please restrict it accordingly.
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +union mailbox_word data_in; +union mailbox_word data_out; +}; + +static int print_mailbox_error (struct sbrmi_data *data) {
Nit> Many functions only use data>client and, in some cases, dereference Nit> it
several times. It might be easier to just pass 'client'.
drivers/hwmon/sbrmi.c line 91
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+int status; + +/* Mailbox error code will be written by Firmware in +* SBRMI::OutBndMsg_inst7 (SBRMI_x37) +*/
/*
* Please use standard multi-line comments. Applies to entire driver. */
Quoted 11 lines
drivers/hwmon/sbrmi.c new file +11
-0+ status =i2c_smbus_read_byte_data (data->client,SBRMI_OUTBNDMSG7 ); +if (status <0 ) { +pr_err ("SMBUS translation failed\n" ); +return status; + } + +switch (status) { +case 0x0 :/* Success */ +break ; +case 0x1 : +pr_err ("Mailbox message command is aborted\n" );
drivers/hwmon/sbrmi.c line 112
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+break ; +case 0x2 : +pr_err ("Unknown mailbox message\n" ); +break ; +case 0x3 : +pr_err ("Invalid core is specified in mailbox message parameters\n" ); +break ; +default : +pr_err ("Unknown Error\n" ); + }
Is this noise necessary ? I am concerned that, if it occurs, it would be persistent and fill up the kernel log with noise.
drivers/hwmon/sbrmi.c line 112
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ +return status;
Error codes are supposed to be negative and standard Linux error codes. Please convert the above errors to standard Linux error codes.
Quoted 15 lines
drivers/hwmon/sbrmi.c new file +15
-0+} + +static int sbrmi_enable_alert (struct sbrmi_data *data) { +int ctrl; + +/* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (data->client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; + return i2c_smbus_write_byte_data(data->client,
drivers/hwmon/sbrmi.c line 141
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ SBRMI_CTRL, ctrl); + } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) { +union mailbox_word output, input; +int i, err =0 , retry =10 ;
Initializing 'err' is unnecessary.
Quoted 17 lines
drivers/hwmon/sbrmi.c new file +17
-0+int sw_status; + +mutex_lock (&data->lock); + + err =sbrmi_enable_alert (data); +if (err <0 ) + goto exit_unlock; + +/* Indicate firmware a command is to be serviced */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (err <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd);
drivers/hwmon/sbrmi.c line 168
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+if (err <0 ) + goto exit_mod; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ + input = msg->data_in; +for (i =0 ; i <3 ; i++) {
This writes 3 bytes. Is that on purpose ? If so please explain since the above suggests that 4 bytes should be written.
drivers/hwmon/sbrmi.c line 166
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ err = i2c_smbus_write_byte_data(data->client, + (SBRMI_INBNDMSG1 + i),
Unnecessary ( )
Quoted 24 lines
drivers/hwmon/sbrmi.c new file +24
-0+ input.bytes[i]); +if (err <0 ) + goto exit_mod; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (err <0 ) + goto exit_mod; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/ + do { + sw_status = i2c_smbus_read_byte_data(data->client, + SBRMI_STATUS); + if (sw_status < 0) { + err = sw_status;
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ goto exit_mod; + } +if (sw_status &SW_ALERT_MASK ) +break ; +usleep_range (50 ,100 ); + }while (retry--); + +if (retry <0 ) { +pr_err ("Firmware fail to indicate command + colmpletion\n");
completion
Quoted 4 lines
drivers/hwmon/sbrmi.c new file +4
-0+ err =-1 ; + goto exit_mod; + } +
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+/* +* For a read operation, the initiator (BMC) reads the firmware response +* Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + output.bytes[i] =i2c_smbus_read_byte_data (data->client, + + (SBRMI_OUTBNDMSG1 + i));
Unnecessary ().
drivers/hwmon/sbrmi.c line 217
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+if (output.bytes[i] <0 ) {
output.bytes is defined as u8. This will not catch errors.
drivers/hwmon/sbrmi.c line 230
Quoted 13 lines
drivers/hwmon/sbrmi.c new file +13
-0+ err = output.bytes[i]; + goto exit_mod; + } + } + } + msg->data_out = output; + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + err =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + (sw_status |SW_ALERT_MASK ));
Unnecessary ().
Quoted 105 lines
drivers/hwmon/sbrmi.c new file +105
-0+ +exit_mod: +if (err <0 ) +pr_err ("SMBUS translation failed\n" ); +else + err =print_mailbox_error (data); +exit_unlock: +mutex_unlock (&data->lock); +return err; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +default : +return -EINVAL ; + } +/* +* hwmon power attributes are in microWatt +*/ + *val = (long )msg.data_out.value *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; + +if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.data_in.value =0 ; + msg.read = true; +rmi_mailbox_xfer (data, &msg); + + val =clamp_val (val,SBRMI_PWR_MIN , msg.data_out.value); + + msg.cmd =SBRMI_WRITE_PKG_PWR_LIMIT ; + msg.data_in.value = val; + msg.read = false; + +return rmi_mailbox_xfer (data, &msg); } + +static umode_t sbrmi_is_visible (const void *data, +enum hwmon_sensor_types type, +u32 attr,int channel) { +switch (type) { +case hwmon_power: +switch (attr) { +case hwmon_power_input: +case hwmon_power_cap_max: +return 0444 ; +case hwmon_power_cap: +return 0644 ; + } +break ; +default : +break ; + } +return 0 ; +} + +static const struct hwmon_channel_info *sbrmi_info[] = { +HWMON_CHANNEL_INFO (power, +HWMON_P_INPUT |HWMON_P_CAP |HWMON_P_CAP_MAX ), +NULL +}; + +static const struct hwmon_ops sbrmi_hwmon_ops = { + .is_visible = sbrmi_is_visible, + .read = sbrmi_read, + .write = sbrmi_write, +}; + +static const struct hwmon_chip_info sbrmi_chip_info = { + .ops = &sbrmi_hwmon_ops, + .info = sbrmi_info, +};
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ +static int sbrmi_probe (struct i2c_client *client, +const struct i2c_device_id *id) { +struct device *dev = &client->dev; +struct device *hwmon_dev; +struct sbrmi_data *data; + +if (!i2c_check_functionality (client->adapter,I2C_FUNC_I2C )) { +dev_err (&client->dev,"adapter does not support true + I2C\n");
Why would that matter? It only uses SMBus functions.
Quoted 35 lines
drivers/hwmon/sbrmi.c new file +35
-0+return -ENODEV ; + } + + data =devm_kzalloc (dev,sizeof (struct sbrmi_data ),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->client = client; +mutex_init (&data->lock); + + hwmon_dev =devm_hwmon_device_register_with_info (dev, client->name, data, + + &sbrmi_chip_info,NULL ); + +return PTR_ERR_OR_ZERO (hwmon_dev); } + +static const struct i2c_device_id sbrmi_id[] = { + {"sbrmi" ,0 }, + {} +}; +MODULE_DEVICE_TABLE (i2c, sbrmi_id); + +static const struct of_device_id __maybe_unused sbrmi_of_match[] = { + { + .compatible ="amd,sbrmi" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, sbrmi_of_match); + +static struct i2c_driver sbrmi_driver = { + .class =I2C_CLASS_HWMON , + .driver = { + .name ="sbrmi" , + .of_match_table =of_match_ptr (sbrmi_of_match),
drivers/hwmon/sbrmi.c line 394
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ }, + .probe = sbrmi_probe, + .id_table = sbrmi_id, +}; + +module_i2c_driver (sbrmi_driver); + +MODULE_AUTHOR ("Akshay Gupta <[email protected]>" ); +MODULE_DESCRIPTION ("Hwmon driver for AMD SB-RMI emulated sensor" ); +MODULE_LICENSE ("GPL" );
[naveenk:] Thank you for your comments, we will address your comments and submit v2 soon.
Quoted 1 line
[naveenk:]
Regards,
Naveenk
[Public]
Hi Guenter,
Couple of questions inline before we submit the next version. Could you answer them.
Regards,
Naveenk
-----Original Message-----
From: Chatradhi, Naveen Krishna <[email protected]>
Sent: Tuesday, June 29, 2021 8:36 PM
To: Guenter Roeck <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: RE: [PATCH 1/3] hwmon: sbrmi: Add support for sbrmi power module
[CAUTION: External Email]
[AMD Official Use Only]
Hi Guenter,
-----Original Message-----
From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
Sent: Monday, June 28, 2021 8:29 PM
To: Chatradhi, Naveen Krishna <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: Re: [PATCH 1/3] hwmon: sbrmi: Add support for sbrmi power module
[CAUTION: External Email]
Quoted 4 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management
This is a bit too long for checkpatch.
[naveenk:] Sure
Quoted 7 lines
Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the Remote Management Interface (SB-Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to report power consumption and power limits of the CPU socket.
Quoted 6 lines
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the board management controller (BMC) to the CPU.
This is a bit vague. Would this driver be instantiated on the host CPU or on the BMC ? [naveenk:] This driver is to be instantiated on a BMC connected to AMD CPU. Will correct the comment.
Quoted 53 lines
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>--- drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 394 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 405 insertions(+)create mode 100644
drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig index renamed from drivers/hwmon/Kconfig +0
-0
87624902ea80..d1813ea8382c100644drivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST diff --gita/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index
59e78bc212cf..8031acf58936100644drivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file renamed from drivers/hwmon/sbrmi.c +0
-0mode 100644 index 000000000000..c35829513459
drivers/hwmon/sbrmi.c new file +6
-0@@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc.
drivers/hwmon/sbrmi.c line 16
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+*/ + +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> +#include <linux/of_device.h>
I don't immediately see why this include is needed.
drivers/hwmon/sbrmi.c line 17
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <asm-generic/ioctl.h>
This looks wrong, and I don't immediately see why it would be needed.
drivers/hwmon/sbrmi.c line 18
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <linux/delay.h>
Alphabetic include file order, please.
[naveenk:] Sure
drivers/hwmon/sbrmi.c line 23
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+ +/* Do not allow setting negative power limit */ #define SBRMI_PWR_MIN +0 +/* Mask for Status Register bit[1] */ #define SW_ALERT_MASK 0x2 +
Please always use
#define<space>DEFINITION<tab>value
^^^^^Quoted 32 lines
drivers/hwmon/sbrmi.c new file +32
-0+/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power +management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 ,
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+SBRMI_INBNDMSG3 , +SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , + SBRMI_SW_INTERRUPT, +}; + +/* +* Each client has this additional data */
Please be consistent with comments: This does not really need to be a multi-line comment. While that does not really matter, you use a single-line comment to describe the next structure. Please make it both either single-line or multi-line.
drivers/hwmon/sbrmi.c line 75
Quoted 9 lines
drivers/hwmon/sbrmi.c new file +9
-0+struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +}; + +/* Mailbox message data format */ +union mailbox_word { +u8 bytes[4 ]; +u32 value;
That strongly suggests that the driver will only work on either little-endian or big-endian systems, depending on the byte order of transfers. Please restrict it accordingly.
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +union mailbox_word data_in; +union mailbox_word data_out; +}; + +static int print_mailbox_error (struct sbrmi_data *data) {
Nit> Many functions only use data>client and, in some cases, dereference Nit> it
several times. It might be easier to just pass 'client'. [naveenk:] Sure
drivers/hwmon/sbrmi.c line 91
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+int status; + +/* Mailbox error code will be written by Firmware in +* SBRMI::OutBndMsg_inst7 (SBRMI_x37) +*/
/*
* Please use standard multi-line comments. Applies to entire driver. */
[naveenk:] Sure
Quoted 11 lines
drivers/hwmon/sbrmi.c new file +11
-0+ status =i2c_smbus_read_byte_data (data->client,SBRMI_OUTBNDMSG7 ); +if (status <0 ) { +pr_err ("SMBUS translation failed\n" ); +return status; + } + +switch (status) { +case 0x0 :/* Success */ +break ; +case 0x1 : +pr_err ("Mailbox message command is aborted\n" );
drivers/hwmon/sbrmi.c line 112
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+break ; +case 0x2 : +pr_err ("Unknown mailbox message\n" ); +break ; +case 0x3 : +pr_err ("Invalid core is specified in mailbox message parameters\n" ); +break ; +default : +pr_err ("Unknown Error\n" ); + }
Is this noise necessary ? I am concerned that, if it occurs, it would be persistent and fill up the kernel log with noise. [naveenk:] These are firmware defined error codes, can we change them to pr_debug and keep them ?
drivers/hwmon/sbrmi.c line 112
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ +return status;
Error codes are supposed to be negative and standard Linux error codes. Please convert the above errors to standard Linux error codes.
Quoted 15 lines
drivers/hwmon/sbrmi.c new file +15
-0+} + +static int sbrmi_enable_alert (struct sbrmi_data *data) { +int ctrl; + +/* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (data->client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; + return i2c_smbus_write_byte_data(data->client,
drivers/hwmon/sbrmi.c line 141
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ SBRMI_CTRL, ctrl); + } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) { +union mailbox_word output, input; +int i, err =0 , retry =10 ;
Initializing 'err' is unnecessary.
Quoted 17 lines
drivers/hwmon/sbrmi.c new file +17
-0+int sw_status; + +mutex_lock (&data->lock); + + err =sbrmi_enable_alert (data); +if (err <0 ) + goto exit_unlock; + +/* Indicate firmware a command is to be serviced */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (err <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd);
drivers/hwmon/sbrmi.c line 168
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+if (err <0 ) + goto exit_mod; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ + input = msg->data_in; +for (i =0 ; i <3 ; i++) {
This writes 3 bytes. Is that on purpose ? If so please explain since the above suggests that 4 bytes should be written. [naveenk:] this was a mistake, it has to be 4.
drivers/hwmon/sbrmi.c line 166
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ err = i2c_smbus_write_byte_data(data->client, + (SBRMI_INBNDMSG1 + i),
Unnecessary ( )
Quoted 24 lines
drivers/hwmon/sbrmi.c new file +24
-0+ input.bytes[i]); +if (err <0 ) + goto exit_mod; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (err <0 ) + goto exit_mod; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/ + do { + sw_status = i2c_smbus_read_byte_data(data->client, + SBRMI_STATUS); + if (sw_status < 0) { + err = sw_status;
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ goto exit_mod; + } +if (sw_status &SW_ALERT_MASK ) +break ; +usleep_range (50 ,100 ); + }while (retry--); + +if (retry <0 ) { +pr_err ("Firmware fail to indicate command + colmpletion\n");
completion
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+ err =-1 ; + goto exit_mod; + } + +/*
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+* For a read operation, the initiator (BMC) reads the firmware response +* Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + output.bytes[i] = +i2c_smbus_read_byte_data (data->client, + + (SBRMI_OUTBNDMSG1 + i));
Unnecessary ().
drivers/hwmon/sbrmi.c line 217
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+if (output.bytes[i] <0 ) {
output.bytes is defined as u8. This will not catch errors.
drivers/hwmon/sbrmi.c line 230
Quoted 13 lines
drivers/hwmon/sbrmi.c new file +13
-0+ err = output.bytes[i]; + goto exit_mod; + } + } + } + msg->data_out = output; + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + err =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + (sw_status |SW_ALERT_MASK ));
Unnecessary ().
Quoted 105 lines
drivers/hwmon/sbrmi.c new file +105
-0+ +exit_mod: +if (err <0 ) +pr_err ("SMBUS translation failed\n" ); +else + err =print_mailbox_error (data); +exit_unlock: +mutex_unlock (&data->lock); +return err; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +default : +return -EINVAL ; + } +/* +* hwmon power attributes are in microWatt +*/ + *val = (long )msg.data_out.value *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; + +if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.data_in.value =0 ; + msg.read = true; +rmi_mailbox_xfer (data, &msg); + + val =clamp_val (val,SBRMI_PWR_MIN , msg.data_out.value); + + msg.cmd =SBRMI_WRITE_PKG_PWR_LIMIT ; + msg.data_in.value = val; + msg.read = false; + +return rmi_mailbox_xfer (data, &msg); } + +static umode_t sbrmi_is_visible (const void *data, +enum hwmon_sensor_types type, +u32 attr,int channel) { +switch (type) { +case hwmon_power: +switch (attr) { +case hwmon_power_input: +case hwmon_power_cap_max: +return 0444 ; +case hwmon_power_cap: +return 0644 ; + } +break ; +default : +break ; + } +return 0 ; +} + +static const struct hwmon_channel_info *sbrmi_info[] = { +HWMON_CHANNEL_INFO (power, +HWMON_P_INPUT |HWMON_P_CAP |HWMON_P_CAP_MAX ), +NULL +}; + +static const struct hwmon_ops sbrmi_hwmon_ops = { + .is_visible = sbrmi_is_visible, + .read = sbrmi_read, + .write = sbrmi_write, +}; + +static const struct hwmon_chip_info sbrmi_chip_info = { + .ops = &sbrmi_hwmon_ops, + .info = sbrmi_info, +};
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ +static int sbrmi_probe (struct i2c_client *client, +const struct i2c_device_id *id) { +struct device *dev = &client->dev; +struct device *hwmon_dev; +struct sbrmi_data *data; + +if (!i2c_check_functionality (client->adapter,I2C_FUNC_I2C )) { +dev_err (&client->dev,"adapter does not support true + I2C\n");
Why would that matter? It only uses SMBus functions. [naveenk:] yes, will remove this.
Quoted 36 lines
drivers/hwmon/sbrmi.c new file +36
-0+return -ENODEV ; + } + + data =devm_kzalloc (dev,sizeof (struct sbrmi_data ),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->client = client; +mutex_init (&data->lock); + + hwmon_dev =devm_hwmon_device_register_with_info (dev, + client->name, data, + + &sbrmi_chip_info,NULL ); + +return PTR_ERR_OR_ZERO (hwmon_dev); } + +static const struct i2c_device_id sbrmi_id[] = { + {"sbrmi" ,0 }, + {} +}; +MODULE_DEVICE_TABLE (i2c, sbrmi_id); + +static const struct of_device_id __maybe_unused sbrmi_of_match[] = { + { + .compatible ="amd,sbrmi" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, sbrmi_of_match); + +static struct i2c_driver sbrmi_driver = { + .class =I2C_CLASS_HWMON , + .driver = { + .name ="sbrmi" , + .of_match_table =of_match_ptr (sbrmi_of_match),
drivers/hwmon/sbrmi.c line 390
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ }, + .probe = sbrmi_probe, + .id_table = sbrmi_id, +}; + +module_i2c_driver (sbrmi_driver); + +MODULE_AUTHOR ("Akshay Gupta <[email protected]>" ); +MODULE_DESCRIPTION ("Hwmon driver for AMD SB-RMI emulated sensor" ); +MODULE_LICENSE ("GPL" );
[naveenk:] Thank you for your comments, we will address your comments and submit v2 soon.
Quoted 1 line
[naveenk:]
Regards,
Naveenk
Guenter Roeck
maintainerQuoted 248 lines · Naveen Krishna
[Public]
Hi Guenter,
Couple of questions inline before we submit the next version. Could you answer them.
Regards,
Naveenk-----Original Message-----
From: Chatradhi, Naveen Krishna <[email protected]>
Sent: Tuesday, June 29, 2021 8:36 PM
To: Guenter Roeck <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: RE: [PATCH 1/3] hwmon: sbrmi: Add support for sbrmi power module[CAUTION: External Email]
[AMD Official Use Only]
Hi Guenter,
-----Original Message-----
From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
Sent: Monday, June 28, 2021 8:29 PM
To: Chatradhi, Naveen Krishna <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: Re: [PATCH 1/3] hwmon: sbrmi: Add support for sbrmi power module[CAUTION: External Email]
Quoted 4 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management
This is a bit too long for checkpatch.
[naveenk:] SureQuoted 7 lines
Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the Remote Management Interface (SB-Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to report power consumption and power limits of the CPU socket.
Quoted 6 lines
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the board management controller (BMC) to the CPU.This is a bit vague. Would this driver be instantiated on the host CPU or on the BMC ? [naveenk:] This driver is to be instantiated on a BMC connected to AMD CPU. Will correct the comment.
Quoted 53 lines
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>--- drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 394 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 405 insertions(+)create mode 100644
drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig index renamed from drivers/hwmon/Kconfig +0
-0
87624902ea80..d1813ea8382c100644drivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST diff --gita/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index
59e78bc212cf..8031acf58936100644drivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file renamed from drivers/hwmon/sbrmi.c +0
-0mode 100644 index 000000000000..c35829513459
drivers/hwmon/sbrmi.c new file +6
-0@@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc. drivers/hwmon/sbrmi.c line 16
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+*/ + +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> +#include <linux/of_device.h> I don't immediately see why this include is needed.
drivers/hwmon/sbrmi.c line 17
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <asm-generic/ioctl.h> This looks wrong, and I don't immediately see why it would be needed.
drivers/hwmon/sbrmi.c line 18
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <linux/delay.h> Alphabetic include file order, please.
[naveenk:] Suredrivers/hwmon/sbrmi.c line 23
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+ +/* Do not allow setting negative power limit */ #define SBRMI_PWR_MIN +0 +/* Mask for Status Register bit[1] */ #define SW_ALERT_MASK 0x2 +Please always use
#define<space>DEFINITION<tab>value ^^^^^Quoted 32 lines
drivers/hwmon/sbrmi.c new file +32
-0+/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power +management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 ,drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+SBRMI_INBNDMSG3 , +SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , + SBRMI_SW_INTERRUPT, +}; + +/* +* Each client has this additional data */ Please be consistent with comments: This does not really need to be a multi-line comment. While that does not really matter, you use a single-line comment to describe the next structure. Please make it both either single-line or multi-line.
drivers/hwmon/sbrmi.c line 75
Quoted 9 lines
drivers/hwmon/sbrmi.c new file +9
-0+struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +}; + +/* Mailbox message data format */ +union mailbox_word { +u8 bytes[4 ]; +u32 value;That strongly suggests that the driver will only work on either little-endian or big-endian systems, depending on the byte order of transfers. Please restrict it accordingly.
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +union mailbox_word data_in; +union mailbox_word data_out; +}; + +static int print_mailbox_error (struct sbrmi_data *data) {Nit> Many functions only use data>client and, in some cases, dereference Nit> it
several times. It might be easier to just pass 'client'. [naveenk:] Suredrivers/hwmon/sbrmi.c line 91
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+int status; + +/* Mailbox error code will be written by Firmware in +* SBRMI::OutBndMsg_inst7 (SBRMI_x37) +*/ /*
* Please use standard multi-line comments. Applies to entire driver. */
[naveenk:] SureQuoted 11 lines
drivers/hwmon/sbrmi.c new file +11
-0+ status =i2c_smbus_read_byte_data (data->client,SBRMI_OUTBNDMSG7 ); +if (status <0 ) { +pr_err ("SMBUS translation failed\n" ); +return status; + } + +switch (status) { +case 0x0 :/* Success */ +break ; +case 0x1 : +pr_err ("Mailbox message command is aborted\n" );drivers/hwmon/sbrmi.c line 112
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+break ; +case 0x2 : +pr_err ("Unknown mailbox message\n" ); +break ; +case 0x3 : +pr_err ("Invalid core is specified in mailbox message parameters\n" ); +break ; +default : +pr_err ("Unknown Error\n" ); + }
Quoted 3 lines
Is this noise necessary ? I am concerned that, if it occurs, it would be persistent and fill up the kernel log with noise. [naveenk:] These are firmware defined error codes, can we change them to
pr_debugand keep them ?
pr_debug is ok, but ...
Quoted 6 lines
drivers/hwmon/sbrmi.c line 112
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ +return status;Error codes are supposed to be negative and standard Linux error codes. Please convert the above errors to standard Linux error codes.
you'll still need to convert the error codes to standard error codes.
This is the only question I found. Please let me know if I missed something.
Thanks,
Guenter
Quoted 310 lines
Quoted 15 lines
drivers/hwmon/sbrmi.c new file +15
-0+} + +static int sbrmi_enable_alert (struct sbrmi_data *data) { +int ctrl; + +/* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (data->client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; + return i2c_smbus_write_byte_data(data->client,drivers/hwmon/sbrmi.c line 141
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ SBRMI_CTRL, ctrl); + } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) { +union mailbox_word output, input; +int i, err =0 , retry =10 ;Initializing 'err' is unnecessary.
Quoted 17 lines
drivers/hwmon/sbrmi.c new file +17
-0+int sw_status; + +mutex_lock (&data->lock); + + err =sbrmi_enable_alert (data); +if (err <0 ) + goto exit_unlock; + +/* Indicate firmware a command is to be serviced */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (err <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd);drivers/hwmon/sbrmi.c line 168
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+if (err <0 ) + goto exit_mod; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ + input = msg->data_in; +for (i =0 ; i <3 ; i++) {This writes 3 bytes. Is that on purpose ? If so please explain since the above suggests that 4 bytes should be written. [naveenk:] this was a mistake, it has to be 4.
drivers/hwmon/sbrmi.c line 166
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ err = i2c_smbus_write_byte_data(data->client, + (SBRMI_INBNDMSG1 + i),Unnecessary ( )
Quoted 24 lines
drivers/hwmon/sbrmi.c new file +24
-0+ input.bytes[i]); +if (err <0 ) + goto exit_mod; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (err <0 ) + goto exit_mod; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/ + do { + sw_status = i2c_smbus_read_byte_data(data->client, + SBRMI_STATUS); + if (sw_status < 0) { + err = sw_status;drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ goto exit_mod; + } +if (sw_status &SW_ALERT_MASK ) +break ; +usleep_range (50 ,100 ); + }while (retry--); + +if (retry <0 ) { +pr_err ("Firmware fail to indicate command + colmpletion\n");completion
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+ err =-1 ; + goto exit_mod; + } + +/* drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+* For a read operation, the initiator (BMC) reads the firmware response +* Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + output.bytes[i] = +i2c_smbus_read_byte_data (data->client, + + (SBRMI_OUTBNDMSG1 + i));Unnecessary ().
drivers/hwmon/sbrmi.c line 217
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+if (output.bytes[i] <0 ) {output.bytes is defined as u8. This will not catch errors.
drivers/hwmon/sbrmi.c line 230
Quoted 13 lines
drivers/hwmon/sbrmi.c new file +13
-0+ err = output.bytes[i]; + goto exit_mod; + } + } + } + msg->data_out = output; + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + err =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + (sw_status |SW_ALERT_MASK ));Unnecessary ().
Quoted 105 lines
drivers/hwmon/sbrmi.c new file +105
-0+ +exit_mod: +if (err <0 ) +pr_err ("SMBUS translation failed\n" ); +else + err =print_mailbox_error (data); +exit_unlock: +mutex_unlock (&data->lock); +return err; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +default : +return -EINVAL ; + } +/* +* hwmon power attributes are in microWatt +*/ + *val = (long )msg.data_out.value *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; + +if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.data_in.value =0 ; + msg.read = true; +rmi_mailbox_xfer (data, &msg); + + val =clamp_val (val,SBRMI_PWR_MIN , msg.data_out.value); + + msg.cmd =SBRMI_WRITE_PKG_PWR_LIMIT ; + msg.data_in.value = val; + msg.read = false; + +return rmi_mailbox_xfer (data, &msg); } + +static umode_t sbrmi_is_visible (const void *data, +enum hwmon_sensor_types type, +u32 attr,int channel) { +switch (type) { +case hwmon_power: +switch (attr) { +case hwmon_power_input: +case hwmon_power_cap_max: +return 0444 ; +case hwmon_power_cap: +return 0644 ; + } +break ; +default : +break ; + } +return 0 ; +} + +static const struct hwmon_channel_info *sbrmi_info[] = { +HWMON_CHANNEL_INFO (power, +HWMON_P_INPUT |HWMON_P_CAP |HWMON_P_CAP_MAX ), +NULL +}; + +static const struct hwmon_ops sbrmi_hwmon_ops = { + .is_visible = sbrmi_is_visible, + .read = sbrmi_read, + .write = sbrmi_write, +}; + +static const struct hwmon_chip_info sbrmi_chip_info = { + .ops = &sbrmi_hwmon_ops, + .info = sbrmi_info, +};drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ +static int sbrmi_probe (struct i2c_client *client, +const struct i2c_device_id *id) { +struct device *dev = &client->dev; +struct device *hwmon_dev; +struct sbrmi_data *data; + +if (!i2c_check_functionality (client->adapter,I2C_FUNC_I2C )) { +dev_err (&client->dev,"adapter does not support true + I2C\n");Why would that matter? It only uses SMBus functions. [naveenk:] yes, will remove this.
Quoted 36 lines
drivers/hwmon/sbrmi.c new file +36
-0+return -ENODEV ; + } + + data =devm_kzalloc (dev,sizeof (struct sbrmi_data ),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->client = client; +mutex_init (&data->lock); + + hwmon_dev =devm_hwmon_device_register_with_info (dev, + client->name, data, + + &sbrmi_chip_info,NULL ); + +return PTR_ERR_OR_ZERO (hwmon_dev); } + +static const struct i2c_device_id sbrmi_id[] = { + {"sbrmi" ,0 }, + {} +}; +MODULE_DEVICE_TABLE (i2c, sbrmi_id); + +static const struct of_device_id __maybe_unused sbrmi_of_match[] = { + { + .compatible ="amd,sbrmi" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, sbrmi_of_match); + +static struct i2c_driver sbrmi_driver = { + .class =I2C_CLASS_HWMON , + .driver = { + .name ="sbrmi" , + .of_match_table =of_match_ptr (sbrmi_of_match),drivers/hwmon/sbrmi.c line 390
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ }, + .probe = sbrmi_probe, + .id_table = sbrmi_id, +}; + +module_i2c_driver (sbrmi_driver); + +MODULE_AUTHOR ("Akshay Gupta <[email protected]>" ); +MODULE_DESCRIPTION ("Hwmon driver for AMD SB-RMI emulated sensor" ); +MODULE_LICENSE ("GPL" );[naveenk:] Thank you for your comments, we will address your comments and submit v2 soon.
Quoted 1 line
[naveenk:]
Regards,
Naveenk
[Public]
Hi Guenter
-----Original Message-----
From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
Sent: Wednesday, July 7, 2021 7:52 PM
To: Chatradhi, Naveen Krishna <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: Re: [PATCH 1/3] hwmon: sbrmi: Add support for sbrmi power module
[CAUTION: External Email]
Quoted 5 lines · Naveen Krishna
[Public]
Hi Guenter,
Couple of questions inline before we submit the next version. Could you answer them.
[naveenk:] Yes, that was the one. Submitting the next version. Thank you.
Quoted 247 lines
Regards,
Naveenk-----Original Message-----
From: Chatradhi, Naveen Krishna <[email protected]>
Sent: Tuesday, June 29, 2021 8:36 PM
To: Guenter Roeck <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: RE: [PATCH 1/3] hwmon: sbrmi: Add support for sbrmi power module[CAUTION: External Email]
[AMD Official Use Only]
Hi Guenter,
-----Original Message-----
From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
Sent: Monday, June 28, 2021 8:29 PM
To: Chatradhi, Naveen Krishna <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: Re: [PATCH 1/3] hwmon: sbrmi: Add support for sbrmi power module[CAUTION: External Email]
Quoted 4 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management
This is a bit too long for checkpatch.
[naveenk:] SureQuoted 7 lines
Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the Remote Management Interface (SB-Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to report power consumption and power limits of the CPU socket.
Quoted 6 lines
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the board management controller (BMC) to the CPU.This is a bit vague. Would this driver be instantiated on the host CPU or on the BMC ? [naveenk:] This driver is to be instantiated on a BMC connected to AMD CPU. Will correct the comment.
Quoted 53 lines
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>--- drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 394 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 405 insertions(+)create mode 100644
drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig index renamed from drivers/hwmon/Kconfig +0
-0
87624902ea80..d1813ea8382c100644drivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST diff --gita/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index
59e78bc212cf..8031acf58936100644drivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file renamed from drivers/hwmon/sbrmi.c +0
-0mode 100644 index 000000000000..c35829513459
drivers/hwmon/sbrmi.c new file +6
-0@@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc. drivers/hwmon/sbrmi.c line 16
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+*/ + +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> +#include <linux/of_device.h> I don't immediately see why this include is needed.
drivers/hwmon/sbrmi.c line 17
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <asm-generic/ioctl.h> This looks wrong, and I don't immediately see why it would be needed.
drivers/hwmon/sbrmi.c line 18
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+#include <linux/delay.h> Alphabetic include file order, please.
[naveenk:] Suredrivers/hwmon/sbrmi.c line 24
Quoted 6 lines
drivers/hwmon/sbrmi.c new file +6
-0+ +/* Do not allow setting negative power limit */ #define +SBRMI_PWR_MIN +0 +/* Mask for Status Register bit[1] */ #define SW_ALERT_MASK 0x2 +Please always use
#define<space>DEFINITION<tab>value ^^^^^Quoted 32 lines
drivers/hwmon/sbrmi.c new file +32
-0+/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power +management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 ,drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+SBRMI_INBNDMSG3 , +SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , + SBRMI_SW_INTERRUPT, +}; + +/* +* Each client has this additional data */ Please be consistent with comments: This does not really need to be a multi-line comment. While that does not really matter, you use a single-line comment to describe the next structure. Please make it both either single-line or multi-line.
drivers/hwmon/sbrmi.c line 75
Quoted 9 lines
drivers/hwmon/sbrmi.c new file +9
-0+struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +}; + +/* Mailbox message data format */ +union mailbox_word { +u8 bytes[4 ]; +u32 value;That strongly suggests that the driver will only work on either little-endian or big-endian systems, depending on the byte order of transfers. Please restrict it accordingly.
drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +union mailbox_word data_in; +union mailbox_word data_out; +}; + +static int print_mailbox_error (struct sbrmi_data *data) {Nit> Many functions only use data>client and, in some cases, Nit> dereference it
several times. It might be easier to just pass 'client'. [naveenk:] Suredrivers/hwmon/sbrmi.c line 91
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+int status; + +/* Mailbox error code will be written by Firmware in +* SBRMI::OutBndMsg_inst7 (SBRMI_x37) +*/ /*
* Please use standard multi-line comments. Applies to entire driver. */
[naveenk:] SureQuoted 11 lines
drivers/hwmon/sbrmi.c new file +11
-0+ status =i2c_smbus_read_byte_data (data->client,SBRMI_OUTBNDMSG7 ); +if (status <0 ) { +pr_err ("SMBUS translation failed\n" ); +return status; + } + +switch (status) { +case 0x0 :/* Success */ +break ; +case 0x1 : +pr_err ("Mailbox message command is aborted\n" );drivers/hwmon/sbrmi.c line 112
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+break ; +case 0x2 : +pr_err ("Unknown mailbox message\n" ); +break ; +case 0x3 : +pr_err ("Invalid core is specified in mailbox message parameters\n" ); +break ; +default : +pr_err ("Unknown Error\n" ); + }
Quoted 3 lines
Is this noise necessary ? I am concerned that, if it occurs, it would be persistent and fill up the kernel log with noise. [naveenk:] These are firmware defined error codes, can we change them to
pr_debugand keep them ?
pr_debug is ok, but ...
Quoted 6 lines
drivers/hwmon/sbrmi.c line 113
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ +return status;Error codes are supposed to be negative and standard Linux error codes. Please convert the above errors to standard Linux error codes.
you'll still need to convert the error codes to standard error codes.
This is the only question I found. Please let me know if I missed something.
Thanks,
Guenter
Quoted 310 lines
Quoted 15 lines
drivers/hwmon/sbrmi.c new file +15
-0+} + +static int sbrmi_enable_alert (struct sbrmi_data *data) { +int ctrl; + +/* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (data->client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; + return i2c_smbus_write_byte_data(data->client,drivers/hwmon/sbrmi.c line 141
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ SBRMI_CTRL, ctrl); + } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) { +union mailbox_word output, input; +int i, err =0 , retry =10 ;Initializing 'err' is unnecessary.
Quoted 17 lines
drivers/hwmon/sbrmi.c new file +17
-0+int sw_status; + +mutex_lock (&data->lock); + + err =sbrmi_enable_alert (data); +if (err <0 ) + goto exit_unlock; + +/* Indicate firmware a command is to be serviced */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (err <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd);drivers/hwmon/sbrmi.c line 168
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+if (err <0 ) + goto exit_mod; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ + input = msg->data_in; +for (i =0 ; i <3 ; i++) {This writes 3 bytes. Is that on purpose ? If so please explain since the above suggests that 4 bytes should be written. [naveenk:] this was a mistake, it has to be 4.
drivers/hwmon/sbrmi.c line 167
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ err = i2c_smbus_write_byte_data(data->client, + (SBRMI_INBNDMSG1 + i),Unnecessary ( )
Quoted 24 lines
drivers/hwmon/sbrmi.c new file +24
-0+ input.bytes[i]); +if (err <0 ) + goto exit_mod; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + err =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (err <0 ) + goto exit_mod; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/ + do { + sw_status = i2c_smbus_read_byte_data(data->client, + SBRMI_STATUS); + if (sw_status < 0) { + err = sw_status;drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ goto exit_mod; + } +if (sw_status &SW_ALERT_MASK ) +break ; +usleep_range (50 ,100 ); + }while (retry--); + +if (retry <0 ) { +pr_err ("Firmware fail to indicate command + colmpletion\n");completion
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+ err =-1 ; + goto exit_mod; + } + +/* drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+* For a read operation, the initiator (BMC) reads the firmware response +* Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + output.bytes[i] = +i2c_smbus_read_byte_data (data->client, + + (SBRMI_OUTBNDMSG1 + i));Unnecessary ().
drivers/hwmon/sbrmi.c line 217
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+if (output.bytes[i] <0 ) {output.bytes is defined as u8. This will not catch errors.
drivers/hwmon/sbrmi.c line 230
Quoted 13 lines
drivers/hwmon/sbrmi.c new file +13
-0+ err = output.bytes[i]; + goto exit_mod; + } + } + } + msg->data_out = output; + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + err =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + (sw_status |SW_ALERT_MASK ));Unnecessary ().
Quoted 105 lines
drivers/hwmon/sbrmi.c new file +105
-0+ +exit_mod: +if (err <0 ) +pr_err ("SMBUS translation failed\n" ); +else + err =print_mailbox_error (data); +exit_unlock: +mutex_unlock (&data->lock); +return err; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +default : +return -EINVAL ; + } +/* +* hwmon power attributes are in microWatt +*/ + *val = (long )msg.data_out.value *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; + +if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.data_in.value =0 ; + msg.read = true; +rmi_mailbox_xfer (data, &msg); + + val =clamp_val (val,SBRMI_PWR_MIN , msg.data_out.value); + + msg.cmd =SBRMI_WRITE_PKG_PWR_LIMIT ; + msg.data_in.value = val; + msg.read = false; + +return rmi_mailbox_xfer (data, &msg); } + +static umode_t sbrmi_is_visible (const void *data, +enum hwmon_sensor_types type, +u32 attr,int channel) { +switch (type) { +case hwmon_power: +switch (attr) { +case hwmon_power_input: +case hwmon_power_cap_max: +return 0444 ; +case hwmon_power_cap: +return 0644 ; + } +break ; +default : +break ; + } +return 0 ; +} + +static const struct hwmon_channel_info *sbrmi_info[] = { +HWMON_CHANNEL_INFO (power, +HWMON_P_INPUT |HWMON_P_CAP |HWMON_P_CAP_MAX ), +NULL +}; + +static const struct hwmon_ops sbrmi_hwmon_ops = { + .is_visible = sbrmi_is_visible, + .read = sbrmi_read, + .write = sbrmi_write, +}; + +static const struct hwmon_chip_info sbrmi_chip_info = { + .ops = &sbrmi_hwmon_ops, + .info = sbrmi_info, +};drivers/hwmon/sbrmi.c
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ +static int sbrmi_probe (struct i2c_client *client, +const struct i2c_device_id *id) { +struct device *dev = &client->dev; +struct device *hwmon_dev; +struct sbrmi_data *data; + +if (!i2c_check_functionality (client->adapter,I2C_FUNC_I2C )) { +dev_err (&client->dev,"adapter does not support true + I2C\n");Why would that matter? It only uses SMBus functions. [naveenk:] yes, will remove this.
Quoted 36 lines
drivers/hwmon/sbrmi.c new file +36
-0+return -ENODEV ; + } + + data =devm_kzalloc (dev,sizeof (struct sbrmi_data ),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->client = client; +mutex_init (&data->lock); + + hwmon_dev =devm_hwmon_device_register_with_info (dev, + client->name, data, + + &sbrmi_chip_info,NULL ); + +return PTR_ERR_OR_ZERO (hwmon_dev); } + +static const struct i2c_device_id sbrmi_id[] = { + {"sbrmi" ,0 }, + {} +}; +MODULE_DEVICE_TABLE (i2c, sbrmi_id); + +static const struct of_device_id __maybe_unused sbrmi_of_match[] = { + { + .compatible ="amd,sbrmi" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, sbrmi_of_match); + +static struct i2c_driver sbrmi_driver = { + .class =I2C_CLASS_HWMON , + .driver = { + .name ="sbrmi" , + .of_match_table =of_match_ptr (sbrmi_of_match),drivers/hwmon/sbrmi.c line 391
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ }, + .probe = sbrmi_probe, + .id_table = sbrmi_id, +}; + +module_i2c_driver (sbrmi_driver); + +MODULE_AUTHOR ("Akshay Gupta <[email protected]>" ); +MODULE_DESCRIPTION ("Hwmon driver for AMD SB-RMI emulated sensor" ); +MODULE_LICENSE ("GPL" );[naveenk:] Thank you for your comments, we will address your comments and submit v2 soon.
Quoted 1 line
[naveenk:]
Regards,
Naveenk
PATCH v2 1/3 hwmon: sbrmi: Add support for sbrmi power module
In reply to Naveen Krishna ChatradhiFrom: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the
Side-Band Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to manage power consumption and power limits of the CPU socket.
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on a Board Management Controller (BMC) connected to an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the BMC to the CPU.
---
Changes since v1:
1. remove header file and move in alphabetical order
2. make all comments multiline
3. remove the pr_err, needed for debugging only
4. fix #define tab issue
5. uninitailize err,
- correct spelling & remove extra ()
- remove extra i2c functionality check
6. reduce call to data->client
7. remove usage of union
drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 341 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 352 insertions(+) create mode 100644 drivers/hwmon/sbrmi.c
drivers/hwmon/Kconfig +10 -0
@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST
drivers/hwmon/Makefile +1 -0
@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.o
drivers/hwmon/sbrmi.c new file +341 -0
341 lines not on this page · raw message
Signature · 1 line
2.17.1
PATCH v2 2/3 hwmon: sbrmi: Add Documentation
From: Akshay Gupta <[email protected]>
- Add documentation for sbrmi module
---
Changes since v1:
- correct power# to power1
Documentation/hwmon/index.rst | 1 + Documentation/hwmon/sbrmi.rst | 79 +++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) create mode 100644 Documentation/hwmon/sbrmi.rst
Documentation/hwmon/index.rst +1 -0
@@ -158,6 +158,7 @@ Hardware Monitoring Kernel Drivers q54sj108a2 raspberrypi-hwmon sbtsi_temp + sbrmi sch5627 sch5636 scpi-hwmon
Documentation/hwmon/sbrmi.rst new file +79 -0
79 lines not on this page · raw message
Signature · 1 line
2.17.1
PATCH v2 3/3 dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings
In reply to Naveen Krishna ChatradhiFrom: Akshay Gupta <[email protected]>
- Document device tree bindings for AMD SB-RMI emulated service.
---
Changes since v1:
None
.../devicetree/bindings/hwmon/amd,sbrmi.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml
Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml new file +53 -0
@@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/amd,sbrmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: > + Sideband Remote Management Interface (SB-RMI) compliant + AMD SoC power device. + +maintainers: + - Akshay Gupta <[email protected]> + +description: | + SB Remote Management Interface (SB-RMI) is an SMBus compatible + interface that reports AMD SoC's Power (normalized Power) using, + Mailbox Service Request and resembles a typical 8-pin remote power + sensor's I2C interface to BMC. The power attributes in hwmon + reports power in microwatts. + +properties: + compatible: + enum: + - amd,sbrmi + + reg: + maxItems: 1 + description: | + I2C bus address of the device as specified in Section SBI SMBus Address + of the SoC register reference. The SB-RMI address is normally 78h for + socket 0 and 70h for socket 1, but it could vary based on hardware + address select pins. + \[open source SoC register reference\] + https://www.amd.com/en/support/tech-docs?keyword=55898 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + sbrmi@3c { + compatible = "amd,sbrmi"; + reg = <0x3c>; + }; + }; +...
Signature · 1 line
2.17.1
Guenter Roeck
maintainerQuoted 176 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the
Side-Band Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to manage power consumption and power limits of the CPU socket.- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on a Board Management Controller (BMC) connected to an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the BMC to the CPU.Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>---
Changes since v1:
1. remove header file and move in alphabetical order
2. make all comments multiline
3. remove thepr_err, needed for debugging only
4. fix #define tab issue
5. uninitailize err,
- correct spelling & remove extra ()
- remove extra i2c functionality check
6. reduce call todata->client
7. remove usage of uniondrivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 341 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 352 insertions(+) create mode 100644 drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TESTdrivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file +98
-0@@ -0,0 +1,341 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc. +*/ + +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> + +/* Do not allow setting negative power limit */ +#define SBRMI_PWR_MIN 0 +/* Mask for Status Register bit[1] */ +#define SW_ALERT_MASK 0x2 + +/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 , +SBRMI_INBNDMSG3 , +SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , +SBRMI_SW_INTERRUPT , +}; + +/* Each client has this additional data */ +struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +u32 data_in; +u32 data_out; +}; + +static int sbrmi_enable_alert (struct i2c_client *client) +{ +int ctrl; + +/* +* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; +return i2c_smbus_write_byte_data (client, +SBRMI_CTRL , ctrl); + } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) +{
drivers/hwmon/sbrmi.c line 108
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+int i, ret, retry =10 ; +int sw_status; +u8 byte; + +mutex_lock (&data->lock); + + ret =sbrmi_enable_alert (data->client); +if (ret <0 ) + goto exit_unlock; +
Is it really necessary to call this for every command (instead of once during probe) ?
Quoted 39 lines
drivers/hwmon/sbrmi.c new file +39
-0+/* Indicate firmware a command is to be serviced */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (ret <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd); +if (ret <0 ) + goto exit_unlock; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ +for (i =0 ; i <4 ; i++) { + byte = (msg->data_in >> i *8 ) &0xff ; + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG1 + i, byte); +if (ret <0 ) + goto exit_unlock; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (ret <0 ) + goto exit_unlock; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/
drivers/hwmon/sbrmi.c line 157
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ do { + sw_status = i2c_smbus_read_byte_data(data->client, + SBRMI_STATUS); + if (sw_status < 0) { + ret = sw_status; + goto exit_unlock; + } + if (sw_status & SW_ALERT_MASK) + break; + usleep_range(50, 100);
I don't have the interface specification, but is ~600 uS guaranteed to be sufficient time for the firmware to respond ?
drivers/hwmon/sbrmi.c line 161
Quoted 4 lines
drivers/hwmon/sbrmi.c new file +4
-0+ }while (retry--); + +if (retry <0 ) { +pr_err ("Firmware fail to indicate command completion\n" );
Please use dev_err(). Also, does this really warrant an error message ? I am concerned that it may fill up the log if there is an issue with the client, eg if it hangs. On top of that, there is already an error message below. Please no more than one message per error.
drivers/hwmon/sbrmi.c line 162
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+ ret =-1 ;
Please use standard error codes (-ETIMEDOUT ? -EIO ? -EPROTO ?). -1 translates to -EPERM which is presumably not what you want.
Quoted 4 lines
drivers/hwmon/sbrmi.c new file +4
-0+ goto exit_unlock; + } + +/*
drivers/hwmon/sbrmi.c line 176
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+* For a read operation, the initiator (BMC) reads the firmware +* response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + ret =i2c_smbus_read_byte_data (data->client, +SBRMI_OUTBNDMSG1 + i); +if (ret <0 ) + goto exit_unlock;
This is a concern in conjunction with the ignored error in sbrmi_write(). If there is an error after reading a number of bytes, the returned value will be partial/random.
drivers/hwmon/sbrmi.c line 177
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+ msg->data_out |= (ret &0xff ) << i *8 ;
The mask is unnecessary here. A byte read will never return a value > 0xff.
drivers/hwmon/sbrmi.c line 190
Quoted 13 lines
drivers/hwmon/sbrmi.c new file +13
-0+ } + } + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + ret =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + sw_status |SW_ALERT_MASK ); + +exit_unlock: +if (ret <0 ) +pr_err ("SMBUS translation failed\n" );
dev_err(). Also, please consider that this may fill the log if the client or the i2c controller/bus has a problem.
Quoted 43 lines
drivers/hwmon/sbrmi.c new file +43
-0+ +mutex_unlock (&data->lock); +return ret; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) +{ +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +default : +return -EINVAL ; + } +/* hwmon power attributes are in microWatt */ + *val = (long )msg.data_out *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) +{ +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +
drivers/hwmon/sbrmi.c line 243
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.data_in =0 ;
Unnecessary (already initialized above).
drivers/hwmon/sbrmi.c line 245
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ msg.read = true; +rmi_mailbox_xfer (data, &msg);
Not sure if it is a good idea to ignore an error return here. As far as I can see in rmi_mailbox_xfer(), the returned value is more or less random if there is an error.
If the maximum power limit is static, it might make sense to read it only once in the prob function and cache the limit in struct sbrmi_data instead of reading it repeatedly.
If the limit is not static and it is indeed necessary to re-read the limit, isn't this racy if there are multiple write requests in parallel ?
Quoted 99 lines
drivers/hwmon/sbrmi.c new file +96
-0+ + val =clamp_val (val,SBRMI_PWR_MIN , msg.data_out); + + msg.cmd =SBRMI_WRITE_PKG_PWR_LIMIT ; + msg.data_in = val; + msg.read = false; + +return rmi_mailbox_xfer (data, &msg); +} + +static umode_t sbrmi_is_visible (const void *data, +enum hwmon_sensor_types type, +u32 attr,int channel) +{ +switch (type) { +case hwmon_power: +switch (attr) { +case hwmon_power_input: +case hwmon_power_cap_max: +return 0444 ; +case hwmon_power_cap: +return 0644 ; + } +break ; +default : +break ; + } +return 0 ; +} + +static const struct hwmon_channel_info *sbrmi_info[] = { +HWMON_CHANNEL_INFO (power, +HWMON_P_INPUT |HWMON_P_CAP |HWMON_P_CAP_MAX ), +NULL +}; + +static const struct hwmon_ops sbrmi_hwmon_ops = { + .is_visible = sbrmi_is_visible, + .read = sbrmi_read, + .write = sbrmi_write, +}; + +static const struct hwmon_chip_info sbrmi_chip_info = { + .ops = &sbrmi_hwmon_ops, + .info = sbrmi_info, +}; + +static int sbrmi_probe (struct i2c_client *client, +const struct i2c_device_id *id) +{ +struct device *dev = &client->dev; +struct device *hwmon_dev; +struct sbrmi_data *data; + + data =devm_kzalloc (dev,sizeof (struct sbrmi_data ),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->client = client; +mutex_init (&data->lock); + + hwmon_dev =devm_hwmon_device_register_with_info (dev, client->name, data, + &sbrmi_chip_info,NULL ); + +return PTR_ERR_OR_ZERO (hwmon_dev); +} + +static const struct i2c_device_id sbrmi_id[] = { + {"sbrmi" ,0 }, + {} +}; +MODULE_DEVICE_TABLE (i2c, sbrmi_id); + +static const struct of_device_id __maybe_unused sbrmi_of_match[] = { + { + .compatible ="amd,sbrmi" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, sbrmi_of_match); + +static struct i2c_driver sbrmi_driver = { + .class =I2C_CLASS_HWMON , + .driver = { + .name ="sbrmi" , + .of_match_table =of_match_ptr (sbrmi_of_match), + }, + .probe = sbrmi_probe, + .id_table = sbrmi_id, +}; + +module_i2c_driver (sbrmi_driver); + +MODULE_AUTHOR ("Akshay Gupta <[email protected]>" ); +MODULE_DESCRIPTION ("Hwmon driver for AMD SB-RMI emulated sensor" ); +MODULE_LICENSE ("GPL" );Signature · 1 line
2.17.1
[AMD Official Use Only]
Hi Guenter,
Thank you for your review, will submit revised version shortly.
Regards,
Naveenk
-----Original Message-----
From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
Sent: Friday, July 16, 2021 11:28 AM
To: Chatradhi, Naveen Krishna <[email protected]>
Cc: [email protected]; Gupta, Akshay <[email protected]>
Subject: Re: [PATCH v2 1/3] hwmon: sbrmi: Add support for sbrmi power module
[CAUTION: External Email]
Quoted 171 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface.
APML is also referred as the sideband interface (SBI).APML is used to communicate with the
Side-Band Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to manage power consumption and power limits of the CPU socket.- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on a Board Management Controller (BMC) connected to an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the BMC to the CPU.Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>---
Changes since v1:
1. remove header file and move in alphabetical order 2. make all comments multiline 3. remove thepr_err, needed for debugging only 4. fix #define tab issue 5. uninitailize err,
- correct spelling & remove extra ()
- remove extra i2c functionality check 6. reduce call todata->client7. remove usage of uniondrivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 341 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 352 insertions(+) create mode 100644 drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig index renamed from drivers/hwmon/Kconfig +0
-0
87624902ea80..f489972a6309100644drivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST diff --gita/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index
59e78bc212cf..8031acf58936100644drivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file renamed from drivers/hwmon/sbrmi.c +0
-0mode 100644 index 000000000000..10622b1f23f2
drivers/hwmon/sbrmi.c new file +96
-0@@ -0,0 +1,341 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc. +*/ + +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> + +/* Do not allow setting negative power limit */ +#define SBRMI_PWR_MIN 0 +/* Mask for Status Register bit[1] */ +#define SW_ALERT_MASK 0x2 + +/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power +management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 , +SBRMI_INBNDMSG3 , +SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , +SBRMI_SW_INTERRUPT , +}; + +/* Each client has this additional data */ struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +u32 data_in; +u32 data_out; +}; + +static int sbrmi_enable_alert (struct i2c_client *client) { +int ctrl; + +/* +* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; +return i2c_smbus_write_byte_data (client, +SBRMI_CTRL , ctrl); + } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) {
drivers/hwmon/sbrmi.c line 106
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+int i, ret, retry =10 ; +int sw_status; +u8 byte; + +mutex_lock (&data->lock); + + ret =sbrmi_enable_alert (data->client); +if (ret <0 ) + goto exit_unlock; +
Is it really necessary to call this for every command (instead of once during probe) ? [naveenk:] Will move it
Quoted 39 lines
drivers/hwmon/sbrmi.c new file +39
-0+/* Indicate firmware a command is to be serviced */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (ret <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd); +if (ret <0 ) + goto exit_unlock; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ +for (i =0 ; i <4 ; i++) { + byte = (msg->data_in >> i *8 ) &0xff ; + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG1 + i, byte); +if (ret <0 ) + goto exit_unlock; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (ret <0 ) + goto exit_unlock; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/
drivers/hwmon/sbrmi.c line 157
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+ do { + sw_status = i2c_smbus_read_byte_data(data->client, + SBRMI_STATUS); + if (sw_status < 0) { + ret = sw_status; + goto exit_unlock; + } + if (sw_status & SW_ALERT_MASK) + break; + usleep_range(50, 100);
I don't have the interface specification, but is ~600 uS guaranteed to be sufficient time for the firmware to respond ? [naveenk:] The SB-RMI is explained in the APML chapter of the reference manual available https://www.amd.com/en/support/tech-docs?keyword=55898
I did not find any mention of the response time, we ran several times and never seen the loop execute twice. Do you have any recommendation here ?
drivers/hwmon/sbrmi.c
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+ }while (retry--); + +if (retry <0 ) { +pr_err ("Firmware fail to indicate command + completion\n");
Please use dev_err(). Also, does this really warrant an error message ?
I am concerned that it may fill up the log if there is an issue with the client, eg if it hangs. On top of that, there is already an error message below. Please no more than one message per error. [naveenk:] Sure will change to dev_err and remove one of the prints
drivers/hwmon/sbrmi.c line 162
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+ ret =-1 ;
Please use standard error codes (-ETIMEDOUT ? -EIO ? -EPROTO ?). -1 translates to -EPERM which is presumably not what you want. [naveenk:] Will use -EIO
Quoted 4 lines
drivers/hwmon/sbrmi.c new file +4
-0+ goto exit_unlock; + } + +/*
drivers/hwmon/sbrmi.c line 176
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+* For a read operation, the initiator (BMC) reads the firmware +* response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + ret =i2c_smbus_read_byte_data (data->client, +SBRMI_OUTBNDMSG1 + i); +if (ret <0 ) + goto exit_unlock;
This is a concern in conjunction with the ignored error in sbrmi_write().
If there is an error after reading a number of bytes, the returned value will be partial/random. [naveenk:] Will address the return value
drivers/hwmon/sbrmi.c line 177
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+ msg->data_out |= (ret &0xff ) << i *8 ;
The mask is unnecessary here. A byte read will never return a value > 0xff. [naveenk:] Sure will remove
drivers/hwmon/sbrmi.c line 190
Quoted 13 lines
drivers/hwmon/sbrmi.c new file +13
-0+ } + } + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + ret =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + sw_status |SW_ALERT_MASK ); + +exit_unlock: +if (ret <0 ) +pr_err ("SMBUS translation failed\n" );
dev_err(). Also, please consider that this may fill the log if the client or the i2c controller/bus has a problem. [naveenk:] Will remove this print
Quoted 41 lines
drivers/hwmon/sbrmi.c new file +41
-0+ +mutex_unlock (&data->lock); +return ret; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +default : +return -EINVAL ; + } +/* hwmon power attributes are in microWatt */ + *val = (long )msg.data_out *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +
drivers/hwmon/sbrmi.c line 243
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.data_in =0 ;
Unnecessary (already initialized above).
drivers/hwmon/sbrmi.c line 242
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ msg.read = true; +rmi_mailbox_xfer (data, &msg);
Not sure if it is a good idea to ignore an error return here.
As far as I can see in rmi_mailbox_xfer(), the returned value is more or less random if there is an error.
If the maximum power limit is static, it might make sense to read it only once in the prob function and cache the limit in struct sbrmi_data instead of reading it repeatedly. [naveenk:] The maximum limit is fixed, will cache during probe.
If the limit is not static and it is indeed necessary to re-read the limit, isn't this racy if there are multiple write requests in parallel ? [naveenk:] the operating limit value can be set to a value below the max_limit
Quoted 96 lines
drivers/hwmon/sbrmi.c new file +93
-1+ + val =clamp_val (val,SBRMI_PWR_MIN , msg.data_out); + + msg.cmd =SBRMI_WRITE_PKG_PWR_LIMIT ; + msg.data_in = val; + msg.read = false; + +return rmi_mailbox_xfer (data, &msg); } + +static umode_t sbrmi_is_visible (const void *data, +enum hwmon_sensor_types type, +u32 attr,int channel) { +switch (type) { +case hwmon_power: +switch (attr) { +case hwmon_power_input: +case hwmon_power_cap_max: +return 0444 ; +case hwmon_power_cap: +return 0644 ; + } +break ; +default : +break ; + } +return 0 ; +} + +static const struct hwmon_channel_info *sbrmi_info[] = { +HWMON_CHANNEL_INFO (power, +HWMON_P_INPUT |HWMON_P_CAP |HWMON_P_CAP_MAX ), +NULL +}; + +static const struct hwmon_ops sbrmi_hwmon_ops = { + .is_visible = sbrmi_is_visible, + .read = sbrmi_read, + .write = sbrmi_write, +}; + +static const struct hwmon_chip_info sbrmi_chip_info = { + .ops = &sbrmi_hwmon_ops, + .info = sbrmi_info, +}; + +static int sbrmi_probe (struct i2c_client *client, +const struct i2c_device_id *id) { +struct device *dev = &client->dev; +struct device *hwmon_dev; +struct sbrmi_data *data; + + data =devm_kzalloc (dev,sizeof (struct sbrmi_data ),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->client = client; +mutex_init (&data->lock); + + hwmon_dev =devm_hwmon_device_register_with_info (dev, client->name, data, + + &sbrmi_chip_info,NULL ); + +return PTR_ERR_OR_ZERO (hwmon_dev); } + +static const struct i2c_device_id sbrmi_id[] = { + {"sbrmi" ,0 }, + {} +}; +MODULE_DEVICE_TABLE (i2c, sbrmi_id); + +static const struct of_device_id __maybe_unused sbrmi_of_match[] = { + { + .compatible ="amd,sbrmi" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, sbrmi_of_match); + +static struct i2c_driver sbrmi_driver = { + .class =I2C_CLASS_HWMON , + .driver = { + .name ="sbrmi" , + .of_match_table =of_match_ptr (sbrmi_of_match), + }, + .probe = sbrmi_probe, + .id_table = sbrmi_id, +}; + +module_i2c_driver (sbrmi_driver); + +MODULE_AUTHOR ("Akshay Gupta <[email protected]>" ); +MODULE_DESCRIPTION ("Hwmon driver for AMD SB-RMI emulated sensor" ); +MODULE_LICENSE ("GPL" ); --2.17.1
Guenter Roeck
maintainerQuoted 249 lines · Naveen Krishna
[AMD Official Use Only]
Hi Guenter,
Thank you for your review, will submit revised version shortly.
Regards,
Naveenk-----Original Message-----
From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
Sent: Friday, July 16, 2021 11:28 AM
To: Chatradhi, Naveen Krishna <[email protected]>
Cc: [email protected]; Gupta, Akshay <[email protected]>
Subject: Re: [PATCH v2 1/3] hwmon: sbrmi: Add support for sbrmi power module[CAUTION: External Email]
Quoted 171 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface.
APML is also referred as the sideband interface (SBI).APML is used to communicate with the
Side-Band Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to manage power consumption and power limits of the CPU socket.- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on a Board Management Controller (BMC) connected to an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the BMC to the CPU.Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>---
Changes since v1:
1. remove header file and move in alphabetical order 2. make all comments multiline 3. remove thepr_err, needed for debugging only 4. fix #define tab issue 5. uninitailize err,
- correct spelling & remove extra ()
- remove extra i2c functionality check 6. reduce call todata->client7. remove usage of uniondrivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 341 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 352 insertions(+)create mode 100644
drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig index renamed from drivers/hwmon/Kconfig +0
-0
87624902ea80..f489972a6309100644drivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST diff --gita/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index
59e78bc212cf..8031acf58936100644drivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file renamed from drivers/hwmon/sbrmi.c +0
-0mode 100644 index 000000000000..10622b1f23f2
drivers/hwmon/sbrmi.c new file +96
-0@@ -0,0 +1,341 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc. +*/ + +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> + +/* Do not allow setting negative power limit */ +#define SBRMI_PWR_MIN 0 +/* Mask for Status Register bit[1] */ +#define SW_ALERT_MASK 0x2 + +/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power +management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 , +SBRMI_INBNDMSG3 , +SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , +SBRMI_SW_INTERRUPT , +}; + +/* Each client has this additional data */ struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +u32 data_in; +u32 data_out; +}; + +static int sbrmi_enable_alert (struct i2c_client *client) { +int ctrl; + +/* +* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; +return i2c_smbus_write_byte_data (client, +SBRMI_CTRL , ctrl); + } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) {drivers/hwmon/sbrmi.c line 106
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+int i, ret, retry =10 ; +int sw_status; +u8 byte; + +mutex_lock (&data->lock); + + ret =sbrmi_enable_alert (data->client); +if (ret <0 ) + goto exit_unlock; +Is it really necessary to call this for every command (instead of once during probe) ? [naveenk:] Will move it
Quoted 45 lines
drivers/hwmon/sbrmi.c new file +45
-0+/* Indicate firmware a command is to be serviced */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (ret <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd); +if (ret <0 ) + goto exit_unlock; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ +for (i =0 ; i <4 ; i++) { + byte = (msg->data_in >> i *8 ) &0xff ; + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG1 + i, byte); +if (ret <0 ) + goto exit_unlock; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (ret <0 ) + goto exit_unlock; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/ + do { + sw_status = i2c_smbus_read_byte_data(data->client, + SBRMI_STATUS); + if (sw_status < 0) { + ret = sw_status; + goto exit_unlock;
Quoted 9 lines
drivers/hwmon/sbrmi.c line 157
Quoted 4 lines
drivers/hwmon/sbrmi.c new file +4
-0+ } +if (sw_status &SW_ALERT_MASK ) +break ; +usleep_range (50 ,100 );I don't have the interface specification, but is ~600 uS guaranteed to be sufficient time for the firmware to respond ? [naveenk:] The SB-RMI is explained in the APML chapter of the reference manual available https://www.amd.com/en/support/tech-docs?keyword=55898
I did not find any mention of the response time, we ran several times and never seen the loop execute twice. Do you have any recommendation here ?
Not really. The code is good enough for me if it is good enough for you, especially if the timeout is not well defined.
Quoted 114 lines
drivers/hwmon/sbrmi.c
Quoted 5 lines
drivers/hwmon/sbrmi.c new file +5
-0+ }while (retry--); + +if (retry <0 ) { +pr_err ("Firmware fail to indicate command + completion\n");Please use
dev_err(). Also, does this really warrant an error message ?
I am concerned that it may fill up the log if there is an issue with the client, eg if it hangs. On top of that, there is already an error message below. Please no more than one message per error. [naveenk:] Sure will change todev_errand remove one of the printsdrivers/hwmon/sbrmi.c line 162
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+ ret =-1 ;Please use standard error codes (
-ETIMEDOUT?-EIO?-EPROTO?). -1 translates to-EPERMwhich is presumably not what you want. [naveenk:] Will use-EIOQuoted 4 lines
drivers/hwmon/sbrmi.c new file +4
-0+ goto exit_unlock; + } + +/* drivers/hwmon/sbrmi.c line 176
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+* For a read operation, the initiator (BMC) reads the firmware +* response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + ret =i2c_smbus_read_byte_data (data->client, +SBRMI_OUTBNDMSG1 + i); +if (ret <0 ) + goto exit_unlock;This is a concern in conjunction with the ignored error in
sbrmi_write().
If there is an error after reading a number of bytes, the returned value will be partial/random. [naveenk:] Will address the return valuedrivers/hwmon/sbrmi.c line 177
Quoted 1 line
drivers/hwmon/sbrmi.c new file +1
-0+ msg->data_out |= (ret &0xff ) << i *8 ;The mask is unnecessary here. A byte read will never return a value >
0xff. [naveenk:] Sure will removedrivers/hwmon/sbrmi.c line 190
Quoted 13 lines
drivers/hwmon/sbrmi.c new file +13
-0+ } + } + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + ret =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + sw_status |SW_ALERT_MASK ); + +exit_unlock: +if (ret <0 ) +pr_err ("SMBUS translation failed\n" );
dev_err(). Also, please consider that this may fill the log if the client or the i2c controller/bus has a problem. [naveenk:] Will remove this printQuoted 41 lines
drivers/hwmon/sbrmi.c new file +41
-0+ +mutex_unlock (&data->lock); +return ret; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +default : +return -EINVAL ; + } +/* hwmon power attributes are in microWatt */ + *val = (long )msg.data_out *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) { +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +drivers/hwmon/sbrmi.c line 243
Quoted 10 lines
drivers/hwmon/sbrmi.c new file +10
-0+if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.data_in =0 ;Unnecessary (already initialized above).
drivers/hwmon/sbrmi.c line 242
Quoted 2 lines
drivers/hwmon/sbrmi.c new file +2
-0+ msg.read = true; +rmi_mailbox_xfer (data, &msg);
Quoted 8 lines
Not sure if it is a good idea to ignore an error return here.
As far as I can see inrmi_mailbox_xfer(), the returned value is more or less random if there is an error.If the maximum power limit is static, it might make sense to read it only once in the prob function and cache the limit in struct
sbrmi_datainstead of reading it repeatedly. [naveenk:] The maximum limit is fixed, will cache during probe.
If the limit is not static and it is indeed necessary to re-read the limit, isn't this racy if there are multiple write requests in parallel ? [naveenk:] the operating limit value can be set to a value below themax_limit
Yes, I understand. My concern was potential race if the first mailbox transfer would not return a constant. This is not an issue if there is only one mailbox transfer.
Thanks,
Guenter
PATCH v3 1/3 hwmon: sbrmi: Add support for sbrmi power module
In reply to Naveen Krishna ChatradhiFrom: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the
Side-Band Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to manage power consumption and power limits of the CPU socket.
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on a Board Management Controller (BMC) connected to an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the BMC to the CPU.
---
Changes since v2:
1. Modify to cache the power_limi_max during probe
2. Enable alert during probe
3. Use dev_err instead of pr_err
4. Remove unnecessry bit mask
5. Checking rmi_mailbox_xfer retrun value
drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 358 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 369 insertions(+) create mode 100644 drivers/hwmon/sbrmi.c
drivers/hwmon/Kconfig +10 -0
@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST
drivers/hwmon/Makefile +1 -0
@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.o
drivers/hwmon/sbrmi.c new file +358 -0
358 lines not on this page · raw message
Signature · 1 line
2.17.1
PATCH v3 2/3 hwmon: sbrmi: Add Documentation
From: Akshay Gupta <[email protected]>
- Add documentation for sbrmi module
---
Changes since v2:
None
Documentation/hwmon/index.rst | 1 + Documentation/hwmon/sbrmi.rst | 79 +++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) create mode 100644 Documentation/hwmon/sbrmi.rst
Documentation/hwmon/index.rst +1 -0
@@ -158,6 +158,7 @@ Hardware Monitoring Kernel Drivers q54sj108a2 raspberrypi-hwmon sbtsi_temp + sbrmi sch5627 sch5636 scpi-hwmon
Documentation/hwmon/sbrmi.rst new file +79 -0
79 lines not on this page · raw message
Signature · 1 line
2.17.1
Re: [PATCH v3 2/3] hwmon: sbrmi: Add Documentation
Quoted 20 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
- Add documentation for sbrmi module
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>---
Changes since v2:
NoneDocumentation/hwmon/index.rst | 1 + Documentation/hwmon/sbrmi.rst | 79 +++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+)create mode 100644
Documentation/hwmon/sbrmi.rstDocumentation/hwmon/index.rst +0
-0
Documentation/hwmon/index.rst Hardware Monitoring Kernel Drivers · line 161
Quoted 4 lines
Documentation/hwmon/index.rst +1
-0@@ -158,6 +158,7 @@ Hardware Monitoring Kernel Drivers q54sj108a2 raspberrypi-hwmon sbtsi_temp + sbrmi
alphabetic order, please.
Other than that, for my reference,
Quoted 89 lines
Documentation/hwmon/index.rst +0
-0sch5627 sch5636 scpi-hwmonDocumentation/hwmon/sbrmi.rst new file +79
-0@@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver sbrmi +=================== + +Supported hardware: + + * Sideband Remote Management Interface (SB-RMI) compliant AMD SoC + device connected to the BMC via the APML. + + Prefix: 'sbrmi' + + Addresses scanned: This driver doesn't support address scanning. + + To instantiate this driver on an AMD CPU with SB-RMI + support, the i2c bus number would be the bus connected from the board + management controller (BMC) to the CPU. + The SMBus address is really 7 bits. Some vendors and the SMBus + specification show the address as 8 bits, left justified with the R/W + bit as a write (0) making bit 0. Some vendors use only the 7 bits + to describe the address. + As mentioned in AMD's APML specification, The SB-RMI address is + normally 78h(0111 100W) or 3Ch(011 1100) for socket 0 and 70h(0111 000W) + or 38h(011 1000) for socket 1, but it could vary based on hardware + address select pins. + + Datasheet: The SB-RMI interface and protocol along with the Advanced + Platform Management Link (APML) Specification is available + as part of the open source SoC register reference at: + + https://www.amd.com/en/support/tech-docs?keyword=55898 + +Author: Akshay Gupta <[email protected]> + +Description +----------- + +The APML provides a way to communicate with the SB Remote Management interface +(SB-RMI) module from the external SMBus master that can be used to report socket +power on AMD platforms using mailbox command and resembles a typical 8-pin remote +power sensor's I2C interface to BMC. + +This driver implements current power with power cap and power cap max. + +sysfs-Interface +--------------- +Power sensors can be queried and set via the standard ``hwmon`` interface +on ``sysfs``, under the directory ``/sys/class/hwmon/hwmonX`` for some value +of ``X`` (search for the ``X`` such that ``/sys/class/hwmon/hwmonX/name`` has +content ``sbrmi``) + +================ ===== ======================================================== +Name Perm Description +================ ===== ======================================================== +power1_input RO Current Power consumed +power1_cap RW Power limit can be set between 0 and power1_cap_max +power1_cap_max RO Maximum powerlimit calculated and reported by the SMU FW +================ ===== ======================================================== + +The following example show how the 'Power' attribute from the i2c-addresses +can be monitored using the userspace utilities like ``sensors`` binary:: + + # sensors + sbrmi-i2c-1-38 + Adapter: bcm2835 I2C adapter + power1: 61.00 W (cap = 225.00 W) + + sbrmi-i2c-1-3c + Adapter: bcm2835 I2C adapter + power1: 28.39 W (cap = 224.77 W) + # + +Also, Below shows how get and set the values from sysfs entries individually:: + # cat /sys/class/hwmon/hwmon1/power1_cap_max + 225000000 + + # echo 180000000 > /sys/class/hwmon/hwmon1/power1_cap + # cat /sys/class/hwmon/hwmon1/power1_cap + 180000000
PATCH v3 3/3 dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings
In reply to Naveen Krishna ChatradhiFrom: Akshay Gupta <[email protected]>
- Document device tree bindings for AMD SB-RMI emulated service.
---
Changes since v2:
None
.../devicetree/bindings/hwmon/amd,sbrmi.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml
Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml new file +53 -0
@@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/amd,sbrmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: > + Sideband Remote Management Interface (SB-RMI) compliant + AMD SoC power device. + +maintainers: + - Akshay Gupta <[email protected]> + +description: | + SB Remote Management Interface (SB-RMI) is an SMBus compatible + interface that reports AMD SoC's Power (normalized Power) using, + Mailbox Service Request and resembles a typical 8-pin remote power + sensor's I2C interface to BMC. The power attributes in hwmon + reports power in microwatts. + +properties: + compatible: + enum: + - amd,sbrmi + + reg: + maxItems: 1 + description: | + I2C bus address of the device as specified in Section SBI SMBus Address + of the SoC register reference. The SB-RMI address is normally 78h for + socket 0 and 70h for socket 1, but it could vary based on hardware + address select pins. + \[open source SoC register reference\] + https://www.amd.com/en/support/tech-docs?keyword=55898 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + sbrmi@3c { + compatible = "amd,sbrmi"; + reg = <0x3c>; + }; + }; +...
Signature · 1 line
2.17.1
Guenter Roeck
maintainerRe: [PATCH v3 3/3] dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings
Quoted 6 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
- Document device tree bindings for AMD SB-RMI emulated service.
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>
Devicetree files need to be approved by a dt maintainer. They can't do that if they are not copied on devicetree patches.
Guenter
Quoted 68 lines
---
Changes since v2:
None.../devicetree/bindings/hwmon/amd,sbrmi.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+)create mode 100644
Documentation/devicetree/bindings/hwmon/amd,sbrmi.yamlDocumentation/devicetree/bindings/hwmon/amd,sbrmi.yaml new file +53
-0@@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/amd,sbrmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: > + Sideband Remote Management Interface (SB-RMI) compliant + AMD SoC power device. + +maintainers: + - Akshay Gupta <[email protected]> + +description: | + SB Remote Management Interface (SB-RMI) is an SMBus compatible + interface that reports AMD SoC's Power (normalized Power) using, + Mailbox Service Request and resembles a typical 8-pin remote power + sensor's I2C interface to BMC. The power attributes in hwmon + reports power in microwatts. + +properties: + compatible: + enum: + - amd,sbrmi + + reg: + maxItems: 1 + description: | + I2C bus address of the device as specified in Section SBI SMBus Address + of the SoC register reference. The SB-RMI address is normally 78h for + socket 0 and 70h for socket 1, but it could vary based on hardware + address select pins. + \[open source SoC register reference\] + https://www.amd.com/en/support/tech-docs?keyword=55898 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + sbrmi@3c { + compatible = "amd,sbrmi"; + reg = <0x3c>; + }; + }; +...
RE: [PATCH v3 3/3] dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings
[AMD Official Use Only]
Hi Guenter,
Regards,
Naveenk
-----Original Message-----
From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
Sent: Monday, July 26, 2021 3:07 AM
To: Chatradhi, Naveen Krishna <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: Re: [PATCH v3 3/3] dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings
[CAUTION: External Email]
Quoted 6 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
- Document device tree bindings for AMD SB-RMI emulated service.
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>
Devicetree files need to be approved by a dt maintainer.
They can't do that if they are not copied on devicetree patches.
[naveenk:] Yes, my bad. Can I add the devicetree list now here or should I submit v4 of the patch-set with your reviewed-by on other 2 patches and copying the devicetree list.
Guenter
Quoted 90 lines
---
Changes since v2:
None.../devicetree/bindings/hwmon/amd,sbrmi.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+)create mode 100644
Documentation/devicetree/bindings/hwmon/amd,sbrmi.yamlDocumentation/devicetree/bindings/hwmon/amd,sbrmi.yaml new file +73
-0@@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 +--- +$id: +https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi +cetree.org%2Fschemas%2Fhwmon%2Famd%2Csbrmi.yaml%23&data=04%7C01%7 +CNaveenKrishna.Chatradhi%40amd.com%7C8a8332e2358f4c37030d08d94fb456ac +%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637628458245183191%7CUn +known%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha +WwiLCJXVCI6Mn0%3D%7C1000&sdata=Xwsc2G6T34oiV4aTzYLEb%2FLpoTj%2BW% +2B6LmRkAFyeauQ8%3D&reserved=0 +$schema: +https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=04%7C01%7CNaveenKri +shna.Chatradhi%40amd.com%7C8a8332e2358f4c37030d08d94fb456ac%7C3dd8961 +fe4884e608e11a82d994e183d%7C0%7C0%7C637628458245183191%7CUnknown%7CTW +FpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI +6Mn0%3D%7C1000&sdata=ieeFYJjYCyDzHrcGjvHWkkU6QHqXcBqOa4Kfsmqk3Ek% +3D&reserved=0 + +title: > + Sideband Remote Management Interface (SB-RMI) compliant + AMD SoC power device. + +maintainers: + - Akshay Gupta <[email protected]> + +description: | + SB Remote Management Interface (SB-RMI) is an SMBus compatible + interface that reports AMD SoC's Power (normalized Power) using, + Mailbox Service Request and resembles a typical 8-pin remote power + sensor's I2C interface to BMC. The power attributes in hwmon + reports power in microwatts. + +properties: + compatible: + enum: + - amd,sbrmi + + reg: + maxItems: 1 + description: | + I2C bus address of the device as specified in Section SBI SMBus Address + of the SoC register reference. The SB-RMI address is normally 78h for + socket 0 and 70h for socket 1, but it could vary based on hardware + address select pins. + \[open source SoC register reference\] + + https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww + w.amd.com%2Fen%2Fsupport%2Ftech-docs%3Fkeyword%3D55898&data=04%7 + C01%7CNaveenKrishna.Chatradhi%40amd.com%7C8a8332e2358f4c37030d08d94f + b456ac%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C6376284582451831 + 91%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT + iI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=eG384k%2FtNMNJD17u7qdIhjI + p2sz%2B6Qs5PpAprL54saU%3D&reserved=0 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + sbrmi@3c { + compatible = "amd,sbrmi"; + reg = <0x3c>; + }; + }; +...
Guenter Roeck
maintainerRe: [PATCH v3 3/3] dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings
Quoted 2 lines · Naveen Krishna
[AMD Official Use Only]
You really should get rid of this...
Quoted 19 lines
Hi Guenter,
Regards,
Naveenk-----Original Message-----
From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
Sent: Monday, July 26, 2021 3:07 AM
To: Chatradhi, Naveen Krishna <[email protected]>; [email protected]
Cc: Gupta, Akshay <[email protected]>
Subject: Re: [PATCH v3 3/3] dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings[CAUTION: External Email]
Quoted 4 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
- Document device tree bindings for AMD SB-RMI emulated service.
Quoted 8 lines
Quoted 2 lines
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>Devicetree files need to be approved by a dt maintainer.
They can't do that if they are not copied on devicetree patches.
[naveenk:] Yes, my bad. Can I add the devicetree list now here or should I submit v4 of the patch-set with your reviewed-by on other 2 patches and copying the devicetree list.
Probably better to submit v4
Guenter
Quoted 92 lines
Guenter
Quoted 90 lines
---
Changes since v2:
None.../devicetree/bindings/hwmon/amd,sbrmi.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+)create mode 100644
Documentation/devicetree/bindings/hwmon/amd,sbrmi.yamlDocumentation/devicetree/bindings/hwmon/amd,sbrmi.yaml new file +73
-0@@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 +--- +$id: +https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi +cetree.org%2Fschemas%2Fhwmon%2Famd%2Csbrmi.yaml%23&data=04%7C01%7 +CNaveenKrishna.Chatradhi%40amd.com%7C8a8332e2358f4c37030d08d94fb456ac +%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637628458245183191%7CUn +known%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha +WwiLCJXVCI6Mn0%3D%7C1000&sdata=Xwsc2G6T34oiV4aTzYLEb%2FLpoTj%2BW% +2B6LmRkAFyeauQ8%3D&reserved=0 +$schema: +https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=04%7C01%7CNaveenKri +shna.Chatradhi%40amd.com%7C8a8332e2358f4c37030d08d94fb456ac%7C3dd8961 +fe4884e608e11a82d994e183d%7C0%7C0%7C637628458245183191%7CUnknown%7CTW +FpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI +6Mn0%3D%7C1000&sdata=ieeFYJjYCyDzHrcGjvHWkkU6QHqXcBqOa4Kfsmqk3Ek% +3D&reserved=0 + +title: > + Sideband Remote Management Interface (SB-RMI) compliant + AMD SoC power device. + +maintainers: + - Akshay Gupta <[email protected]> + +description: | + SB Remote Management Interface (SB-RMI) is an SMBus compatible + interface that reports AMD SoC's Power (normalized Power) using, + Mailbox Service Request and resembles a typical 8-pin remote power + sensor's I2C interface to BMC. The power attributes in hwmon + reports power in microwatts. + +properties: + compatible: + enum: + - amd,sbrmi + + reg: + maxItems: 1 + description: | + I2C bus address of the device as specified in Section SBI SMBus Address + of the SoC register reference. The SB-RMI address is normally 78h for + socket 0 and 70h for socket 1, but it could vary based on hardware + address select pins. + \[open source SoC register reference\] + + https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww + w.amd.com%2Fen%2Fsupport%2Ftech-docs%3Fkeyword%3D55898&data=04%7 + C01%7CNaveenKrishna.Chatradhi%40amd.com%7C8a8332e2358f4c37030d08d94f + b456ac%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C6376284582451831 + 91%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT + iI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=eG384k%2FtNMNJD17u7qdIhjI + p2sz%2B6Qs5PpAprL54saU%3D&reserved=0 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + sbrmi@3c { + compatible = "amd,sbrmi"; + reg = <0x3c>; + }; + }; +...
Quoted 12 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the
Side-Band Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to manage power consumption and power limits of the CPU socket.
Quoted 8 lines
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on a Board Management Controller (BMC) connected to an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the BMC to the CPU.Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>
For my reference:
I can only apply the patch series after the bindings have been approved by a devicetree maintainer.
Guenter
Quoted 412 lines
---
Changes since v2:
1. Modify to cache thepower_limi_maxduring probe
2. Enable alert during probe
3. Usedev_errinstead ofpr_err
4. Remove unnecessry bit mask
5. Checkingrmi_mailbox_xferretrun valuedrivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 358 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 369 insertions(+)create mode 100644
drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TESTdrivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file +358
-0@@ -0,0 +1,358 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc. +*/ + +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> + +/* Do not allow setting negative power limit */ +#define SBRMI_PWR_MIN 0 +/* Mask for Status Register bit[1] */ +#define SW_ALERT_MASK 0x2 + +/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 , +SBRMI_INBNDMSG3 , +SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , +SBRMI_SW_INTERRUPT , +}; + +/* Each client has this additional data */ +struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +u32 pwr_limit_max; +}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +u32 data_in; +u32 data_out; +}; + +static int sbrmi_enable_alert (struct i2c_client *client) +{ +int ctrl; + +/* +* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; +return i2c_smbus_write_byte_data (client, +SBRMI_CTRL , ctrl); + } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) +{ +int i, ret, retry =10 ; +int sw_status; +u8 byte; + +mutex_lock (&data->lock); + +/* Indicate firmware a command is to be serviced */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (ret <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd); +if (ret <0 ) + goto exit_unlock; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ +for (i =0 ; i <4 ; i++) { + byte = (msg->data_in >> i *8 ) &0xff ; + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG1 + i, byte); +if (ret <0 ) + goto exit_unlock; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (ret <0 ) + goto exit_unlock; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/ +do { + sw_status =i2c_smbus_read_byte_data (data->client, +SBRMI_STATUS ); +if (sw_status <0 ) { + ret = sw_status; + goto exit_unlock; + } +if (sw_status &SW_ALERT_MASK ) +break ; +usleep_range (50 ,100 ); + }while (retry--); + +if (retry <0 ) { +dev_err (&data->client->dev, +"Firmware fail to indicate command completion\n" ); + ret = -EIO ; + goto exit_unlock; + } + +/* +* For a read operation, the initiator (BMC) reads the firmware +* response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + ret =i2c_smbus_read_byte_data (data->client, +SBRMI_OUTBNDMSG1 + i); +if (ret <0 ) + goto exit_unlock; + msg->data_out |= ret << i *8 ; + } + } + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + ret =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + sw_status |SW_ALERT_MASK ); + +exit_unlock: +mutex_unlock (&data->lock); +return ret; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) +{ +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.data_out = data->pwr_limit_max; +break ; +default : +return -EINVAL ; + } +if (ret <0 ) +return ret; +/* hwmon power attributes are in microWatt */ + *val = (long )msg.data_out *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) +{ +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; + +if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + val =clamp_val (val,SBRMI_PWR_MIN , data->pwr_limit_max); + + msg.cmd =SBRMI_WRITE_PKG_PWR_LIMIT ; + msg.data_in = val; + msg.read = false; + +return rmi_mailbox_xfer (data, &msg); +} + +static umode_t sbrmi_is_visible (const void *data, +enum hwmon_sensor_types type, +u32 attr,int channel) +{ +switch (type) { +case hwmon_power: +switch (attr) { +case hwmon_power_input: +case hwmon_power_cap_max: +return 0444 ; +case hwmon_power_cap: +return 0644 ; + } +break ; +default : +break ; + } +return 0 ; +} + +static const struct hwmon_channel_info *sbrmi_info[] = { +HWMON_CHANNEL_INFO (power, +HWMON_P_INPUT |HWMON_P_CAP |HWMON_P_CAP_MAX ), +NULL +}; + +static const struct hwmon_ops sbrmi_hwmon_ops = { + .is_visible = sbrmi_is_visible, + .read = sbrmi_read, + .write = sbrmi_write, +}; + +static const struct hwmon_chip_info sbrmi_chip_info = { + .ops = &sbrmi_hwmon_ops, + .info = sbrmi_info, +}; + +static int sbrmi_get_max_pwr_limit (struct sbrmi_data *data) +{ +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.read = true; + ret =rmi_mailbox_xfer (data, &msg); +if (ret <0 ) +return ret; + data->pwr_limit_max = msg.data_out; + +return ret; +} + +static int sbrmi_probe (struct i2c_client *client, +const struct i2c_device_id *id) +{ +struct device *dev = &client->dev; +struct device *hwmon_dev; +struct sbrmi_data *data; +int ret; + + data =devm_kzalloc (dev,sizeof (struct sbrmi_data ),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->client = client; +mutex_init (&data->lock); + +/* Enable alert for SB-RMI sequence */ + ret =sbrmi_enable_alert (client); +if (ret <0 ) +return ret; + +/* Cache maximum power limit */ + ret =sbrmi_get_max_pwr_limit (data); +if (ret <0 ) +return ret; + + hwmon_dev =devm_hwmon_device_register_with_info (dev, client->name, data, + &sbrmi_chip_info,NULL ); + +return PTR_ERR_OR_ZERO (hwmon_dev); +} + +static const struct i2c_device_id sbrmi_id[] = { + {"sbrmi" ,0 }, + {} +}; +MODULE_DEVICE_TABLE (i2c, sbrmi_id); + +static const struct of_device_id __maybe_unused sbrmi_of_match[] = { + { + .compatible ="amd,sbrmi" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, sbrmi_of_match); + +static struct i2c_driver sbrmi_driver = { + .class =I2C_CLASS_HWMON , + .driver = { + .name ="sbrmi" , + .of_match_table =of_match_ptr (sbrmi_of_match), + }, + .probe = sbrmi_probe, + .id_table = sbrmi_id, +}; + +module_i2c_driver (sbrmi_driver); + +MODULE_AUTHOR ("Akshay Gupta <[email protected]>" ); +MODULE_DESCRIPTION ("Hwmon driver for AMD SB-RMI emulated sensor" ); +MODULE_LICENSE ("GPL" );
PATCH v4 1/3 hwmon: sbrmi: Add support for sbrmi power module
In reply to Naveen Krishna ChatradhiFrom: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the
Side-Band Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to manage power consumption and power limits of the CPU socket.
- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on a Board Management Controller (BMC) connected to an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the BMC to the CPU.
---
Changes since v3:
Added reviewed by Guenter Roeck
drivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 358 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 369 insertions(+) create mode 100644 drivers/hwmon/sbrmi.c
drivers/hwmon/Kconfig +10 -0
@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TEST
drivers/hwmon/Makefile +1 -0
@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.o
drivers/hwmon/sbrmi.c new file +358 -0
358 lines not on this page · raw message
Signature · 1 line
2.17.1
PATCH v4 2/3 hwmon: sbrmi: Add Documentation
From: Akshay Gupta <[email protected]>
- Add documentation for sbrmi module
---
Changes since v3:
1. Maintain alphabetical order
2. Added reviewed by Guenter Roeck
Documentation/hwmon/index.rst | 1 + Documentation/hwmon/sbrmi.rst | 79 +++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) create mode 100644 Documentation/hwmon/sbrmi.rst
Documentation/hwmon/index.rst +1 -0
@@ -160,6 +160,7 @@ Hardware Monitoring Kernel Drivers pwm-fan q54sj108a2 raspberrypi-hwmon + sbrmi sbtsi_temp sch5627 sch5636
Documentation/hwmon/sbrmi.rst new file +79 -0
79 lines not on this page · raw message
Signature · 1 line
2.17.1
PATCH v4 3/3 dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings
In reply to Naveen Krishna ChatradhiFrom: Akshay Gupta <[email protected]>
- Document device tree bindings for AMD SB-RMI emulated service.
---
Changes since v3:
None
.../devicetree/bindings/hwmon/amd,sbrmi.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml
Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml new file +53 -0
@@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/amd,sbrmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: > + Sideband Remote Management Interface (SB-RMI) compliant + AMD SoC power device. + +maintainers: + - Akshay Gupta <[email protected]> + +description: | + SB Remote Management Interface (SB-RMI) is an SMBus compatible + interface that reports AMD SoC's Power (normalized Power) using, + Mailbox Service Request and resembles a typical 8-pin remote power + sensor's I2C interface to BMC. The power attributes in hwmon + reports power in microwatts. + +properties: + compatible: + enum: + - amd,sbrmi + + reg: + maxItems: 1 + description: | + I2C bus address of the device as specified in Section SBI SMBus Address + of the SoC register reference. The SB-RMI address is normally 78h for + socket 0 and 70h for socket 1, but it could vary based on hardware + address select pins. + \[open source SoC register reference\] + https://www.amd.com/en/support/tech-docs?keyword=55898 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + sbrmi@3c { + compatible = "amd,sbrmi"; + reg = <0x3c>; + }; + }; +...
Signature · 1 line
2.17.1
Re: [PATCH v4 3/3] dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings
Quoted 6 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
- Document device tree bindings for AMD SB-RMI emulated service.
Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>
Quoted 8 lines
---
Changes since v3:
None.../devicetree/bindings/hwmon/amd,sbrmi.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml
Guenter Roeck
maintainerQuoted 18 lines · Naveen Krishna Chatradhi
From: Akshay Gupta <[email protected]>
On AMD platforms the Out-of-band access is provided by Advanced Platform Management Link (APML), APML is a SMBus v2.0 compatible 2-wire processor client interface. APML is also referred as the sideband interface (SBI).
APML is used to communicate with the
Side-Band Remote Management Interface (SB-RMI) which provides Soft Mailbox messages to manage power consumption and power limits of the CPU socket.- This module add support to read power consumption, power limit & max power limit and write power limit.
- To instantiate this driver on a Board Management Controller (BMC) connected to an AMD CPU with SB-RMI support, the i2c bus number would be the bus connected from the BMC to the CPU.
Quoted 3 lines
Reviewed-by Guenter Roeck <[email protected]>Signed-off-by Akshay Gupta <[email protected]>Signed-off-by Naveen Krishna Chatradhi <[email protected]>
Series applied.
Thanks,
Guenter
Quoted 408 lines
---
Changes since v3:
Added reviewed by Guenter Roeckdrivers/hwmon/Kconfig | 10 ++ drivers/hwmon/Makefile | 1 + drivers/hwmon/sbrmi.c | 358 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 369 insertions(+)create mode 100644
drivers/hwmon/sbrmi.cdrivers/hwmon/Kconfig +10
-0@@ -1551,6 +1551,16 @@ config SENSORS_SBTSI This driver can also be built as a module. If so, the module will be called sbtsi_temp. +config SENSORS_SBRMI + tristate "Emulated SB-RMI sensor" + depends on I2C + help + If you say yes here you get support for emulated RMI + sensors on AMD SoCs with APML interface connected to a BMC device. + + This driver can also be built as a module. If so, the module will + be called sbrmi. + config SENSORS_SHT15 tristate "Sensiron humidity and temperature sensors. SHT15 and compat." depends on GPIOLIB || COMPILE_TESTdrivers/hwmon/Makefile +1
-0@@ -164,6 +164,7 @@ obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o obj-$(CONFIG_SENSORS_SCH5636) += sch5636.odrivers/hwmon/sbrmi.c new file +358
-0@@ -0,0 +1,358 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* +* sbrmi.c - hwmon driver for a SB-RMI mailbox +* compliant AMD SoC device. +* +* Copyright (C) 2020-2021 Advanced Micro Devices, Inc. +*/ + +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/hwmon.h> +#include <linux/i2c.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/of.h> + +/* Do not allow setting negative power limit */ +#define SBRMI_PWR_MIN 0 +/* Mask for Status Register bit[1] */ +#define SW_ALERT_MASK 0x2 + +/* Software Interrupt for triggering */ +#define START_CMD 0x80 +#define TRIGGER_MAILBOX 0x01 + +/* +* SB-RMI supports soft mailbox service request to MP1 (power management +* firmware) through SBRMI inbound/outbound message registers. +* SB-RMI message IDs +*/ +enum sbrmi_msg_id { +SBRMI_READ_PKG_PWR_CONSUMPTION =0x1 , +SBRMI_WRITE_PKG_PWR_LIMIT , +SBRMI_READ_PKG_PWR_LIMIT , +SBRMI_READ_PKG_MAX_PWR_LIMIT , +}; + +/* SB-RMI registers */ +enum sbrmi_reg { +SBRMI_CTRL =0x01 , +SBRMI_STATUS , +SBRMI_OUTBNDMSG0 =0x30 , +SBRMI_OUTBNDMSG1 , +SBRMI_OUTBNDMSG2 , +SBRMI_OUTBNDMSG3 , +SBRMI_OUTBNDMSG4 , +SBRMI_OUTBNDMSG5 , +SBRMI_OUTBNDMSG6 , +SBRMI_OUTBNDMSG7 , +SBRMI_INBNDMSG0 , +SBRMI_INBNDMSG1 , +SBRMI_INBNDMSG2 , +SBRMI_INBNDMSG3 , +SBRMI_INBNDMSG4 , +SBRMI_INBNDMSG5 , +SBRMI_INBNDMSG6 , +SBRMI_INBNDMSG7 , +SBRMI_SW_INTERRUPT , +}; + +/* Each client has this additional data */ +struct sbrmi_data { +struct i2c_client *client; +struct mutex lock; +u32 pwr_limit_max; +}; + +struct sbrmi_mailbox_msg { +u8 cmd; +bool read; +u32 data_in; +u32 data_out; +}; + +static int sbrmi_enable_alert (struct i2c_client *client) +{ +int ctrl; + +/* +* Enable the SB-RMI Software alert status +* by writing 0 to bit 4 of Control register(0x1) +*/ + ctrl =i2c_smbus_read_byte_data (client,SBRMI_CTRL ); +if (ctrl <0 ) +return ctrl; + +if (ctrl &0x10 ) { + ctrl &= ~0x10 ; +return i2c_smbus_write_byte_data (client, +SBRMI_CTRL , ctrl); + } + +return 0 ; +} + +static int rmi_mailbox_xfer (struct sbrmi_data *data, +struct sbrmi_mailbox_msg *msg) +{ +int i, ret, retry =10 ; +int sw_status; +u8 byte; + +mutex_lock (&data->lock); + +/* Indicate firmware a command is to be serviced */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG7 ,START_CMD ); +if (ret <0 ) + goto exit_unlock; + +/* Write the command to SBRMI::InBndMsg_inst0 */ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG0 , msg->cmd); +if (ret <0 ) + goto exit_unlock; + +/* +* For both read and write the initiator (BMC) writes +* Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] +* SBRMI_x3C(MSB):SBRMI_x39(LSB) +*/ +for (i =0 ; i <4 ; i++) { + byte = (msg->data_in >> i *8 ) &0xff ; + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_INBNDMSG1 + i, byte); +if (ret <0 ) + goto exit_unlock; + } + +/* +* Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to +* perform the requested read or write command +*/ + ret =i2c_smbus_write_byte_data (data->client, +SBRMI_SW_INTERRUPT ,TRIGGER_MAILBOX ); +if (ret <0 ) + goto exit_unlock; + +/* +* Firmware will write SBRMI::Status[SwAlertSts]=1 to generate +* an ALERT (if enabled) to initiator (BMC) to indicate completion +* of the requested command +*/ +do { + sw_status =i2c_smbus_read_byte_data (data->client, +SBRMI_STATUS ); +if (sw_status <0 ) { + ret = sw_status; + goto exit_unlock; + } +if (sw_status &SW_ALERT_MASK ) +break ; +usleep_range (50 ,100 ); + }while (retry--); + +if (retry <0 ) { +dev_err (&data->client->dev, +"Firmware fail to indicate command completion\n" ); + ret = -EIO ; + goto exit_unlock; + } + +/* +* For a read operation, the initiator (BMC) reads the firmware +* response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] +* {SBRMI_x34(MSB):SBRMI_x31(LSB)}. +*/ +if (msg->read) { +for (i =0 ; i <4 ; i++) { + ret =i2c_smbus_read_byte_data (data->client, +SBRMI_OUTBNDMSG1 + i); +if (ret <0 ) + goto exit_unlock; + msg->data_out |= ret << i *8 ; + } + } + +/* +* BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the +* ALERT to initiator +*/ + ret =i2c_smbus_write_byte_data (data->client,SBRMI_STATUS , + sw_status |SW_ALERT_MASK ); + +exit_unlock: +mutex_unlock (&data->lock); +return ret; +} + +static int sbrmi_read (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long *val) +{ +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + +if (type != hwmon_power) +return -EINVAL ; + + msg.read = true; +switch (attr) { +case hwmon_power_input: + msg.cmd =SBRMI_READ_PKG_PWR_CONSUMPTION ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap: + msg.cmd =SBRMI_READ_PKG_PWR_LIMIT ; + ret =rmi_mailbox_xfer (data, &msg); +break ; +case hwmon_power_cap_max: + msg.data_out = data->pwr_limit_max; +break ; +default : +return -EINVAL ; + } +if (ret <0 ) +return ret; +/* hwmon power attributes are in microWatt */ + *val = (long )msg.data_out *1000 ; +return ret; +} + +static int sbrmi_write (struct device *dev,enum hwmon_sensor_types type, +u32 attr,int channel,long val) +{ +struct sbrmi_data *data =dev_get_drvdata (dev); +struct sbrmi_mailbox_msg msg = {0 }; + +if (type != hwmon_power && attr != hwmon_power_cap) +return -EINVAL ; +/* +* hwmon power attributes are in microWatt +* mailbox read/write is in mWatt +*/ + val /=1000 ; + + val =clamp_val (val,SBRMI_PWR_MIN , data->pwr_limit_max); + + msg.cmd =SBRMI_WRITE_PKG_PWR_LIMIT ; + msg.data_in = val; + msg.read = false; + +return rmi_mailbox_xfer (data, &msg); +} + +static umode_t sbrmi_is_visible (const void *data, +enum hwmon_sensor_types type, +u32 attr,int channel) +{ +switch (type) { +case hwmon_power: +switch (attr) { +case hwmon_power_input: +case hwmon_power_cap_max: +return 0444 ; +case hwmon_power_cap: +return 0644 ; + } +break ; +default : +break ; + } +return 0 ; +} + +static const struct hwmon_channel_info *sbrmi_info[] = { +HWMON_CHANNEL_INFO (power, +HWMON_P_INPUT |HWMON_P_CAP |HWMON_P_CAP_MAX ), +NULL +}; + +static const struct hwmon_ops sbrmi_hwmon_ops = { + .is_visible = sbrmi_is_visible, + .read = sbrmi_read, + .write = sbrmi_write, +}; + +static const struct hwmon_chip_info sbrmi_chip_info = { + .ops = &sbrmi_hwmon_ops, + .info = sbrmi_info, +}; + +static int sbrmi_get_max_pwr_limit (struct sbrmi_data *data) +{ +struct sbrmi_mailbox_msg msg = {0 }; +int ret; + + msg.cmd =SBRMI_READ_PKG_MAX_PWR_LIMIT ; + msg.read = true; + ret =rmi_mailbox_xfer (data, &msg); +if (ret <0 ) +return ret; + data->pwr_limit_max = msg.data_out; + +return ret; +} + +static int sbrmi_probe (struct i2c_client *client, +const struct i2c_device_id *id) +{ +struct device *dev = &client->dev; +struct device *hwmon_dev; +struct sbrmi_data *data; +int ret; + + data =devm_kzalloc (dev,sizeof (struct sbrmi_data ),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->client = client; +mutex_init (&data->lock); + +/* Enable alert for SB-RMI sequence */ + ret =sbrmi_enable_alert (client); +if (ret <0 ) +return ret; + +/* Cache maximum power limit */ + ret =sbrmi_get_max_pwr_limit (data); +if (ret <0 ) +return ret; + + hwmon_dev =devm_hwmon_device_register_with_info (dev, client->name, data, + &sbrmi_chip_info,NULL ); + +return PTR_ERR_OR_ZERO (hwmon_dev); +} + +static const struct i2c_device_id sbrmi_id[] = { + {"sbrmi" ,0 }, + {} +}; +MODULE_DEVICE_TABLE (i2c, sbrmi_id); + +static const struct of_device_id __maybe_unused sbrmi_of_match[] = { + { + .compatible ="amd,sbrmi" , + }, + { }, +}; +MODULE_DEVICE_TABLE (of, sbrmi_of_match); + +static struct i2c_driver sbrmi_driver = { + .class =I2C_CLASS_HWMON , + .driver = { + .name ="sbrmi" , + .of_match_table =of_match_ptr (sbrmi_of_match), + }, + .probe = sbrmi_probe, + .id_table = sbrmi_id, +}; + +module_i2c_driver (sbrmi_driver); + +MODULE_AUTHOR ("Akshay Gupta <[email protected]>" ); +MODULE_DESCRIPTION ("Hwmon driver for AMD SB-RMI emulated sensor" ); +MODULE_LICENSE ("GPL" );