net/mlx5: support more than 255 representors

PATCH Superseded Xueming Li 4 participants 47 messages Sep 27, 2021 – Oct 22, 2021

Subsystems (2)

Network drivers Arm/Amlogic Meson SoC support

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Xueming Li

author

2021-09-27 08:33 UTC #0 lore raw

cover net/mlx5: support more than 255 representors

This patch set supports representor number of a PF to be more than 255. CX6 and current OFED driver supports maxium 512 SFs. CX5 supports max 255 SFs.

Xueming Li (8):
common/mlx5: add netlink API to get RDMA port state net/mlx5: use netlink when IB port greater than 255 net/mlx5: improve Verbs flow priority discover for scalable net/mlx5: check DevX to support more Verb ports net/mlx5: support flow item port of switch manager net/mlx5: supports flow item of normal Tx queue net/mlx5: fix internal root table flow priroity net/mlx5: enable DevX Tx queue creation

 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 116 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   3 +
 drivers/common/mlx5/version.map       |   1 +
 drivers/net/mlx5/linux/mlx5_os.c      | 114 ++++++++-----------------
 drivers/net/mlx5/mlx5.h               |   2 +
 drivers/net/mlx5/mlx5_devx.c          |  10 +--
 drivers/net/mlx5/mlx5_devx.h          |   2 +
 drivers/net/mlx5/mlx5_flow.c          |  81 +++++++++++++++++-
 drivers/net/mlx5/mlx5_flow.h          |   7 +-
 drivers/net/mlx5/mlx5_flow_dv.c       |  44 ++++++++--
 drivers/net/mlx5/mlx5_flow_verbs.c    |   8 ++
 drivers/net/mlx5/mlx5_trigger.c       |  11 ++-
 13 files changed, 276 insertions(+), 125 deletions(-)

Signature · 1 line

2.33.0

Xueming Li

author

2021-09-27 08:33 UTC #1 lore raw

PATCH 1/8 common/mlx5: add netlink API to get RDMA port state

Introduce netlink api to get rdma port state.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 116 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   3 +
 drivers/common/mlx5/version.map       |   1 +
 4 files changed, 94 insertions(+), 28 deletions(-)

drivers/common/mlx5/linux/meson.build +2 -0

index cbea58f557d..2dcd27b7786 100644
@@ -175,6 +175,8 @@ has_sym_args = [
             'RDMA_NLDEV_ATTR_DEV_NAME' ],
         [ 'HAVE_RDMA_NLDEV_ATTR_PORT_INDEX', 'rdma/rdma_netlink.h',
             'RDMA_NLDEV_ATTR_PORT_INDEX' ],
+        [ 'HAVE_RDMA_NLDEV_ATTR_PORT_STATE', 'rdma/rdma_netlink.h',
+            'RDMA_NLDEV_ATTR_PORT_STATE' ],
         [ 'HAVE_RDMA_NLDEV_ATTR_NDEV_INDEX', 'rdma/rdma_netlink.h',
             'RDMA_NLDEV_ATTR_NDEV_INDEX' ],
         [ 'HAVE_MLX5_DR_FLOW_DUMP', 'infiniband/mlx5dv.h',

drivers/common/mlx5/linux/mlx5_nl.c +88 ~~-28~~

211 lines not on this page · raw message

drivers/common/mlx5/linux/mlx5_nl.h +3 -0

index 15129ffdc88..809639947a6 100644
@@ -54,6 +54,9 @@ unsigned int mlx5_nl_portnum(int nl, const char *name);
 __rte_internal
 unsigned int mlx5_nl_ifindex(int nl, const char *name, uint32_t pindex);
 __rte_internal
+enum ibv_port_state mlx5_nl_port_state(int nl, const char *name,
+				       uint32_t pindex);
+__rte_internal
 int mlx5_nl_vf_mac_addr_modify(int nlsk_fd, unsigned int iface_idx,
 			       struct rte_ether_addr *mac, int vf_index);
 __rte_internal

drivers/common/mlx5/version.map +1 -0

index e5cb6b70604..d23634eef8a 100644
@@ -131,6 +131,7 @@ INTERNAL {
 	mlx5_nl_mac_addr_flush; # WINDOWS_NO_EXPORT
 	mlx5_nl_mac_addr_remove; # WINDOWS_NO_EXPORT
 	mlx5_nl_mac_addr_sync; # WINDOWS_NO_EXPORT
+	mlx5_nl_port_state;
 	mlx5_nl_portnum; # WINDOWS_NO_EXPORT
 	mlx5_nl_promisc; # WINDOWS_NO_EXPORT
 	mlx5_nl_switch_info; # WINDOWS_NO_EXPORT

Signature · 1 line

2.33.0

Xueming Li

author

2021-09-27 08:33 UTC #2 lore raw

PATCH 2/8 net/mlx5: use netlink when IB port greater than 255

In reply to Xueming Li

IB spec doesn't allow 255 ports on a single HCA, port number of 256 was cast to u8 value 0 which invalid to ibv_query_port()

This patch invoke netlink api to query port state when port number greater than 255.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 39 ++++++++++++++++++++------------
 1 file changed, 25 insertions(+), 14 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +25 ~~-14~~

index 470b16cb9ad..79ab789df43 100644
@@ -956,7 +956,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 {
 	const struct mlx5_switch_info *switch_info = &spawn->info;
 	struct mlx5_dev_ctx_shared *sh = NULL;
-	struct ibv_port_attr port_attr;
+	struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 	struct rte_eth_dev *eth_dev = NULL;
 	struct mlx5_priv *priv = NULL;

@@ -976,6 +976,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	int own_domain_id = 0;
 	uint16_t port_id;
 	struct mlx5_port_info vport_info = { .query_flags = 0 };
+	int nl_rdma = -1;
 	int i;
 
 	/* Determine if this port representor is supposed to be spawned. */

@@ -1170,19 +1171,29 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		" old OFED/rdma-core version or firmware configuration");
 #endif
 	config->mpls_en = mpls_en;
+	nl_rdma = mlx5_nl_init(NETLINK_RDMA);
 	/* Check port status. */
-	err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
-	if (err) {
-		DRV_LOG(ERR, "port query failed: %s", strerror(err));
-		goto error;
-	}
-	if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
-		DRV_LOG(ERR, "port is not configured in Ethernet mode");
-		err = EINVAL;
-		goto error;
+	if (spawn->phys_port <= UINT8_MAX) {
+		/* Legacy Verbs api only support u8 port number. */
+		err = mlx5_glue->query_port(sh->ctx, spawn->phys_port,
+					    &port_attr);
+		if (err) {
+			DRV_LOG(ERR, "port query failed: %s", strerror(err));
+			goto error;
+		}
+		if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
+			DRV_LOG(ERR, "port is not configured in Ethernet mode");
+			err = EINVAL;
+			goto error;
+		}
+	} else if (nl_rdma >= 0) {
+		/* IB doesn't allow more than 255 ports, must be Ethernet. */
+		port_attr.state = mlx5_nl_port_state(nl_rdma,
+			((struct ibv_device *)spawn->phys_dev)->name,
+			spawn->phys_port);
 	}
 	if (port_attr.state != IBV_PORT_ACTIVE)
-		DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
+		DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
 			mlx5_glue->port_state_str(port_attr.state),
 			port_attr.state);
 	/* Allocate private eth device data. */

@@ -1199,7 +1210,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	priv->pci_dev = spawn->pci_dev;
 	priv->mtu = RTE_ETHER_MTU;
 	/* Some internal functions rely on Netlink sockets, open them now. */
-	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
+	priv->nl_socket_rdma = nl_rdma;
 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
 	priv->representor = !!switch_info->representor;
 	priv->master = !!switch_info->master;

@@ -1910,8 +1921,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 			mlx5_os_free_shared_dr(priv);
 		if (priv->nl_socket_route >= 0)
 			close(priv->nl_socket_route);
-		if (priv->nl_socket_rdma >= 0)
-			close(priv->nl_socket_rdma);
 		if (priv->vmwa_context)
 			mlx5_vlan_vmwa_exit(priv->vmwa_context);
 		if (eth_dev && priv->drop_queue.hrxq)

@@ -1935,6 +1944,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	}
 	if (sh)
 		mlx5_free_shared_dev_ctx(sh);
+	if (nl_rdma >= 0)
+		close(nl_rdma);
 	MLX5_ASSERT(err > 0);
 	rte_errno = err;
 	return NULL;

Signature · 1 line

2.33.0

Xueming Li

author

2021-09-27 08:33 UTC #3 lore raw

PATCH 3/8 net/mlx5: improve Verbs flow priority discover for scalable

In reply to Xueming Li

To detect number flow Verbs flow priorities, PMD try to create Verbs flows in different priority. While Verbs is not designed to support ports larger than 255.

When DevX supported by kernel driver, 16 Verbs priorities must be supported, no need to create Verbs flows.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/mlx5_flow_verbs.c | 8 ++++++++
 1 file changed, 8 insertions(+)

drivers/net/mlx5/mlx5_flow_verbs.c +8 -0

index b93fd4d2c96..93bffa4a0b9 100644
@@ -83,6 +83,11 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 	int i;
 	int priority = 0;
 
+#ifdef HAVE_MLX5DV_DR_DEVX_PORT
+	/* If DevX supported, driver must support 16 verbs flow priorities. */
+	priority = RTE_DIM(priority_map_5);
+	goto out;
+#endif
 	if (!drop->qp) {
 		rte_errno = ENOTSUP;
 		return -rte_errno;

@@ -109,6 +114,9 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 			dev->data->port_id, priority);
 		return -rte_errno;
 	}
+#ifdef HAVE_MLX5DV_DR_DEVX_PORT
+out:
+#endif
 	DRV_LOG(INFO, "port %u supported flow priorities:"
 		" 0-%d for ingress or egress root table,"
 		" 0-%d for non-root table or transfer root table.",

Signature · 1 line

2.33.0

Xueming Li

author

2021-09-27 08:33 UTC #4 lore raw

PATCH 4/8 net/mlx5: check DevX to support more Verb ports

In reply to Xueming Li

Verbs API doesn't support device port number larger than 255 by design.

To support more VF or SubFunction port representors, forces DevX api check when max ports larger than 255.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +10 -3

index 79ab789df43..e9256ad5245 100644
@@ -1344,9 +1344,16 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 #endif
 	if (spawn->max_port > UINT8_MAX) {
 		/* Verbs can't support ports larger than 255 by design. */
-		DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
-		err = EINVAL;
-		goto error;
+#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
+		if (!config->dv_flow_en || !config->dv_esw_en) {
+			DRV_LOG(INFO, "must enable DV and ESW when IB ports > 255");
+#else
+		{
+			DRV_LOG(ERR, "DevX does not provide UAR offset, can't support IB ports > UINT8_MAX");
+#endif
+			err = EINVAL;
+			goto error;
+		}
 	}
 	config->ind_table_max_size =
 		sh->device_attr.max_rwq_indirection_table_size;

Signature · 1 line

2.33.0

Xueming Li

author

2021-09-27 08:34 UTC #5 lore raw

PATCH 5/8 net/mlx5: support flow item port of switch manager

In reply to Xueming Li

When sending packet from representor, the vport ID in transport domain is E-Switch manager vport ID since representor shares resources of eswitch manager. To match packet sent by representor, pattern has to be vport_id==<esw-mgr-id> && txq==<sqn>

On BlueField, eswitch manager ID is 0xfffe. 0 on other NIC.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.h    |  3 +++
 drivers/net/mlx5/mlx5_flow_dv.c | 25 +++++++++++++++++++++++++
 2 files changed, 28 insertions(+)

drivers/net/mlx5/mlx5_flow.h +3 -0

index 76ad53f2a1e..861e18fb3b1 100644
@@ -18,6 +18,9 @@
 
 #include "mlx5.h"
 
+/* E-Switch Manager port, used for rte_flow_item_port_id. */
+#define MLX5_PORT_ESW_MGR UINT32_MAX
+
 /* Private rte flow items. */
 enum mlx5_rte_flow_item_type {
 	MLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN,

drivers/net/mlx5/mlx5_flow_dv.c +25 -0

index 3f6f5dcfbad..d4242a4aa8d 100644
@@ -15,6 +15,7 @@
 #include <rte_flow_driver.h>
 #include <rte_malloc.h>
 #include <rte_cycles.h>
+#include <rte_bus_pci.h>
 #include <rte_ip.h>
 #include <rte_gre.h>
 #include <rte_vxlan.h>

@@ -92,6 +93,23 @@ static int
 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
 				  uint32_t rix_jump);
 
+static int16_t
+flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+
+	if (priv->pci_dev == NULL)
+		return 0;
+	switch (priv->pci_dev->id.device_id) {
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
+		return (int16_t)0xfffe;
+	default:
+		return 0;
+	}
+}
+
 /**
  * Initialize flow attributes structure according to flow items' types.
  *

@@ -2224,6 +2242,8 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 		return ret;
 	if (!spec)
 		return 0;
+	if (spec->id == MLX5_PORT_ESW_MGR)
+		return 0;
 	esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
 	if (!esw_priv)
 		return rte_flow_error_set(error, rte_errno,

@@ -9691,6 +9711,11 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
 	struct mlx5_priv *priv;
 	uint16_t mask, id;
 
+	if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
+		flow_dv_translate_item_source_vport(matcher, key,
+			flow_dv_get_esw_manager_vport_id(dev), 0xffff);
+		return 0;
+	}
 	mask = pid_m ? pid_m->id : 0xffff;
 	id = pid_v ? pid_v->id : dev->data->port_id;
 	priv = mlx5_port_to_eswitch_info(id, item == NULL);

Signature · 1 line

2.33.0

Xueming Li

author

2021-09-27 08:34 UTC #6 lore raw

PATCH 6/8 net/mlx5: supports flow item of normal Tx queue

In reply to Xueming Li

Extends txq flow pattern to support both hairpin and regular txq.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/mlx5_flow_dv.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

drivers/net/mlx5/mlx5_flow_dv.c +8 -8

index d4242a4aa8d..e388e2d5e10 100644
@@ -10916,22 +10916,22 @@ flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
 	void *misc_v =
 		MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
 	struct mlx5_txq_ctrl *txq;
-	uint32_t queue;
-
+	uint32_t queue, mask;
 
 	queue_m = (const void *)item->mask;
-	if (!queue_m)
-		return;
 	queue_v = (const void *)item->spec;
 	if (!queue_v)
 		return;
 	txq = mlx5_txq_get(dev, queue_v->queue);
 	if (!txq)
 		return;
-	queue = txq->obj->sq->id;
-	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
-	MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
-		 queue & queue_m->queue);
+	if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
+		queue = txq->obj->sq->id;
+	else
+		queue = txq->obj->sq_obj.sq->id;
+	mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
+	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
+	MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
 	mlx5_txq_release(dev, queue_v->queue);
 }

Signature · 1 line

2.33.0

Xueming Li

author

2021-09-27 08:34 UTC #7 lore raw

PATCH 7/8 net/mlx5: fix internal root table flow priroity

In reply to Xueming Li

When creating internal transfer flow on root table with lowerest priority, the flow was created with u32 priority. It was wrong since the flow is created in kernel and max priority supported is 16.

This patch fixes this by adding internal flow check.

Fixes 5f8ae44dd454 ("net/mlx5: enlarge maximal flow priority")

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.c    | 7 +++++--
 drivers/net/mlx5/mlx5_flow.h    | 4 ++--
 drivers/net/mlx5/mlx5_flow_dv.c | 3 ++-
 3 files changed, 9 insertions(+), 5 deletions(-)

drivers/net/mlx5/mlx5_flow.c +5 -2

index c914a7120cc..8dc79340f2d 100644
@@ -980,13 +980,15 @@ mlx5_get_lowest_priority(struct rte_eth_dev *dev,
  *   Pointer to device flow rule attributes.
  * @param[in] subpriority
  *   The priority based on the items.
+ * @param[in] external
+ *   Flow is user flow.
  * @return
  *   The matcher priority of the flow.
  */
 uint16_t
 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 			  const struct rte_flow_attr *attr,
-			  uint32_t subpriority)
+			  uint32_t subpriority, bool external)
 {
 	uint16_t priority = (uint16_t)attr->priority;
 	struct mlx5_priv *priv = dev->data->dev_private;

@@ -997,7 +999,8 @@ mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 		return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
 	}
 	if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
-		priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
+		priority = external ?
+			   MLX5_NON_ROOT_FLOW_MAX_PRIO : priv->config.flow_prio;
 	return priority * 3 + subpriority;
 }

drivers/net/mlx5/mlx5_flow.h +2 -2

index 861e18fb3b1..1e31d25f319 100644
@@ -1434,8 +1434,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 uint32_t mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 					const struct rte_flow_attr *attr);
 uint16_t mlx5_get_matcher_priority(struct rte_eth_dev *dev,
-				     const struct rte_flow_attr *attr,
-				     uint32_t subpriority);
+				   const struct rte_flow_attr *attr,
+				   uint32_t subpriority, bool external);
 int mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 				     enum mlx5_feature_name feature,
 				     uint32_t id,

drivers/net/mlx5/mlx5_flow_dv.c +2 -1

index e388e2d5e10..3744f3e5917 100644
@@ -13633,7 +13633,8 @@ flow_dv_translate(struct rte_eth_dev *dev,
 	matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
 				    matcher.mask.size);
 	matcher.priority = mlx5_get_matcher_priority(dev, attr,
-					matcher.priority);
+						     matcher.priority,
+						     dev_flow->external);
 	/**
 	 * When creating meter drop flow in drop table, using original
 	 * 5-tuple match, the matcher priority should be lower than

Signature · 1 line

2.33.0

Xueming Li

author

2021-09-27 08:34 UTC #8 lore raw

PATCH 8/8 net/mlx5: enable DevX Tx queue creation

In reply to Xueming Li

Verbs API has limitation to support port number larger 255 by design. To support more representors on a single Verbs device, must enable DevX API.

DevX SQ was disabled since all representors need a FDB default miss flow to redirect packets sent from CPU to peer port(SF, VF or HPF).

Kernel creates representor default miss flow automatically for Verbs QP. For DevX sq, PMD must to create it manually.

The default miss root flow matches esw-manager vport and sqn. Since root table flow created on kernel, vport redirect action is not supported, so split the default miss flow into:
1. per eswitch FDB root flow that matches ESW manager vport ID, jump to group 1.
2. per sq FDB flow in group 1 that matches ESW manager vport ID and sqn, redirect packet to peer vport.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 62 +-------------------------
 drivers/net/mlx5/mlx5.h          |  2 +
 drivers/net/mlx5/mlx5_devx.c     | 10 ++---
 drivers/net/mlx5/mlx5_devx.h     |  2 +
 drivers/net/mlx5/mlx5_flow.c     | 74 ++++++++++++++++++++++++++++++++
 drivers/net/mlx5/mlx5_trigger.c  | 11 ++++-
 6 files changed, 94 insertions(+), 67 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +1 ~~-61~~

index e9256ad5245..bcf040a8524 100644
@@ -697,56 +697,6 @@ mlx5_init_once(void)
 	return ret;
 }
 
-/**
- * Create the Tx queue DevX/Verbs object.
- *
- * @param dev
- *   Pointer to Ethernet device.
- * @param idx
- *   Queue index in DPDK Tx queue array.
- *
- * @return
- *   0 on success, a negative errno value otherwise and rte_errno is set.
- */
-static int
-mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
-{
-	struct mlx5_priv *priv = dev->data->dev_private;
-	struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
-	struct mlx5_txq_ctrl *txq_ctrl =
-			container_of(txq_data, struct mlx5_txq_ctrl, txq);
-
-	if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
-		return mlx5_txq_devx_obj_new(dev, idx);
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-	if (!priv->config.dv_esw_en)
-		return mlx5_txq_devx_obj_new(dev, idx);
-#endif
-	return mlx5_txq_ibv_obj_new(dev, idx);
-}
-
-/**
- * Release an Tx DevX/verbs queue object.
- *
- * @param txq_obj
- *   DevX/Verbs Tx queue object.
- */
-static void
-mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
-{
-	if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
-		mlx5_txq_devx_obj_release(txq_obj);
-		return;
-	}
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-	if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
-		mlx5_txq_devx_obj_release(txq_obj);
-		return;
-	}
-#endif
-	mlx5_txq_ibv_obj_release(txq_obj);
-}
-
 /**
  * DV flow counter mode detect and config.
  *

@@ -1812,16 +1762,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 						ibv_obj_ops.drop_action_create;
 		priv->obj_ops.drop_action_destroy =
 						ibv_obj_ops.drop_action_destroy;
-#ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
-		priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
-#else
-		if (config->dv_esw_en)
-			priv->obj_ops.txq_obj_modify =
-						ibv_obj_ops.txq_obj_modify;
-#endif
-		/* Use specific wrappers for Tx object. */
-		priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
-		priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
 		mlx5_queue_counter_id_prepare(eth_dev);
 		priv->obj_ops.lb_dummy_queue_create =
 					mlx5_rxq_ibv_obj_dummy_lb_create;

@@ -1832,7 +1772,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	}
 	if (config->tx_pp &&
 	    (priv->config.dv_esw_en ||
-	     priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
+	     priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new)) {
 		/*
 		 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
 		 * packet pacing and already checked above.

drivers/net/mlx5/mlx5.h +2 -0

index e02714e2319..63737a1dafe 100644
@@ -1698,6 +1698,8 @@ int mlx5_ctrl_flow(struct rte_eth_dev *dev,
 		   struct rte_flow_item_eth *eth_mask);
 int mlx5_flow_lacp_miss(struct rte_eth_dev *dev);
 struct rte_flow *mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev);
+uint32_t mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev,
+					    uint32_t txq);
 void mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
 				       uint64_t async_id, int status);
 void mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh);

drivers/net/mlx5/mlx5_devx.c +5 -5

index a1db53577a2..a49602cb957 100644
@@ -102,9 +102,9 @@ mlx5_devx_modify_rq(struct mlx5_rxq_obj *rxq_obj, uint8_t type)
  * @return
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
-static int
-mlx5_devx_modify_sq(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
-		    uint8_t dev_port)
+int
+mlx5_txq_devx_modify(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
+		     uint8_t dev_port)
 {
 	struct mlx5_devx_modify_sq_attr msq_attr = { 0 };
 	int ret;

@@ -1118,7 +1118,7 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 	*txq_data->qp_db = 0;
 	txq_data->qp_num_8s = txq_obj->sq_obj.sq->id << 8;
 	/* Change Send Queue state to Ready-to-Send. */
-	ret = mlx5_devx_modify_sq(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
+	ret = mlx5_txq_devx_modify(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
 	if (ret) {
 		rte_errno = errno;
 		DRV_LOG(ERR,

@@ -1187,7 +1187,7 @@ struct mlx5_obj_ops devx_obj_ops = {
 	.drop_action_create = mlx5_devx_drop_action_create,
 	.drop_action_destroy = mlx5_devx_drop_action_destroy,
 	.txq_obj_new = mlx5_txq_devx_obj_new,
-	.txq_obj_modify = mlx5_devx_modify_sq,
+	.txq_obj_modify = mlx5_txq_devx_modify,
 	.txq_obj_release = mlx5_txq_devx_obj_release,
 	.lb_dummy_queue_create = NULL,
 	.lb_dummy_queue_release = NULL,

drivers/net/mlx5/mlx5_devx.h +2 -0

index bc8a8d6b73c..a95207a6b9a 100644
@@ -8,6 +8,8 @@
 #include "mlx5.h"
 
 int mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx);
+int mlx5_txq_devx_modify(struct mlx5_txq_obj *obj,
+			 enum mlx5_txq_modify_type type, uint8_t dev_port);
 void mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj);
 
 extern struct mlx5_obj_ops devx_obj_ops;

drivers/net/mlx5/mlx5_flow.c +74 -0

80 lines not on this page · raw message

drivers/net/mlx5/mlx5_trigger.c +10 -1

index 54173bfacb2..42d8bb31128 100644
@@ -1255,9 +1255,18 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
 				goto error;
 			}
 		}
+		if ((priv->representor || priv->master) &&
+		    priv->config.dv_esw_en) {
+			if (mlx5_flow_create_devx_sq_miss_flow(dev, i) == 0) {
+				DRV_LOG(ERR,
+					"Port %u Tx queue %u SQ create representor devx default miss rule failed.",
+					dev->data->port_id, i);
+				goto error;
+			}
+		}
 		mlx5_txq_release(dev, i);
 	}
-	if (priv->config.dv_esw_en && !priv->config.vf && !priv->config.sf) {
+	if ((priv->master || priv->representor) && priv->config.dv_esw_en) {
 		if (mlx5_flow_create_esw_table_zero_flow(dev))
 			priv->fdb_def_rule = 1;
 		else

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-16 08:08 UTC #9 lore raw

v2 cover net/mlx5: support more than 255 representors

In reply to Xueming Li

This patch set supports representor number of a PF to be more than 255. CX6 and current OFED driver supports maxium 512 SFs. CX5 supports max 255 SFs.

v2:
- fixed FDB root table flow priority
- add error check to Netlink port state API
- commit log update and other minor fixes

Xueming Li (8):
common/mlx5: add netlink API to get RDMA port state net/mlx5: use netlink when IB port greater than 255 net/mlx5: improve Verbs flow priority discover for scalable net/mlx5: support E-Switch manager egress traffic match net/mlx5: supports flow item of normal Tx queue net/mlx5: fix internal root table flow priroity net/mlx5: enable DevX Tx queue creation
net/mlx5: check DevX to support more Verbs ports

 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 136 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   2 +
 drivers/common/mlx5/version.map       |   1 +
 drivers/net/mlx5/linux/mlx5_os.c      | 119 +++++++---------------
 drivers/net/mlx5/mlx5.h               |   2 +
 drivers/net/mlx5/mlx5_devx.c          |  10 +-
 drivers/net/mlx5/mlx5_devx.h          |   2 +
 drivers/net/mlx5/mlx5_flow.c          |  81 ++++++++++++++-
 drivers/net/mlx5/mlx5_flow.h          |   7 +-
 drivers/net/mlx5/mlx5_flow_dv.c       |  44 +++++++--
 drivers/net/mlx5/mlx5_flow_verbs.c    |   8 ++
 drivers/net/mlx5/mlx5_trigger.c       |  11 ++-
 13 files changed, 291 insertions(+), 134 deletions(-)

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-16 08:08 UTC #10 lore raw

PATCH v2 1/8 common/mlx5: add netlink API to get RDMA port state

Introduce netlink API to get rdma port state.

Port state is restrieved based on RDMA device name and port index.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 136 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   2 +
 drivers/common/mlx5/version.map       |   1 +
 4 files changed, 106 insertions(+), 35 deletions(-)

drivers/common/mlx5/linux/meson.build +2 -0

index cbea58f557d..2dcd27b7786 100644
@@ -175,6 +175,8 @@ has_sym_args = [
             'RDMA_NLDEV_ATTR_DEV_NAME' ],
         [ 'HAVE_RDMA_NLDEV_ATTR_PORT_INDEX', 'rdma/rdma_netlink.h',
             'RDMA_NLDEV_ATTR_PORT_INDEX' ],
+        [ 'HAVE_RDMA_NLDEV_ATTR_PORT_STATE', 'rdma/rdma_netlink.h',
+            'RDMA_NLDEV_ATTR_PORT_STATE' ],
         [ 'HAVE_RDMA_NLDEV_ATTR_NDEV_INDEX', 'rdma/rdma_netlink.h',
             'RDMA_NLDEV_ATTR_NDEV_INDEX' ],
         [ 'HAVE_MLX5_DR_FLOW_DUMP', 'infiniband/mlx5dv.h',

drivers/common/mlx5/linux/mlx5_nl.c +101 ~~-35~~

225 lines not on this page · raw message

drivers/common/mlx5/linux/mlx5_nl.h +2 -0

index 15129ffdc88..396f8f3f20a 100644
@@ -54,6 +54,8 @@ unsigned int mlx5_nl_portnum(int nl, const char *name);
 __rte_internal
 unsigned int mlx5_nl_ifindex(int nl, const char *name, uint32_t pindex);
 __rte_internal
+int mlx5_nl_port_state(int nl, const char *name, uint32_t pindex);
+__rte_internal
 int mlx5_nl_vf_mac_addr_modify(int nlsk_fd, unsigned int iface_idx,
 			       struct rte_ether_addr *mac, int vf_index);
 __rte_internal

drivers/common/mlx5/version.map +1 -0

index d3c5040aac8..2a2c7e51ba5 100644
@@ -134,6 +134,7 @@ INTERNAL {
 	mlx5_nl_mac_addr_flush; # WINDOWS_NO_EXPORT
 	mlx5_nl_mac_addr_remove; # WINDOWS_NO_EXPORT
 	mlx5_nl_mac_addr_sync; # WINDOWS_NO_EXPORT
+	mlx5_nl_port_state; # WINDOWS_NO_EXPORT
 	mlx5_nl_portnum; # WINDOWS_NO_EXPORT
 	mlx5_nl_promisc; # WINDOWS_NO_EXPORT
 	mlx5_nl_switch_info; # WINDOWS_NO_EXPORT

Signature · 1 line

2.33.0

Slava Ovsiienko

Acked-by on v2 1/8

2021-10-19 08:23 UTC #11 lore raw

Re: [dpdk-dev] [PATCH v2 1/8] common/mlx5: add netlink API to get RDMA port state

Quoted 10 lines

-----Original Message-----
From: Xueming(Steven) Li <[email protected]>
Sent: Saturday, October 16, 2021 11:07
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>; Matan Azrad <[email protected]>; Ray Kinsella <[email protected]>
Subject: [PATCH v2 1/8] common/mlx5: add netlink API to get RDMA port state

Quoted 5 lines

Introduce netlink API to get rdma port state.
Port state is restrieved based on RDMA device name and port index.
Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

Xueming Li

author

2021-10-16 08:08 UTC #12 lore raw

PATCH v2 2/8 net/mlx5: use netlink when IB port greater than 255

In reply to Xueming Li

IB spec doesn't allow 255 ports on a single HCA, port number of 256 was cast to u8 value 0 which invalid to ibv_query_port()

This patch invokes Netlink api to query port state when port number greater than 255.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 46 ++++++++++++++++++++++----------
 1 file changed, 32 insertions(+), 14 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +32 ~~-14~~

index 3746057673d..f283a3779cc 100644
@@ -956,7 +956,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 {
 	const struct mlx5_switch_info *switch_info = &spawn->info;
 	struct mlx5_dev_ctx_shared *sh = NULL;
-	struct ibv_port_attr port_attr;
+	struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 	struct rte_eth_dev *eth_dev = NULL;
 	struct mlx5_priv *priv = NULL;

@@ -976,6 +976,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	int own_domain_id = 0;
 	uint16_t port_id;
 	struct mlx5_port_info vport_info = { .query_flags = 0 };
+	int nl_rdma = -1;
 	int i;
 
 	/* Determine if this port representor is supposed to be spawned. */

@@ -1170,19 +1171,36 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		" old OFED/rdma-core version or firmware configuration");
 #endif
 	config->mpls_en = mpls_en;
+	nl_rdma = mlx5_nl_init(NETLINK_RDMA);
 	/* Check port status. */
-	err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
-	if (err) {
-		DRV_LOG(ERR, "port query failed: %s", strerror(err));
-		goto error;
-	}
-	if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
-		DRV_LOG(ERR, "port is not configured in Ethernet mode");
-		err = EINVAL;
-		goto error;
+	if (spawn->phys_port <= UINT8_MAX) {
+		/* Legacy Verbs api only support u8 port number. */
+		err = mlx5_glue->query_port(sh->ctx, spawn->phys_port,
+					    &port_attr);
+		if (err) {
+			DRV_LOG(ERR, "port query failed: %s", strerror(err));
+			goto error;
+		}
+		if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
+			DRV_LOG(ERR, "port is not configured in Ethernet mode");
+			err = EINVAL;
+			goto error;
+		}
+	} else if (nl_rdma >= 0) {
+		/* IB doesn't allow more than 255 ports, must be Ethernet. */
+		err = mlx5_nl_port_state(nl_rdma,
+			((struct ibv_device *)spawn->phys_dev)->name,
+			spawn->phys_port);
+		if (err < 0) {
+			DRV_LOG(INFO, "Failed to get netlink port state: %s",
+				strerror(rte_errno));
+			err = -rte_errno;
+			goto error;
+		}
+		port_attr.state = (enum ibv_port_state)err;
 	}
 	if (port_attr.state != IBV_PORT_ACTIVE)
-		DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
+		DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
 			mlx5_glue->port_state_str(port_attr.state),
 			port_attr.state);
 	/* Allocate private eth device data. */

@@ -1199,7 +1217,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	priv->pci_dev = spawn->pci_dev;
 	priv->mtu = RTE_ETHER_MTU;
 	/* Some internal functions rely on Netlink sockets, open them now. */
-	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
+	priv->nl_socket_rdma = nl_rdma;
 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
 	priv->representor = !!switch_info->representor;
 	priv->master = !!switch_info->master;

@@ -1910,8 +1928,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 			mlx5_os_free_shared_dr(priv);
 		if (priv->nl_socket_route >= 0)
 			close(priv->nl_socket_route);
-		if (priv->nl_socket_rdma >= 0)
-			close(priv->nl_socket_rdma);
 		if (priv->vmwa_context)
 			mlx5_vlan_vmwa_exit(priv->vmwa_context);
 		if (eth_dev && priv->drop_queue.hrxq)

@@ -1935,6 +1951,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	}
 	if (sh)
 		mlx5_free_shared_dev_ctx(sh);
+	if (nl_rdma >= 0)
+		close(nl_rdma);
 	MLX5_ASSERT(err > 0);
 	rte_errno = err;
 	return NULL;

Signature · 1 line

2.33.0

Slava Ovsiienko

Acked-by on v2 2/8

2021-10-19 08:24 UTC #13 lore raw

Re: [dpdk-dev] [PATCH v2 2/8] net/mlx5: use netlink when IB port greater than 255

Quoted 9 lines

-----Original Message-----
From: Xueming(Steven) Li <[email protected]>
Sent: Saturday, October 16, 2021 11:07
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>; Matan Azrad <[email protected]>
Subject: [PATCH v2 2/8] net/mlx5: use netlink when IB port greater than 255

Quoted 7 lines

IB spec doesn't allow 255 ports on a single HCA, port number of 256 was cast to u8 value 0 which invalid to ibv_query_port()
This patch invokes Netlink api to query port state when port number greater than 255.
Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

Xueming Li

author

2021-10-16 08:08 UTC #14 lore raw

PATCH v2 3/8 net/mlx5: improve Verbs flow priority discover for scalable

In reply to Xueming Li

To detect number flow Verbs flow priorities, PMD try to create Verbs flows in different priority. While Verbs is not designed to support ports larger than 255.

When DevX supported by kernel driver, 16 Verbs priorities must be supported, no need to create Verbs flows.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/mlx5_flow_verbs.c | 8 ++++++++
 1 file changed, 8 insertions(+)

drivers/net/mlx5/mlx5_flow_verbs.c +8 -0

index b93fd4d2c96..178eabed163 100644
@@ -83,6 +83,11 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 	int i;
 	int priority = 0;
 
+#if defined(HAVE_MLX5DV_DR_DEVX_PORT) || defined(HAVE_MLX5DV_DR_DEVX_PORT_V35)
+	/* If DevX supported, driver must support 16 verbs flow priorities. */
+	priority = RTE_DIM(priority_map_5);
+	goto out;
+#endif
 	if (!drop->qp) {
 		rte_errno = ENOTSUP;
 		return -rte_errno;

@@ -109,6 +114,9 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 			dev->data->port_id, priority);
 		return -rte_errno;
 	}
+#if defined(HAVE_MLX5DV_DR_DEVX_PORT) || defined(HAVE_MLX5DV_DR_DEVX_PORT_V35)
+out:
+#endif
 	DRV_LOG(INFO, "port %u supported flow priorities:"
 		" 0-%d for ingress or egress root table,"
 		" 0-%d for non-root table or transfer root table.",

Signature · 1 line

2.33.0

Slava Ovsiienko

Acked-by on v2 3/8

2021-10-19 08:26 UTC #15 lore raw

Re: [dpdk-dev] [PATCH v2 3/8] net/mlx5: improve Verbs flow priority discover for scalable

Quoted 10 lines

-----Original Message-----
From: Xueming(Steven) Li <[email protected]>
Sent: Saturday, October 16, 2021 11:07
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>; Matan Azrad <[email protected]>
Subject: [PATCH v2 3/8] net/mlx5: improve Verbs flow priority discover for scalable

Quoted 8 lines

To detect number flow Verbs flow priorities, PMD try to create Verbs flows in different priority. While Verbs is not designed to support ports larger than 255.
When DevX supported by kernel driver, 16 Verbs priorities must be supported, no need to create Verbs flows.
Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

Xueming Li

author

2021-10-16 08:08 UTC #16 lore raw

PATCH v2 4/8 net/mlx5: support E-Switch manager egress traffic match

In reply to Xueming Li

For egress packet on representor, the vport ID in transport domain is E-Switch manager vport ID since representor shares resources of E-Switch manager. E-Switch manager vport ID and Tx queue internal device index are used to match representor egress packet.

This patch adds flow item port ID match on E-Switch manager.

E-Switch manager vport ID is 0xfffe on BlueField, 0 otherwise.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.h    |  3 +++
 drivers/net/mlx5/mlx5_flow_dv.c | 25 +++++++++++++++++++++++++
 2 files changed, 28 insertions(+)

drivers/net/mlx5/mlx5_flow.h +3 -0

index 5c68d4f7d74..c25af8d9864 100644
@@ -18,6 +18,9 @@
 
 #include "mlx5.h"
 
+/* E-Switch Manager port, used for rte_flow_item_port_id. */
+#define MLX5_PORT_ESW_MGR UINT32_MAX
+
 /* Private rte flow items. */
 enum mlx5_rte_flow_item_type {
 	MLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN,

drivers/net/mlx5/mlx5_flow_dv.c +25 -0

index c6370cd1d68..f06ce54f7e7 100644
@@ -15,6 +15,7 @@
 #include <rte_flow_driver.h>
 #include <rte_malloc.h>
 #include <rte_cycles.h>
+#include <rte_bus_pci.h>
 #include <rte_ip.h>
 #include <rte_gre.h>
 #include <rte_vxlan.h>

@@ -92,6 +93,23 @@ static int
 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
 				  uint32_t rix_jump);
 
+static int16_t
+flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+
+	if (priv->pci_dev == NULL)
+		return 0;
+	switch (priv->pci_dev->id.device_id) {
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
+		return (int16_t)0xfffe;
+	default:
+		return 0;
+	}
+}
+
 /**
  * Initialize flow attributes structure according to flow items' types.
  *

@@ -2224,6 +2242,8 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 		return ret;
 	if (!spec)
 		return 0;
+	if (spec->id == MLX5_PORT_ESW_MGR)
+		return 0;
 	esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
 	if (!esw_priv)
 		return rte_flow_error_set(error, rte_errno,

@@ -9685,6 +9705,11 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
 	struct mlx5_priv *priv;
 	uint16_t mask, id;
 
+	if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
+		flow_dv_translate_item_source_vport(matcher, key,
+			flow_dv_get_esw_manager_vport_id(dev), 0xffff);
+		return 0;
+	}
 	mask = pid_m ? pid_m->id : 0xffff;
 	id = pid_v ? pid_v->id : dev->data->port_id;
 	priv = mlx5_port_to_eswitch_info(id, item == NULL);

Signature · 1 line

2.33.0

Slava Ovsiienko

Acked-by on v2 4/8

2021-10-19 08:26 UTC #17 lore raw

Re: [dpdk-dev] [PATCH v2 4/8] net/mlx5: support E-Switch manager egress traffic match

Quoted 15 lines

-----Original Message-----
From: Xueming(Steven) Li <[email protected]>
Sent: Saturday, October 16, 2021 11:07
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>; Matan Azrad <[email protected]>
Subject: [PATCH v2 4/8] net/mlx5: support E-Switch manager egress traffic match
For egress packet on representor, the vport ID in transport domain is E-Switch manager vport ID since representor shares resources of E-Switch manager. E- Switch manager vport ID and Tx queue internal device index are used to match representor egress packet.

Quoted 5 lines

This patch adds flow item port ID match on E-Switch manager.
E-Switch manager vport ID is 0xfffe on BlueField, 0 otherwise.
Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

Xueming Li

author

2021-10-16 08:08 UTC #18 lore raw

PATCH v2 5/8 net/mlx5: supports flow item of normal Tx queue

In reply to Xueming Li

Extends txq flow pattern to support both hairpin and regular txq.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/mlx5_flow_dv.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

drivers/net/mlx5/mlx5_flow_dv.c +8 -8

index f06ce54f7e7..4a17ca64a2e 100644
@@ -10910,22 +10910,22 @@ flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
 	void *misc_v =
 		MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
 	struct mlx5_txq_ctrl *txq;
-	uint32_t queue;
-
+	uint32_t queue, mask;
 
 	queue_m = (const void *)item->mask;
-	if (!queue_m)
-		return;
 	queue_v = (const void *)item->spec;
 	if (!queue_v)
 		return;
 	txq = mlx5_txq_get(dev, queue_v->queue);
 	if (!txq)
 		return;
-	queue = txq->obj->sq->id;
-	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
-	MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
-		 queue & queue_m->queue);
+	if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
+		queue = txq->obj->sq->id;
+	else
+		queue = txq->obj->sq_obj.sq->id;
+	mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
+	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
+	MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
 	mlx5_txq_release(dev, queue_v->queue);
 }

Signature · 1 line

2.33.0

Slava Ovsiienko

Acked-by on v2 5/8

2021-10-19 08:27 UTC #19 lore raw

Re: [dpdk-dev] [PATCH v2 5/8] net/mlx5: supports flow item of normal Tx queue

Quoted 9 lines

-----Original Message-----
From: Xueming(Steven) Li <[email protected]>
Sent: Saturday, October 16, 2021 11:07
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>; Matan Azrad <[email protected]>
Subject: [PATCH v2 5/8] net/mlx5: supports flow item of normal Tx queue

Quoted 3 lines

Extends txq flow pattern to support both hairpin and regular txq.
Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

Xueming Li

author

2021-10-16 08:08 UTC #20 lore raw

PATCH v2 6/8 net/mlx5: fix internal root table flow priroity

In reply to Xueming Li

When creating internal transfer flow on root table with lowerest priority, the flow was created with max UINT32_MAX priority. It is wrong since the flow is created in kernel and max priority supported is 16.

This patch fixes this by adding internal flow check.

Fixes 5f8ae44dd454 ("net/mlx5: enlarge maximal flow priority")

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.c    | 7 ++++++-
 drivers/net/mlx5/mlx5_flow.h    | 4 ++--
 drivers/net/mlx5/mlx5_flow_dv.c | 3 ++-
 3 files changed, 10 insertions(+), 4 deletions(-)

drivers/net/mlx5/mlx5_flow.c +6 -1

index c914a7120cc..b5232cd46ae 100644
@@ -980,13 +980,15 @@ mlx5_get_lowest_priority(struct rte_eth_dev *dev,
  *   Pointer to device flow rule attributes.
  * @param[in] subpriority
  *   The priority based on the items.
+ * @param[in] external
+ *   Flow is user flow.
  * @return
  *   The matcher priority of the flow.
  */
 uint16_t
 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 			  const struct rte_flow_attr *attr,
-			  uint32_t subpriority)
+			  uint32_t subpriority, bool external)
 {
 	uint16_t priority = (uint16_t)attr->priority;
 	struct mlx5_priv *priv = dev->data->dev_private;

@@ -995,6 +997,9 @@ mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 		if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 			priority = priv->config.flow_prio - 1;
 		return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
+	} else if (!external && attr->transfer && attr->group == 0 &&
+		   attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
+		return (priv->config.flow_prio - 1) * 3;
 	}
 	if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 		priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;

drivers/net/mlx5/mlx5_flow.h +2 -2

index c25af8d9864..f1a83d537d0 100644
@@ -1431,8 +1431,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 uint32_t mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 					const struct rte_flow_attr *attr);
 uint16_t mlx5_get_matcher_priority(struct rte_eth_dev *dev,
-				     const struct rte_flow_attr *attr,
-				     uint32_t subpriority);
+				   const struct rte_flow_attr *attr,
+				   uint32_t subpriority, bool external);
 int mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 				     enum mlx5_feature_name feature,
 				     uint32_t id,

drivers/net/mlx5/mlx5_flow_dv.c +2 -1

index 4a17ca64a2e..ffc1fc8a05c 100644
@@ -13646,7 +13646,8 @@ flow_dv_translate(struct rte_eth_dev *dev,
 	matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
 				    matcher.mask.size);
 	matcher.priority = mlx5_get_matcher_priority(dev, attr,
-					matcher.priority);
+						     matcher.priority,
+						     dev_flow->external);
 	/**
 	 * When creating meter drop flow in drop table, using original
 	 * 5-tuple match, the matcher priority should be lower than

Signature · 1 line

2.33.0

Slava Ovsiienko

Acked-by on v2 6/8

2021-10-19 08:28 UTC #21 lore raw

Re: [dpdk-dev] [PATCH v2 6/8] net/mlx5: fix internal root table flow priroity

Quoted 13 lines

-----Original Message-----
From: Xueming(Steven) Li <[email protected]>
Sent: Saturday, October 16, 2021 11:08
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>; Matan Azrad <[email protected]>; Bill Zhou <[email protected]>
Subject: [PATCH v2 6/8] net/mlx5: fix internal root table flow priroity
When creating internal transfer flow on root table with lowerest priority, the flow was created with max UINT32_MAX priority. It is wrong since the flow is created in kernel and max priority supported is 16.

Quoted 5 lines

This patch fixes this by adding internal flow check.
Fixes 5f8ae44dd454 ("net/mlx5: enlarge maximal flow priority")
Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

Xueming Li

author

2021-10-16 08:08 UTC #22 lore raw

PATCH v2 7/8 net/mlx5: enable DevX Tx queue creation

In reply to Xueming Li

Verbs API does not support Infiniband device port number larger 255 by design. To support more representors on a single Infiniband device DevX API should be engaged.

While creating Send Queue (SQ) object with Verbs API, the PMD assigned IB device port attribute and kernel created the default miss flows in FDB domain, to redirect egress traffic from the queue being created to representor appropriate peer (wire, HPF, VF or SF).

With DevX API there is no IB-device port attribute (it is merely kernel one, DevX operates in PRM terms) and PMD must create default miss flows in FDB explicitly. PMD did not provide this and using DevX API for E-Switch configurations was disabled.

The default miss FDB flow matches E-Switch manager vport (to make sure the source is some representor) and SQn (Send Queue number - device internal queue index). The root flow table managed by kernel/firmware and it does not support vport redirect action, we have to split the default miss flow into two ones:

- flow with lowest priority in the root table that matches E-Switch manager vport ID and jump to group 1.
- flow in group 1 that matches E-Switch manager vport ID and SQn and forwards packet to peer vport

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 62 +-------------------------
 drivers/net/mlx5/mlx5.h          |  2 +
 drivers/net/mlx5/mlx5_devx.c     | 10 ++---
 drivers/net/mlx5/mlx5_devx.h     |  2 +
 drivers/net/mlx5/mlx5_flow.c     | 74 ++++++++++++++++++++++++++++++++
 drivers/net/mlx5/mlx5_trigger.c  | 11 ++++-
 6 files changed, 94 insertions(+), 67 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +1 ~~-61~~

index f283a3779cc..93ee9318ebc 100644
@@ -697,56 +697,6 @@ mlx5_init_once(void)
 	return ret;
 }
 
-/**
- * Create the Tx queue DevX/Verbs object.
- *
- * @param dev
- *   Pointer to Ethernet device.
- * @param idx
- *   Queue index in DPDK Tx queue array.
- *
- * @return
- *   0 on success, a negative errno value otherwise and rte_errno is set.
- */
-static int
-mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
-{
-	struct mlx5_priv *priv = dev->data->dev_private;
-	struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
-	struct mlx5_txq_ctrl *txq_ctrl =
-			container_of(txq_data, struct mlx5_txq_ctrl, txq);
-
-	if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
-		return mlx5_txq_devx_obj_new(dev, idx);
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-	if (!priv->config.dv_esw_en)
-		return mlx5_txq_devx_obj_new(dev, idx);
-#endif
-	return mlx5_txq_ibv_obj_new(dev, idx);
-}
-
-/**
- * Release an Tx DevX/verbs queue object.
- *
- * @param txq_obj
- *   DevX/Verbs Tx queue object.
- */
-static void
-mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
-{
-	if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
-		mlx5_txq_devx_obj_release(txq_obj);
-		return;
-	}
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-	if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
-		mlx5_txq_devx_obj_release(txq_obj);
-		return;
-	}
-#endif
-	mlx5_txq_ibv_obj_release(txq_obj);
-}
-
 /**
  * DV flow counter mode detect and config.
  *

@@ -1812,16 +1762,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 						ibv_obj_ops.drop_action_create;
 		priv->obj_ops.drop_action_destroy =
 						ibv_obj_ops.drop_action_destroy;
-#ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
-		priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
-#else
-		if (config->dv_esw_en)
-			priv->obj_ops.txq_obj_modify =
-						ibv_obj_ops.txq_obj_modify;
-#endif
-		/* Use specific wrappers for Tx object. */
-		priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
-		priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
 		mlx5_queue_counter_id_prepare(eth_dev);
 		priv->obj_ops.lb_dummy_queue_create =
 					mlx5_rxq_ibv_obj_dummy_lb_create;

@@ -1832,7 +1772,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	}
 	if (config->tx_pp &&
 	    (priv->config.dv_esw_en ||
-	     priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
+	     priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new)) {
 		/*
 		 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
 		 * packet pacing and already checked above.

drivers/net/mlx5/mlx5.h +2 -0

index 3581414b789..570f827375a 100644
@@ -1699,6 +1699,8 @@ int mlx5_ctrl_flow(struct rte_eth_dev *dev,
 		   struct rte_flow_item_eth *eth_mask);
 int mlx5_flow_lacp_miss(struct rte_eth_dev *dev);
 struct rte_flow *mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev);
+uint32_t mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev,
+					    uint32_t txq);
 void mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
 				       uint64_t async_id, int status);
 void mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh);

drivers/net/mlx5/mlx5_devx.c +5 -5

index a1db53577a2..a49602cb957 100644
@@ -102,9 +102,9 @@ mlx5_devx_modify_rq(struct mlx5_rxq_obj *rxq_obj, uint8_t type)
  * @return
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
-static int
-mlx5_devx_modify_sq(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
-		    uint8_t dev_port)
+int
+mlx5_txq_devx_modify(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
+		     uint8_t dev_port)
 {
 	struct mlx5_devx_modify_sq_attr msq_attr = { 0 };
 	int ret;

@@ -1118,7 +1118,7 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 	*txq_data->qp_db = 0;
 	txq_data->qp_num_8s = txq_obj->sq_obj.sq->id << 8;
 	/* Change Send Queue state to Ready-to-Send. */
-	ret = mlx5_devx_modify_sq(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
+	ret = mlx5_txq_devx_modify(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
 	if (ret) {
 		rte_errno = errno;
 		DRV_LOG(ERR,

@@ -1187,7 +1187,7 @@ struct mlx5_obj_ops devx_obj_ops = {
 	.drop_action_create = mlx5_devx_drop_action_create,
 	.drop_action_destroy = mlx5_devx_drop_action_destroy,
 	.txq_obj_new = mlx5_txq_devx_obj_new,
-	.txq_obj_modify = mlx5_devx_modify_sq,
+	.txq_obj_modify = mlx5_txq_devx_modify,
 	.txq_obj_release = mlx5_txq_devx_obj_release,
 	.lb_dummy_queue_create = NULL,
 	.lb_dummy_queue_release = NULL,

drivers/net/mlx5/mlx5_devx.h +2 -0

index bc8a8d6b73c..a95207a6b9a 100644
@@ -8,6 +8,8 @@
 #include "mlx5.h"
 
 int mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx);
+int mlx5_txq_devx_modify(struct mlx5_txq_obj *obj,
+			 enum mlx5_txq_modify_type type, uint8_t dev_port);
 void mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj);
 
 extern struct mlx5_obj_ops devx_obj_ops;

drivers/net/mlx5/mlx5_flow.c +74 -0

80 lines not on this page · raw message

drivers/net/mlx5/mlx5_trigger.c +10 -1

index 54173bfacb2..42d8bb31128 100644
@@ -1255,9 +1255,18 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
 				goto error;
 			}
 		}
+		if ((priv->representor || priv->master) &&
+		    priv->config.dv_esw_en) {
+			if (mlx5_flow_create_devx_sq_miss_flow(dev, i) == 0) {
+				DRV_LOG(ERR,
+					"Port %u Tx queue %u SQ create representor devx default miss rule failed.",
+					dev->data->port_id, i);
+				goto error;
+			}
+		}
 		mlx5_txq_release(dev, i);
 	}
-	if (priv->config.dv_esw_en && !priv->config.vf && !priv->config.sf) {
+	if ((priv->master || priv->representor) && priv->config.dv_esw_en) {
 		if (mlx5_flow_create_esw_table_zero_flow(dev))
 			priv->fdb_def_rule = 1;
 		else

Signature · 1 line

2.33.0

Slava Ovsiienko

Acked-by on v2 7/8

2021-10-19 08:29 UTC #23 lore raw

Re: [dpdk-dev] [PATCH v2 7/8] net/mlx5: enable DevX Tx queue creation

Quoted 29 lines

-----Original Message-----
From: Xueming(Steven) Li <[email protected]>
Sent: Saturday, October 16, 2021 11:08
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>; Matan Azrad <[email protected]>
Subject: [PATCH v2 7/8] net/mlx5: enable DevX Tx queue creation
Verbs API does not support Infiniband device port number larger 255 by design. To support more representors on a single Infiniband device DevX API should be engaged.
While creating Send Queue (SQ) object with Verbs API, the PMD assigned IB device port attribute and kernel created the default miss flows in FDB domain, to redirect egress traffic from the queue being created to representor appropriate peer (wire, HPF, VF or SF).
With DevX API there is no IB-device port attribute (it is merely kernel one, DevX operates in PRM terms) and PMD must create default miss flows in FDB explicitly. PMD did not provide this and using DevX API for E-Switch configurations was disabled.
The default miss FDB flow matches E-Switch manager vport (to make sure the source is some representor) and SQn (Send Queue number - device internal queue index). The root flow table managed by kernel/firmware and it does not support vport redirect action, we have to split the default miss flow into two ones:

Quoted 6 lines

- flow with lowest priority in the root table that matches E-Switch manager vport ID and jump to group 1.
- flow in group 1 that matches E-Switch manager vport ID and SQn and forwards packet to peer vport
Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

Xueming Li

author

2021-10-16 08:08 UTC #24 lore raw

PATCH v2 8/8 net/mlx5: check DevX to support more Verbs ports

In reply to Xueming Li

Verbs API doesn't support device port number larger than 255 by design.

To support more VF or SubFunction port representors, forces DevX API check when max Verbs device link ports larger than 255.

Signed-off-by Xueming Li <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +5 -6

index 93ee9318ebc..39a9722d869 100644
@@ -1299,12 +1299,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		config->dv_flow_en = 0;
 	}
 #endif
-	if (spawn->max_port > UINT8_MAX) {
-		/* Verbs can't support ports larger than 255 by design. */
-		DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
-		err = EINVAL;
-		goto error;
-	}
 	config->ind_table_max_size =
 		sh->device_attr.max_rwq_indirection_table_size;
 	/*

@@ -1767,6 +1761,11 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 					mlx5_rxq_ibv_obj_dummy_lb_create;
 		priv->obj_ops.lb_dummy_queue_release =
 					mlx5_rxq_ibv_obj_dummy_lb_release;
+	} else if (spawn->max_port > UINT8_MAX) {
+		/* Verbs can't support ports larger than 255 by design. */
+		DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
+		err = ENOTSUP;
+		goto error;
 	} else {
 		priv->obj_ops = ibv_obj_ops;
 	}

Signature · 1 line

2.33.0

Slava Ovsiienko

Acked-by on v2 8/8

2021-10-19 08:30 UTC #25 lore raw

Re: [dpdk-dev] [PATCH v2 8/8] net/mlx5: check DevX to support more Verbs ports

Quoted 9 lines

-----Original Message-----
From: Xueming(Steven) Li <[email protected]>
Sent: Saturday, October 16, 2021 11:08
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>; Matan Azrad <[email protected]>
Subject: [PATCH v2 8/8] net/mlx5: check DevX to support more Verbs ports

Quoted 6 lines

Verbs API doesn't support device port number larger than 255 by design.
To support more VF or SubFunction port representors, forces DevX API check when max Verbs device link ports larger than 255.
Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

Xueming Li

author

2021-10-19 10:35 UTC #26 lore raw

v3 cover net/mlx5: support more than 255 representors

In reply to Xueming Li

This patch set supports representor number of a PF to be more than 255. CX6 and current OFED driver supports maxium 512 SFs. CX5 supports max 255 SFs.

v2:
- fixed FDB root table flow priority
- add error check to Netlink port state API
- commit log update and other minor fixes
v3:
- fix compilation issue

Xueming Li (8):
common/mlx5: add netlink API to get RDMA port state net/mlx5: use netlink when IB port greater than 255 net/mlx5: improve Verbs flow priority discover for scalable net/mlx5: support E-Switch manager egress traffic match net/mlx5: supports flow item of normal Tx queue net/mlx5: fix internal root table flow priroity net/mlx5: enable DevX Tx queue creation
net/mlx5: check DevX to support more Verbs ports

 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 136 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   2 +
 drivers/common/mlx5/version.map       |   1 +
 drivers/net/mlx5/linux/mlx5_os.c      | 119 +++++++---------------
 drivers/net/mlx5/mlx5.h               |   2 +
 drivers/net/mlx5/mlx5_devx.c          |  10 +-
 drivers/net/mlx5/mlx5_devx.h          |   2 +
 drivers/net/mlx5/mlx5_flow.c          |  81 ++++++++++++++-
 drivers/net/mlx5/mlx5_flow.h          |   7 +-
 drivers/net/mlx5/mlx5_flow_dv.c       |  44 +++++++--
 drivers/net/mlx5/mlx5_flow_verbs.c    |   8 ++
 drivers/net/mlx5/mlx5_trigger.c       |  11 ++-
 13 files changed, 291 insertions(+), 134 deletions(-)

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-19 10:35 UTC #27 lore raw

PATCH v3 1/8 common/mlx5: add netlink API to get RDMA port state

Introduce netlink API to get rdma port state.

Port state is restrieved based on RDMA device name and port index.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 136 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   2 +
 drivers/common/mlx5/version.map       |   1 +
 4 files changed, 106 insertions(+), 35 deletions(-)

drivers/common/mlx5/linux/meson.build +2 -0

index cbea58f557d..2dcd27b7786 100644
@@ -175,6 +175,8 @@ has_sym_args = [
             'RDMA_NLDEV_ATTR_DEV_NAME' ],
         [ 'HAVE_RDMA_NLDEV_ATTR_PORT_INDEX', 'rdma/rdma_netlink.h',
             'RDMA_NLDEV_ATTR_PORT_INDEX' ],
+        [ 'HAVE_RDMA_NLDEV_ATTR_PORT_STATE', 'rdma/rdma_netlink.h',
+            'RDMA_NLDEV_ATTR_PORT_STATE' ],
         [ 'HAVE_RDMA_NLDEV_ATTR_NDEV_INDEX', 'rdma/rdma_netlink.h',
             'RDMA_NLDEV_ATTR_NDEV_INDEX' ],
         [ 'HAVE_MLX5_DR_FLOW_DUMP', 'infiniband/mlx5dv.h',

drivers/common/mlx5/linux/mlx5_nl.c +101 ~~-35~~

225 lines not on this page · raw message

drivers/common/mlx5/linux/mlx5_nl.h +2 -0

index 15129ffdc88..396f8f3f20a 100644
@@ -54,6 +54,8 @@ unsigned int mlx5_nl_portnum(int nl, const char *name);
 __rte_internal
 unsigned int mlx5_nl_ifindex(int nl, const char *name, uint32_t pindex);
 __rte_internal
+int mlx5_nl_port_state(int nl, const char *name, uint32_t pindex);
+__rte_internal
 int mlx5_nl_vf_mac_addr_modify(int nlsk_fd, unsigned int iface_idx,
 			       struct rte_ether_addr *mac, int vf_index);
 __rte_internal

drivers/common/mlx5/version.map +1 -0

index d3c5040aac8..2a2c7e51ba5 100644
@@ -134,6 +134,7 @@ INTERNAL {
 	mlx5_nl_mac_addr_flush; # WINDOWS_NO_EXPORT
 	mlx5_nl_mac_addr_remove; # WINDOWS_NO_EXPORT
 	mlx5_nl_mac_addr_sync; # WINDOWS_NO_EXPORT
+	mlx5_nl_port_state; # WINDOWS_NO_EXPORT
 	mlx5_nl_portnum; # WINDOWS_NO_EXPORT
 	mlx5_nl_promisc; # WINDOWS_NO_EXPORT
 	mlx5_nl_switch_info; # WINDOWS_NO_EXPORT

Signature · 1 line

2.33.0

Ferruh Yigit

2021-10-21 13:35 UTC #28 lore raw

Re: [dpdk-dev] [PATCH v3 1/8] common/mlx5: add netlink API to get RDMA port state

Quoted 6 lines · Xueming Li

Introduce netlink API to get rdma port state.
Port state is restrieved based on RDMA device name and port index.
Signed-off-by Xueming Li<[email protected]>
Acked-by Viacheslav Ovsiienko<[email protected]>

Is there a kernel driver version dependency for used netlink message?

Xueming Li

author

2021-10-19 10:35 UTC #29 lore raw

PATCH v3 2/8 net/mlx5: use netlink when IB port greater than 255

In reply to Xueming Li

IB spec doesn't allow 255 ports on a single HCA, port number of 256 was cast to u8 value 0 which invalid to ibv_query_port()

This patch invokes Netlink api to query port state when port number greater than 255.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 46 ++++++++++++++++++++++----------
 1 file changed, 32 insertions(+), 14 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +32 ~~-14~~

index 3746057673d..f283a3779cc 100644
@@ -956,7 +956,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 {
 	const struct mlx5_switch_info *switch_info = &spawn->info;
 	struct mlx5_dev_ctx_shared *sh = NULL;
-	struct ibv_port_attr port_attr;
+	struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 	struct rte_eth_dev *eth_dev = NULL;
 	struct mlx5_priv *priv = NULL;

@@ -976,6 +976,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	int own_domain_id = 0;
 	uint16_t port_id;
 	struct mlx5_port_info vport_info = { .query_flags = 0 };
+	int nl_rdma = -1;
 	int i;
 
 	/* Determine if this port representor is supposed to be spawned. */

@@ -1170,19 +1171,36 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		" old OFED/rdma-core version or firmware configuration");
 #endif
 	config->mpls_en = mpls_en;
+	nl_rdma = mlx5_nl_init(NETLINK_RDMA);
 	/* Check port status. */
-	err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
-	if (err) {
-		DRV_LOG(ERR, "port query failed: %s", strerror(err));
-		goto error;
-	}
-	if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
-		DRV_LOG(ERR, "port is not configured in Ethernet mode");
-		err = EINVAL;
-		goto error;
+	if (spawn->phys_port <= UINT8_MAX) {
+		/* Legacy Verbs api only support u8 port number. */
+		err = mlx5_glue->query_port(sh->ctx, spawn->phys_port,
+					    &port_attr);
+		if (err) {
+			DRV_LOG(ERR, "port query failed: %s", strerror(err));
+			goto error;
+		}
+		if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
+			DRV_LOG(ERR, "port is not configured in Ethernet mode");
+			err = EINVAL;
+			goto error;
+		}
+	} else if (nl_rdma >= 0) {
+		/* IB doesn't allow more than 255 ports, must be Ethernet. */
+		err = mlx5_nl_port_state(nl_rdma,
+			((struct ibv_device *)spawn->phys_dev)->name,
+			spawn->phys_port);
+		if (err < 0) {
+			DRV_LOG(INFO, "Failed to get netlink port state: %s",
+				strerror(rte_errno));
+			err = -rte_errno;
+			goto error;
+		}
+		port_attr.state = (enum ibv_port_state)err;
 	}
 	if (port_attr.state != IBV_PORT_ACTIVE)
-		DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
+		DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
 			mlx5_glue->port_state_str(port_attr.state),
 			port_attr.state);
 	/* Allocate private eth device data. */

@@ -1199,7 +1217,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	priv->pci_dev = spawn->pci_dev;
 	priv->mtu = RTE_ETHER_MTU;
 	/* Some internal functions rely on Netlink sockets, open them now. */
-	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
+	priv->nl_socket_rdma = nl_rdma;
 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
 	priv->representor = !!switch_info->representor;
 	priv->master = !!switch_info->master;

@@ -1910,8 +1928,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 			mlx5_os_free_shared_dr(priv);
 		if (priv->nl_socket_route >= 0)
 			close(priv->nl_socket_route);
-		if (priv->nl_socket_rdma >= 0)
-			close(priv->nl_socket_rdma);
 		if (priv->vmwa_context)
 			mlx5_vlan_vmwa_exit(priv->vmwa_context);
 		if (eth_dev && priv->drop_queue.hrxq)

@@ -1935,6 +1951,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	}
 	if (sh)
 		mlx5_free_shared_dev_ctx(sh);
+	if (nl_rdma >= 0)
+		close(nl_rdma);
 	MLX5_ASSERT(err > 0);
 	rte_errno = err;
 	return NULL;

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-19 10:35 UTC #30 lore raw

PATCH v3 3/8 net/mlx5: improve Verbs flow priority discover for scalable

In reply to Xueming Li

To detect number flow Verbs flow priorities, PMD try to create Verbs flows in different priority. While Verbs is not designed to support ports larger than 255.

When DevX supported by kernel driver, 16 Verbs priorities must be supported, no need to create Verbs flows.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/mlx5_flow_verbs.c | 8 ++++++++
 1 file changed, 8 insertions(+)

drivers/net/mlx5/mlx5_flow_verbs.c +8 -0

index b93fd4d2c96..f265e176940 100644
@@ -83,6 +83,11 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 	int i;
 	int priority = 0;
 
+#if defined(HAVE_MLX5DV_DR_DEVX_PORT) || defined(HAVE_MLX5DV_DR_DEVX_PORT_V35)
+	/* If DevX supported, driver must support 16 verbs flow priorities. */
+	priority = 16;
+	goto out;
+#endif
 	if (!drop->qp) {
 		rte_errno = ENOTSUP;
 		return -rte_errno;

@@ -109,6 +114,9 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 			dev->data->port_id, priority);
 		return -rte_errno;
 	}
+#if defined(HAVE_MLX5DV_DR_DEVX_PORT) || defined(HAVE_MLX5DV_DR_DEVX_PORT_V35)
+out:
+#endif
 	DRV_LOG(INFO, "port %u supported flow priorities:"
 		" 0-%d for ingress or egress root table,"
 		" 0-%d for non-root table or transfer root table.",

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-19 10:36 UTC #31 lore raw

PATCH v3 4/8 net/mlx5: support E-Switch manager egress traffic match

In reply to Xueming Li

This patch adds flow item port ID match on E-Switch manager.

E-Switch manager vport ID is 0xfffe on BlueField, 0 otherwise.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.h    |  3 +++
 drivers/net/mlx5/mlx5_flow_dv.c | 25 +++++++++++++++++++++++++
 2 files changed, 28 insertions(+)

drivers/net/mlx5/mlx5_flow.h +3 -0

index 5c68d4f7d74..c25af8d9864 100644
@@ -18,6 +18,9 @@
 
 #include "mlx5.h"
 
+/* E-Switch Manager port, used for rte_flow_item_port_id. */
+#define MLX5_PORT_ESW_MGR UINT32_MAX
+
 /* Private rte flow items. */
 enum mlx5_rte_flow_item_type {
 	MLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN,

drivers/net/mlx5/mlx5_flow_dv.c +25 -0

index c6370cd1d68..f06ce54f7e7 100644
@@ -15,6 +15,7 @@
 #include <rte_flow_driver.h>
 #include <rte_malloc.h>
 #include <rte_cycles.h>
+#include <rte_bus_pci.h>
 #include <rte_ip.h>
 #include <rte_gre.h>
 #include <rte_vxlan.h>

@@ -92,6 +93,23 @@ static int
 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
 				  uint32_t rix_jump);
 
+static int16_t
+flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+
+	if (priv->pci_dev == NULL)
+		return 0;
+	switch (priv->pci_dev->id.device_id) {
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
+		return (int16_t)0xfffe;
+	default:
+		return 0;
+	}
+}
+
 /**
  * Initialize flow attributes structure according to flow items' types.
  *

@@ -2224,6 +2242,8 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 		return ret;
 	if (!spec)
 		return 0;
+	if (spec->id == MLX5_PORT_ESW_MGR)
+		return 0;
 	esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
 	if (!esw_priv)
 		return rte_flow_error_set(error, rte_errno,

@@ -9685,6 +9705,11 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
 	struct mlx5_priv *priv;
 	uint16_t mask, id;
 
+	if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
+		flow_dv_translate_item_source_vport(matcher, key,
+			flow_dv_get_esw_manager_vport_id(dev), 0xffff);
+		return 0;
+	}
 	mask = pid_m ? pid_m->id : 0xffff;
 	id = pid_v ? pid_v->id : dev->data->port_id;
 	priv = mlx5_port_to_eswitch_info(id, item == NULL);

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-19 10:36 UTC #32 lore raw

PATCH v3 5/8 net/mlx5: supports flow item of normal Tx queue

In reply to Xueming Li

Extends txq flow pattern to support both hairpin and regular txq.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/mlx5_flow_dv.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

drivers/net/mlx5/mlx5_flow_dv.c +8 -8

index f06ce54f7e7..4a17ca64a2e 100644
@@ -10910,22 +10910,22 @@ flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
 	void *misc_v =
 		MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
 	struct mlx5_txq_ctrl *txq;
-	uint32_t queue;
-
+	uint32_t queue, mask;
 
 	queue_m = (const void *)item->mask;
-	if (!queue_m)
-		return;
 	queue_v = (const void *)item->spec;
 	if (!queue_v)
 		return;
 	txq = mlx5_txq_get(dev, queue_v->queue);
 	if (!txq)
 		return;
-	queue = txq->obj->sq->id;
-	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
-	MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
-		 queue & queue_m->queue);
+	if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
+		queue = txq->obj->sq->id;
+	else
+		queue = txq->obj->sq_obj.sq->id;
+	mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
+	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
+	MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
 	mlx5_txq_release(dev, queue_v->queue);
 }

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-19 10:36 UTC #33 lore raw

PATCH v3 6/8 net/mlx5: fix internal root table flow priroity

In reply to Xueming Li

This patch fixes this by adding internal flow check.

Fixes 5f8ae44dd454 ("net/mlx5: enlarge maximal flow priority")

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.c    | 7 ++++++-
 drivers/net/mlx5/mlx5_flow.h    | 4 ++--
 drivers/net/mlx5/mlx5_flow_dv.c | 3 ++-
 3 files changed, 10 insertions(+), 4 deletions(-)

drivers/net/mlx5/mlx5_flow.c +6 -1

index c914a7120cc..b5232cd46ae 100644
@@ -980,13 +980,15 @@ mlx5_get_lowest_priority(struct rte_eth_dev *dev,
  *   Pointer to device flow rule attributes.
  * @param[in] subpriority
  *   The priority based on the items.
+ * @param[in] external
+ *   Flow is user flow.
  * @return
  *   The matcher priority of the flow.
  */
 uint16_t
 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 			  const struct rte_flow_attr *attr,
-			  uint32_t subpriority)
+			  uint32_t subpriority, bool external)
 {
 	uint16_t priority = (uint16_t)attr->priority;
 	struct mlx5_priv *priv = dev->data->dev_private;

@@ -995,6 +997,9 @@ mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 		if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 			priority = priv->config.flow_prio - 1;
 		return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
+	} else if (!external && attr->transfer && attr->group == 0 &&
+		   attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
+		return (priv->config.flow_prio - 1) * 3;
 	}
 	if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 		priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;

drivers/net/mlx5/mlx5_flow.h +2 -2

index c25af8d9864..f1a83d537d0 100644
@@ -1431,8 +1431,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 uint32_t mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 					const struct rte_flow_attr *attr);
 uint16_t mlx5_get_matcher_priority(struct rte_eth_dev *dev,
-				     const struct rte_flow_attr *attr,
-				     uint32_t subpriority);
+				   const struct rte_flow_attr *attr,
+				   uint32_t subpriority, bool external);
 int mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 				     enum mlx5_feature_name feature,
 				     uint32_t id,

drivers/net/mlx5/mlx5_flow_dv.c +2 -1

index 4a17ca64a2e..ffc1fc8a05c 100644
@@ -13646,7 +13646,8 @@ flow_dv_translate(struct rte_eth_dev *dev,
 	matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
 				    matcher.mask.size);
 	matcher.priority = mlx5_get_matcher_priority(dev, attr,
-					matcher.priority);
+						     matcher.priority,
+						     dev_flow->external);
 	/**
 	 * When creating meter drop flow in drop table, using original
 	 * 5-tuple match, the matcher priority should be lower than

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-19 10:36 UTC #34 lore raw

PATCH v3 7/8 net/mlx5: enable DevX Tx queue creation

In reply to Xueming Li

Verbs API does not support Infiniband device port number larger 255 by design. To support more representors on a single Infiniband device DevX API should be engaged.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 62 +-------------------------
 drivers/net/mlx5/mlx5.h          |  2 +
 drivers/net/mlx5/mlx5_devx.c     | 10 ++---
 drivers/net/mlx5/mlx5_devx.h     |  2 +
 drivers/net/mlx5/mlx5_flow.c     | 74 ++++++++++++++++++++++++++++++++
 drivers/net/mlx5/mlx5_trigger.c  | 11 ++++-
 6 files changed, 94 insertions(+), 67 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +1 ~~-61~~

index f283a3779cc..93ee9318ebc 100644
@@ -697,56 +697,6 @@ mlx5_init_once(void)
 	return ret;
 }
 
-/**
- * Create the Tx queue DevX/Verbs object.
- *
- * @param dev
- *   Pointer to Ethernet device.
- * @param idx
- *   Queue index in DPDK Tx queue array.
- *
- * @return
- *   0 on success, a negative errno value otherwise and rte_errno is set.
- */
-static int
-mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
-{
-	struct mlx5_priv *priv = dev->data->dev_private;
-	struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
-	struct mlx5_txq_ctrl *txq_ctrl =
-			container_of(txq_data, struct mlx5_txq_ctrl, txq);
-
-	if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
-		return mlx5_txq_devx_obj_new(dev, idx);
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-	if (!priv->config.dv_esw_en)
-		return mlx5_txq_devx_obj_new(dev, idx);
-#endif
-	return mlx5_txq_ibv_obj_new(dev, idx);
-}
-
-/**
- * Release an Tx DevX/verbs queue object.
- *
- * @param txq_obj
- *   DevX/Verbs Tx queue object.
- */
-static void
-mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
-{
-	if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
-		mlx5_txq_devx_obj_release(txq_obj);
-		return;
-	}
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-	if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
-		mlx5_txq_devx_obj_release(txq_obj);
-		return;
-	}
-#endif
-	mlx5_txq_ibv_obj_release(txq_obj);
-}
-
 /**
  * DV flow counter mode detect and config.
  *

@@ -1812,16 +1762,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 						ibv_obj_ops.drop_action_create;
 		priv->obj_ops.drop_action_destroy =
 						ibv_obj_ops.drop_action_destroy;
-#ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
-		priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
-#else
-		if (config->dv_esw_en)
-			priv->obj_ops.txq_obj_modify =
-						ibv_obj_ops.txq_obj_modify;
-#endif
-		/* Use specific wrappers for Tx object. */
-		priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
-		priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
 		mlx5_queue_counter_id_prepare(eth_dev);
 		priv->obj_ops.lb_dummy_queue_create =
 					mlx5_rxq_ibv_obj_dummy_lb_create;

@@ -1832,7 +1772,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	}
 	if (config->tx_pp &&
 	    (priv->config.dv_esw_en ||
-	     priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
+	     priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new)) {
 		/*
 		 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
 		 * packet pacing and already checked above.

drivers/net/mlx5/mlx5.h +2 -0

index 3581414b789..570f827375a 100644
@@ -1699,6 +1699,8 @@ int mlx5_ctrl_flow(struct rte_eth_dev *dev,
 		   struct rte_flow_item_eth *eth_mask);
 int mlx5_flow_lacp_miss(struct rte_eth_dev *dev);
 struct rte_flow *mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev);
+uint32_t mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev,
+					    uint32_t txq);
 void mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
 				       uint64_t async_id, int status);
 void mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh);

drivers/net/mlx5/mlx5_devx.c +5 -5

index a1db53577a2..a49602cb957 100644
@@ -102,9 +102,9 @@ mlx5_devx_modify_rq(struct mlx5_rxq_obj *rxq_obj, uint8_t type)
  * @return
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
-static int
-mlx5_devx_modify_sq(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
-		    uint8_t dev_port)
+int
+mlx5_txq_devx_modify(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
+		     uint8_t dev_port)
 {
 	struct mlx5_devx_modify_sq_attr msq_attr = { 0 };
 	int ret;

@@ -1118,7 +1118,7 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 	*txq_data->qp_db = 0;
 	txq_data->qp_num_8s = txq_obj->sq_obj.sq->id << 8;
 	/* Change Send Queue state to Ready-to-Send. */
-	ret = mlx5_devx_modify_sq(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
+	ret = mlx5_txq_devx_modify(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
 	if (ret) {
 		rte_errno = errno;
 		DRV_LOG(ERR,

@@ -1187,7 +1187,7 @@ struct mlx5_obj_ops devx_obj_ops = {
 	.drop_action_create = mlx5_devx_drop_action_create,
 	.drop_action_destroy = mlx5_devx_drop_action_destroy,
 	.txq_obj_new = mlx5_txq_devx_obj_new,
-	.txq_obj_modify = mlx5_devx_modify_sq,
+	.txq_obj_modify = mlx5_txq_devx_modify,
 	.txq_obj_release = mlx5_txq_devx_obj_release,
 	.lb_dummy_queue_create = NULL,
 	.lb_dummy_queue_release = NULL,

drivers/net/mlx5/mlx5_devx.h +2 -0

index bc8a8d6b73c..a95207a6b9a 100644
@@ -8,6 +8,8 @@
 #include "mlx5.h"
 
 int mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx);
+int mlx5_txq_devx_modify(struct mlx5_txq_obj *obj,
+			 enum mlx5_txq_modify_type type, uint8_t dev_port);
 void mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj);
 
 extern struct mlx5_obj_ops devx_obj_ops;

drivers/net/mlx5/mlx5_flow.c +74 -0

80 lines not on this page · raw message

drivers/net/mlx5/mlx5_trigger.c +10 -1

index 54173bfacb2..42d8bb31128 100644
@@ -1255,9 +1255,18 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
 				goto error;
 			}
 		}
+		if ((priv->representor || priv->master) &&
+		    priv->config.dv_esw_en) {
+			if (mlx5_flow_create_devx_sq_miss_flow(dev, i) == 0) {
+				DRV_LOG(ERR,
+					"Port %u Tx queue %u SQ create representor devx default miss rule failed.",
+					dev->data->port_id, i);
+				goto error;
+			}
+		}
 		mlx5_txq_release(dev, i);
 	}
-	if (priv->config.dv_esw_en && !priv->config.vf && !priv->config.sf) {
+	if ((priv->master || priv->representor) && priv->config.dv_esw_en) {
 		if (mlx5_flow_create_esw_table_zero_flow(dev))
 			priv->fdb_def_rule = 1;
 		else

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-19 10:36 UTC #35 lore raw

PATCH v3 8/8 net/mlx5: check DevX to support more Verbs ports

In reply to Xueming Li

Verbs API doesn't support device port number larger than 255 by design.

To support more VF or SubFunction port representors, forces DevX API check when max Verbs device link ports larger than 255.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +5 -6

index 93ee9318ebc..39a9722d869 100644
@@ -1299,12 +1299,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		config->dv_flow_en = 0;
 	}
 #endif
-	if (spawn->max_port > UINT8_MAX) {
-		/* Verbs can't support ports larger than 255 by design. */
-		DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
-		err = EINVAL;
-		goto error;
-	}
 	config->ind_table_max_size =
 		sh->device_attr.max_rwq_indirection_table_size;
 	/*

@@ -1767,6 +1761,11 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 					mlx5_rxq_ibv_obj_dummy_lb_create;
 		priv->obj_ops.lb_dummy_queue_release =
 					mlx5_rxq_ibv_obj_dummy_lb_release;
+	} else if (spawn->max_port > UINT8_MAX) {
+		/* Verbs can't support ports larger than 255 by design. */
+		DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
+		err = ENOTSUP;
+		goto error;
 	} else {
 		priv->obj_ops = ibv_obj_ops;
 	}

Signature · 1 line

2.33.0

Raslan Darawsheh

2021-10-20 13:40 UTC #36 lore raw

In reply to Xueming Li

Hi,

Quoted 45 lines

-----Original Message-----
From: dev <[email protected]> On Behalf Of Xueming Li
Sent: Tuesday, October 19, 2021 1:35 PM
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>
Subject: [dpdk-dev] [PATCH v3 0/8] net/mlx5: support more than 255 representors
This patch set supports representor number of a PF to be more than 255. CX6 and current OFED driver supports maxium 512 SFs. CX5 supports max 255 SFs.
v2:
- fixed FDB root table flow priority
- add error check to Netlink port state API
- commit log update and other minor fixes
v3:
- fix compilation issue
Xueming Li (8):
common/mlx5: add netlink API to get RDMA port state net/mlx5: use netlink when IB port greater than 255 net/mlx5: improve Verbs flow priority discover for scalable net/mlx5: support E-Switch manager egress traffic match net/mlx5: supports flow item of normal Tx queue net/mlx5: fix internal root table flow priroity net/mlx5: enable DevX Tx queue creation
net/mlx5: check DevX to support more Verbs ports
 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 136 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   2 +
 drivers/common/mlx5/version.map       |   1 +
 drivers/net/mlx5/linux/mlx5_os.c      | 119 +++++++---------------
 drivers/net/mlx5/mlx5.h               |   2 +
 drivers/net/mlx5/mlx5_devx.c          |  10 +-
 drivers/net/mlx5/mlx5_devx.h          |   2 +
 drivers/net/mlx5/mlx5_flow.c          |  81 ++++++++++++++-
 drivers/net/mlx5/mlx5_flow.h          |   7 +-
 drivers/net/mlx5/mlx5_flow_dv.c       |  44 +++++++--
 drivers/net/mlx5/mlx5_flow_verbs.c    |   8 ++
 drivers/net/mlx5/mlx5_trigger.c       |  11 ++-
 13 files changed, 291 insertions(+), 134 deletions(-)

Quoted 2 lines

--
2.33.0

Series applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh

Xueming(Steven) Li

author

2021-10-20 16:00 UTC #37 lore raw

Quoted 47 lines · Raslan Darawsheh

Hi,
Quoted 45 lines
-----Original Message-----
From: dev <[email protected]> On Behalf Of Xueming Li
Sent: Tuesday, October 19, 2021 1:35 PM
To: [email protected]
Cc: Xueming(Steven) Li <[email protected]>; Slava Ovsiienko <[email protected]>; Lior Margalit <[email protected]>
Subject: [dpdk-dev] [PATCH v3 0/8] net/mlx5: support more than 255 representors
This patch set supports representor number of a PF to be more than 255. CX6 and current OFED driver supports maxium 512 SFs. CX5 supports max 255 SFs.
v2:
- fixed FDB root table flow priority
- add error check to Netlink port state API
- commit log update and other minor fixes
v3:
- fix compilation issue
Xueming Li (8):
common/mlx5: add netlink API to get RDMA port state net/mlx5: use netlink when IB port greater than 255 net/mlx5: improve Verbs flow priority discover for scalable net/mlx5: support E-Switch manager egress traffic match net/mlx5: supports flow item of normal Tx queue net/mlx5: fix internal root table flow priroity net/mlx5: enable DevX Tx queue creation
net/mlx5: check DevX to support more Verbs ports
 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 136 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   2 +
 drivers/common/mlx5/version.map       |   1 +
 drivers/net/mlx5/linux/mlx5_os.c      | 119 +++++++---------------
 drivers/net/mlx5/mlx5.h               |   2 +
 drivers/net/mlx5/mlx5_devx.c          |  10 +-
 drivers/net/mlx5/mlx5_devx.h          |   2 +
 drivers/net/mlx5/mlx5_flow.c          |  81 ++++++++++++++-
 drivers/net/mlx5/mlx5_flow.h          |   7 +-
 drivers/net/mlx5/mlx5_flow_dv.c       |  44 +++++++--
 drivers/net/mlx5/mlx5_flow_verbs.c    |   8 ++
 drivers/net/mlx5/mlx5_trigger.c       |  11 ++-
 13 files changed, 291 insertions(+), 134 deletions(-)

Quoted 7 lines

Quoted 2 lines
--
2.33.0
Series applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh

Thanks!

Xueming Li

author

2021-10-22 09:12 UTC #38 lore raw

v4 cover net/mlx5: support more than 255 representors

In reply to Xueming Li

This patch set supports representor number of a PF to be more than 255. CX6 and current OFED driver supports maxium 512 SFs. CX5 supports max 255 SFs.

v2:
- fixed FDB root table flow priority
- add error check to Netlink port state API
- commit log update and other minor fixes
v3:
- fix compilation issue
v4:
- fix rebase issue
- rebase on latest upstream

Xueming Li (8):
common/mlx5: add netlink API to get RDMA port state net/mlx5: use netlink when IB port greater than 255 net/mlx5: improve Verbs flow priority discover for scalable net/mlx5: support E-Switch manager egress traffic match net/mlx5: supports flow item of normal Tx queue net/mlx5: fix internal root table flow priroity net/mlx5: enable DevX Tx queue creation
net/mlx5: check DevX to support more Verbs ports

 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 136 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   2 +
 drivers/common/mlx5/version.map       |   1 +
 drivers/net/mlx5/linux/mlx5_os.c      | 119 +++++++---------------
 drivers/net/mlx5/mlx5.h               |   2 +
 drivers/net/mlx5/mlx5_devx.c          |  10 +-
 drivers/net/mlx5/mlx5_devx.h          |   2 +
 drivers/net/mlx5/mlx5_flow.c          |  81 ++++++++++++++-
 drivers/net/mlx5/mlx5_flow.h          |   7 +-
 drivers/net/mlx5/mlx5_flow_dv.c       |  44 +++++++--
 drivers/net/mlx5/mlx5_flow_verbs.c    |   8 ++
 drivers/net/mlx5/mlx5_trigger.c       |  11 ++-
 13 files changed, 290 insertions(+), 135 deletions(-)

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-22 09:12 UTC #39 lore raw

PATCH v4 1/8 common/mlx5: add netlink API to get RDMA port state

Introduce netlink API to get rdma port state.

Port state is restrieved based on RDMA device name and port index.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/common/mlx5/linux/meson.build |   2 +
 drivers/common/mlx5/linux/mlx5_nl.c   | 136 +++++++++++++++++++-------
 drivers/common/mlx5/linux/mlx5_nl.h   |   2 +
 drivers/common/mlx5/version.map       |   1 +
 4 files changed, 106 insertions(+), 35 deletions(-)

drivers/common/mlx5/linux/meson.build +2 -0

index cbea58f557d..2dcd27b7786 100644
@@ -175,6 +175,8 @@ has_sym_args = [
             'RDMA_NLDEV_ATTR_DEV_NAME' ],
         [ 'HAVE_RDMA_NLDEV_ATTR_PORT_INDEX', 'rdma/rdma_netlink.h',
             'RDMA_NLDEV_ATTR_PORT_INDEX' ],
+        [ 'HAVE_RDMA_NLDEV_ATTR_PORT_STATE', 'rdma/rdma_netlink.h',
+            'RDMA_NLDEV_ATTR_PORT_STATE' ],
         [ 'HAVE_RDMA_NLDEV_ATTR_NDEV_INDEX', 'rdma/rdma_netlink.h',
             'RDMA_NLDEV_ATTR_NDEV_INDEX' ],
         [ 'HAVE_MLX5_DR_FLOW_DUMP', 'infiniband/mlx5dv.h',

drivers/common/mlx5/linux/mlx5_nl.c +101 ~~-35~~

225 lines not on this page · raw message

drivers/common/mlx5/linux/mlx5_nl.h +2 -0

index 202849f52ad..2063c0deeb9 100644
@@ -54,6 +54,8 @@ unsigned int mlx5_nl_portnum(int nl, const char *name);
 __rte_internal
 unsigned int mlx5_nl_ifindex(int nl, const char *name, uint32_t pindex);
 __rte_internal
+int mlx5_nl_port_state(int nl, const char *name, uint32_t pindex);
+__rte_internal
 int mlx5_nl_vf_mac_addr_modify(int nlsk_fd, unsigned int iface_idx,
 			       struct rte_ether_addr *mac, int vf_index);
 __rte_internal

drivers/common/mlx5/version.map +1 -0

index 1167fcd3236..7c95172fe87 100644
@@ -120,6 +120,7 @@ INTERNAL {
 	mlx5_nl_mac_addr_flush; # WINDOWS_NO_EXPORT
 	mlx5_nl_mac_addr_remove; # WINDOWS_NO_EXPORT
 	mlx5_nl_mac_addr_sync; # WINDOWS_NO_EXPORT
+	mlx5_nl_port_state; # WINDOWS_NO_EXPORT
 	mlx5_nl_portnum; # WINDOWS_NO_EXPORT
 	mlx5_nl_promisc; # WINDOWS_NO_EXPORT
 	mlx5_nl_switch_info; # WINDOWS_NO_EXPORT

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-22 09:12 UTC #40 lore raw

PATCH v4 2/8 net/mlx5: use netlink when IB port greater than 255

In reply to Xueming Li

IB spec doesn't allow 255 ports on a single HCA, port number of 256 was cast to u8 value 0 which invalid to ibv_query_port()

This patch invokes Netlink api to query port state when port number greater than 255.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 46 +++++++++++++++++++++-----------
 1 file changed, 31 insertions(+), 15 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +31 ~~-15~~

index 54e0ba9f3a9..101ef943f42 100644
@@ -905,7 +905,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 {
 	const struct mlx5_switch_info *switch_info = &spawn->info;
 	struct mlx5_dev_ctx_shared *sh = NULL;
-	struct ibv_port_attr port_attr;
+	struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 	struct rte_eth_dev *eth_dev = NULL;
 	struct mlx5_priv *priv = NULL;

@@ -924,6 +924,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	int own_domain_id = 0;
 	uint16_t port_id;
 	struct mlx5_port_info vport_info = { .query_flags = 0 };
+	int nl_rdma = -1;
 	int i;
 
 	/* Determine if this port representor is supposed to be spawned. */

@@ -1121,20 +1122,35 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		" old OFED/rdma-core version or firmware configuration");
 #endif
 	config->mpls_en = mpls_en;
+	nl_rdma = mlx5_nl_init(NETLINK_RDMA);
 	/* Check port status. */
-	err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
-				    &port_attr);
-	if (err) {
-		DRV_LOG(ERR, "port query failed: %s", strerror(err));
-		goto error;
-	}
-	if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
-		DRV_LOG(ERR, "port is not configured in Ethernet mode");
-		err = EINVAL;
-		goto error;
+	if (spawn->phys_port <= UINT8_MAX) {
+		/* Legacy Verbs api only support u8 port number. */
+		err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
+					    &port_attr);
+		if (err) {
+			DRV_LOG(ERR, "port query failed: %s", strerror(err));
+			goto error;
+		}
+		if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
+			DRV_LOG(ERR, "port is not configured in Ethernet mode");
+			err = EINVAL;
+			goto error;
+		}
+	} else if (nl_rdma >= 0) {
+		/* IB doesn't allow more than 255 ports, must be Ethernet. */
+		err = mlx5_nl_port_state(nl_rdma, spawn->phys_dev_name,
+					 spawn->phys_port);
+		if (err < 0) {
+			DRV_LOG(INFO, "Failed to get netlink port state: %s",
+				strerror(rte_errno));
+			err = -rte_errno;
+			goto error;
+		}
+		port_attr.state = (enum ibv_port_state)err;
 	}
 	if (port_attr.state != IBV_PORT_ACTIVE)
-		DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
+		DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
 			mlx5_glue->port_state_str(port_attr.state),
 			port_attr.state);
 	/* Allocate private eth device data. */

@@ -1151,7 +1167,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	priv->pci_dev = spawn->pci_dev;
 	priv->mtu = RTE_ETHER_MTU;
 	/* Some internal functions rely on Netlink sockets, open them now. */
-	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
+	priv->nl_socket_rdma = nl_rdma;
 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
 	priv->representor = !!switch_info->representor;
 	priv->master = !!switch_info->master;

@@ -1844,8 +1860,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 			mlx5_os_free_shared_dr(priv);
 		if (priv->nl_socket_route >= 0)
 			close(priv->nl_socket_route);
-		if (priv->nl_socket_rdma >= 0)
-			close(priv->nl_socket_rdma);
 		if (priv->vmwa_context)
 			mlx5_vlan_vmwa_exit(priv->vmwa_context);
 		if (eth_dev && priv->drop_queue.hrxq)

@@ -1869,6 +1883,8 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	}
 	if (sh)
 		mlx5_free_shared_dev_ctx(sh);
+	if (nl_rdma >= 0)
+		close(nl_rdma);
 	MLX5_ASSERT(err > 0);
 	rte_errno = err;
 	return NULL;

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-22 09:12 UTC #41 lore raw

PATCH v4 3/8 net/mlx5: improve Verbs flow priority discover for scalable

In reply to Xueming Li

To detect number flow Verbs flow priorities, PMD try to create Verbs flows in different priority. While Verbs is not designed to support ports larger than 255.

When DevX supported by kernel driver, 16 Verbs priorities must be supported, no need to create Verbs flows.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/mlx5_flow_verbs.c | 8 ++++++++
 1 file changed, 8 insertions(+)

drivers/net/mlx5/mlx5_flow_verbs.c +8 -0

index 60029f71178..3f5aaa885fb 100644
@@ -83,6 +83,11 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 	int i;
 	int priority = 0;
 
+#if defined(HAVE_MLX5DV_DR_DEVX_PORT) || defined(HAVE_MLX5DV_DR_DEVX_PORT_V35)
+	/* If DevX supported, driver must support 16 verbs flow priorities. */
+	priority = RTE_DIM(priority_map_5);
+	goto out;
+#endif
 	if (!drop->qp) {
 		rte_errno = ENOTSUP;
 		return -rte_errno;

@@ -109,6 +114,9 @@ mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 			dev->data->port_id, priority);
 		return -rte_errno;
 	}
+#if defined(HAVE_MLX5DV_DR_DEVX_PORT) || defined(HAVE_MLX5DV_DR_DEVX_PORT_V35)
+out:
+#endif
 	DRV_LOG(INFO, "port %u supported flow priorities:"
 		" 0-%d for ingress or egress root table,"
 		" 0-%d for non-root table or transfer root table.",

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-22 09:12 UTC #42 lore raw

PATCH v4 4/8 net/mlx5: support E-Switch manager egress traffic match

In reply to Xueming Li

This patch adds flow item port ID match on E-Switch manager.

E-Switch manager vport ID is 0xfffe on BlueField, 0 otherwise.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.h    |  3 +++
 drivers/net/mlx5/mlx5_flow_dv.c | 25 +++++++++++++++++++++++++
 2 files changed, 28 insertions(+)

drivers/net/mlx5/mlx5_flow.h +3 -0

index 5c68d4f7d74..c25af8d9864 100644
@@ -18,6 +18,9 @@
 
 #include "mlx5.h"
 
+/* E-Switch Manager port, used for rte_flow_item_port_id. */
+#define MLX5_PORT_ESW_MGR UINT32_MAX
+
 /* Private rte flow items. */
 enum mlx5_rte_flow_item_type {
 	MLX5_RTE_FLOW_ITEM_TYPE_END = INT_MIN,

drivers/net/mlx5/mlx5_flow_dv.c +25 -0

index f2fde912947..5b964153860 100644
@@ -15,6 +15,7 @@
 #include <rte_flow_driver.h>
 #include <rte_malloc.h>
 #include <rte_cycles.h>
+#include <rte_bus_pci.h>
 #include <rte_ip.h>
 #include <rte_gre.h>
 #include <rte_vxlan.h>

@@ -92,6 +93,23 @@ static int
 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
 				  uint32_t rix_jump);
 
+static int16_t
+flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
+{
+	struct mlx5_priv *priv = dev->data->dev_private;
+
+	if (priv->pci_dev == NULL)
+		return 0;
+	switch (priv->pci_dev->id.device_id) {
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
+	case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
+		return (int16_t)0xfffe;
+	default:
+		return 0;
+	}
+}
+
 /**
  * Initialize flow attributes structure according to flow items' types.
  *

@@ -2184,6 +2202,8 @@ flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 		return ret;
 	if (!spec)
 		return 0;
+	if (spec->id == MLX5_PORT_ESW_MGR)
+		return 0;
 	esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
 	if (!esw_priv)
 		return rte_flow_error_set(error, rte_errno,

@@ -9575,6 +9595,11 @@ flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
 	struct mlx5_priv *priv;
 	uint16_t mask, id;
 
+	if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
+		flow_dv_translate_item_source_vport(matcher, key,
+			flow_dv_get_esw_manager_vport_id(dev), 0xffff);
+		return 0;
+	}
 	mask = pid_m ? pid_m->id : 0xffff;
 	id = pid_v ? pid_v->id : dev->data->port_id;
 	priv = mlx5_port_to_eswitch_info(id, item == NULL);

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-22 09:12 UTC #43 lore raw

PATCH v4 5/8 net/mlx5: supports flow item of normal Tx queue

In reply to Xueming Li

Extends txq flow pattern to support both hairpin and regular txq.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/mlx5_flow_dv.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

drivers/net/mlx5/mlx5_flow_dv.c +8 -8

index 5b964153860..e505cdbb0f7 100644
@@ -10818,22 +10818,22 @@ flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
 	void *misc_v =
 		MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
 	struct mlx5_txq_ctrl *txq;
-	uint32_t queue;
-
+	uint32_t queue, mask;
 
 	queue_m = (const void *)item->mask;
-	if (!queue_m)
-		return;
 	queue_v = (const void *)item->spec;
 	if (!queue_v)
 		return;
 	txq = mlx5_txq_get(dev, queue_v->queue);
 	if (!txq)
 		return;
-	queue = txq->obj->sq->id;
-	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
-	MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
-		 queue & queue_m->queue);
+	if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
+		queue = txq->obj->sq->id;
+	else
+		queue = txq->obj->sq_obj.sq->id;
+	mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
+	MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
+	MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
 	mlx5_txq_release(dev, queue_v->queue);
 }

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-22 09:12 UTC #44 lore raw

PATCH v4 6/8 net/mlx5: fix internal root table flow priroity

In reply to Xueming Li

This patch fixes this by adding internal flow check.

Fixes 5f8ae44dd454 ("net/mlx5: enlarge maximal flow priority")

Cc [email protected]

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/mlx5_flow.c    | 7 ++++++-
 drivers/net/mlx5/mlx5_flow.h    | 4 ++--
 drivers/net/mlx5/mlx5_flow_dv.c | 3 ++-
 3 files changed, 10 insertions(+), 4 deletions(-)

drivers/net/mlx5/mlx5_flow.c +6 -1

index ffcc031bff3..4abeae8ce2d 100644
@@ -1003,13 +1003,15 @@ mlx5_get_lowest_priority(struct rte_eth_dev *dev,
  *   Pointer to device flow rule attributes.
  * @param[in] subpriority
  *   The priority based on the items.
+ * @param[in] external
+ *   Flow is user flow.
  * @return
  *   The matcher priority of the flow.
  */
 uint16_t
 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 			  const struct rte_flow_attr *attr,
-			  uint32_t subpriority)
+			  uint32_t subpriority, bool external)
 {
 	uint16_t priority = (uint16_t)attr->priority;
 	struct mlx5_priv *priv = dev->data->dev_private;

@@ -1018,6 +1020,9 @@ mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 		if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 			priority = priv->config.flow_prio - 1;
 		return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
+	} else if (!external && attr->transfer && attr->group == 0 &&
+		   attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
+		return (priv->config.flow_prio - 1) * 3;
 	}
 	if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 		priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;

drivers/net/mlx5/mlx5_flow.h +2 -2

index c25af8d9864..f1a83d537d0 100644
@@ -1431,8 +1431,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 uint32_t mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 					const struct rte_flow_attr *attr);
 uint16_t mlx5_get_matcher_priority(struct rte_eth_dev *dev,
-				     const struct rte_flow_attr *attr,
-				     uint32_t subpriority);
+				   const struct rte_flow_attr *attr,
+				   uint32_t subpriority, bool external);
 int mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 				     enum mlx5_feature_name feature,
 				     uint32_t id,

drivers/net/mlx5/mlx5_flow_dv.c +2 -1

index e505cdbb0f7..6413b45d8d3 100644
@@ -13556,7 +13556,8 @@ flow_dv_translate(struct rte_eth_dev *dev,
 	matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
 				    matcher.mask.size);
 	matcher.priority = mlx5_get_matcher_priority(dev, attr,
-					matcher.priority);
+						     matcher.priority,
+						     dev_flow->external);
 	/**
 	 * When creating meter drop flow in drop table, using original
 	 * 5-tuple match, the matcher priority should be lower than

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-22 09:12 UTC #45 lore raw

PATCH v4 7/8 net/mlx5: enable DevX Tx queue creation

In reply to Xueming Li

Verbs API does not support Infiniband device port number larger 255 by design. To support more representors on a single Infiniband device DevX API should be engaged.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 62 +-------------------------
 drivers/net/mlx5/mlx5.h          |  2 +
 drivers/net/mlx5/mlx5_devx.c     | 10 ++---
 drivers/net/mlx5/mlx5_devx.h     |  2 +
 drivers/net/mlx5/mlx5_flow.c     | 74 ++++++++++++++++++++++++++++++++
 drivers/net/mlx5/mlx5_trigger.c  | 11 ++++-
 6 files changed, 94 insertions(+), 67 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +1 ~~-61~~

index 101ef943f42..2db842cb983 100644
@@ -646,56 +646,6 @@ mlx5_init_once(void)
 	return ret;
 }
 
-/**
- * Create the Tx queue DevX/Verbs object.
- *
- * @param dev
- *   Pointer to Ethernet device.
- * @param idx
- *   Queue index in DPDK Tx queue array.
- *
- * @return
- *   0 on success, a negative errno value otherwise and rte_errno is set.
- */
-static int
-mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
-{
-	struct mlx5_priv *priv = dev->data->dev_private;
-	struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
-	struct mlx5_txq_ctrl *txq_ctrl =
-			container_of(txq_data, struct mlx5_txq_ctrl, txq);
-
-	if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
-		return mlx5_txq_devx_obj_new(dev, idx);
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-	if (!priv->config.dv_esw_en)
-		return mlx5_txq_devx_obj_new(dev, idx);
-#endif
-	return mlx5_txq_ibv_obj_new(dev, idx);
-}
-
-/**
- * Release an Tx DevX/verbs queue object.
- *
- * @param txq_obj
- *   DevX/Verbs Tx queue object.
- */
-static void
-mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
-{
-	if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
-		mlx5_txq_devx_obj_release(txq_obj);
-		return;
-	}
-#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
-	if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
-		mlx5_txq_devx_obj_release(txq_obj);
-		return;
-	}
-#endif
-	mlx5_txq_ibv_obj_release(txq_obj);
-}
-
 /**
  * DV flow counter mode detect and config.
  *

@@ -1744,16 +1694,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 						ibv_obj_ops.drop_action_create;
 		priv->obj_ops.drop_action_destroy =
 						ibv_obj_ops.drop_action_destroy;
-#ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
-		priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
-#else
-		if (config->dv_esw_en)
-			priv->obj_ops.txq_obj_modify =
-						ibv_obj_ops.txq_obj_modify;
-#endif
-		/* Use specific wrappers for Tx object. */
-		priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
-		priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
 		mlx5_queue_counter_id_prepare(eth_dev);
 		priv->obj_ops.lb_dummy_queue_create =
 					mlx5_rxq_ibv_obj_dummy_lb_create;

@@ -1764,7 +1704,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 	}
 	if (config->tx_pp &&
 	    (priv->config.dv_esw_en ||
-	     priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
+	     priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new)) {
 		/*
 		 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
 		 * packet pacing and already checked above.

drivers/net/mlx5/mlx5.h +2 -0

index 6f5a78b2493..adef86d3ae0 100644
@@ -1664,6 +1664,8 @@ int mlx5_ctrl_flow(struct rte_eth_dev *dev,
 		   struct rte_flow_item_eth *eth_mask);
 int mlx5_flow_lacp_miss(struct rte_eth_dev *dev);
 struct rte_flow *mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev);
+uint32_t mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev,
+					    uint32_t txq);
 void mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
 				       uint64_t async_id, int status);
 void mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh);

drivers/net/mlx5/mlx5_devx.c +5 -5

index 6b6b9c77ae4..9050a32eb1c 100644
@@ -102,9 +102,9 @@ mlx5_devx_modify_rq(struct mlx5_rxq_obj *rxq_obj, uint8_t type)
  * @return
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
-static int
-mlx5_devx_modify_sq(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
-		    uint8_t dev_port)
+int
+mlx5_txq_devx_modify(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type,
+		     uint8_t dev_port)
 {
 	struct mlx5_devx_modify_sq_attr msq_attr = { 0 };
 	int ret;

@@ -1121,7 +1121,7 @@ mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 	*txq_data->qp_db = 0;
 	txq_data->qp_num_8s = txq_obj->sq_obj.sq->id << 8;
 	/* Change Send Queue state to Ready-to-Send. */
-	ret = mlx5_devx_modify_sq(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
+	ret = mlx5_txq_devx_modify(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
 	if (ret) {
 		rte_errno = errno;
 		DRV_LOG(ERR,

@@ -1190,7 +1190,7 @@ struct mlx5_obj_ops devx_obj_ops = {
 	.drop_action_create = mlx5_devx_drop_action_create,
 	.drop_action_destroy = mlx5_devx_drop_action_destroy,
 	.txq_obj_new = mlx5_txq_devx_obj_new,
-	.txq_obj_modify = mlx5_devx_modify_sq,
+	.txq_obj_modify = mlx5_txq_devx_modify,
 	.txq_obj_release = mlx5_txq_devx_obj_release,
 	.lb_dummy_queue_create = NULL,
 	.lb_dummy_queue_release = NULL,

drivers/net/mlx5/mlx5_devx.h +2 -0

index bc8a8d6b73c..a95207a6b9a 100644
@@ -8,6 +8,8 @@
 #include "mlx5.h"
 
 int mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx);
+int mlx5_txq_devx_modify(struct mlx5_txq_obj *obj,
+			 enum mlx5_txq_modify_type type, uint8_t dev_port);
 void mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj);
 
 extern struct mlx5_obj_ops devx_obj_ops;

drivers/net/mlx5/mlx5_flow.c +74 -0

80 lines not on this page · raw message

drivers/net/mlx5/mlx5_trigger.c +10 -1

index 54c28934372..ca43bd51aab 100644
@@ -1308,9 +1308,18 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
 				goto error;
 			}
 		}
+		if ((priv->representor || priv->master) &&
+		    priv->config.dv_esw_en) {
+			if (mlx5_flow_create_devx_sq_miss_flow(dev, i) == 0) {
+				DRV_LOG(ERR,
+					"Port %u Tx queue %u SQ create representor devx default miss rule failed.",
+					dev->data->port_id, i);
+				goto error;
+			}
+		}
 		mlx5_txq_release(dev, i);
 	}
-	if (priv->config.dv_esw_en && !priv->config.vf && !priv->config.sf) {
+	if ((priv->master || priv->representor) && priv->config.dv_esw_en) {
 		if (mlx5_flow_create_esw_table_zero_flow(dev))
 			priv->fdb_def_rule = 1;
 		else

Signature · 1 line

2.33.0

Xueming Li

author

2021-10-22 09:13 UTC #46 lore raw

PATCH v4 8/8 net/mlx5: check DevX to support more Verbs ports

In reply to Xueming Li

Verbs API doesn't support device port number larger than 255 by design.

To support more VF or SubFunction port representors, forces DevX API check when max Verbs device link ports larger than 255.

Signed-off-by Xueming Li <[email protected]>

Acked-by Viacheslav Ovsiienko <[email protected]>

---
 drivers/net/mlx5/linux/mlx5_os.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

drivers/net/mlx5/linux/mlx5_os.c +5 -6

index 2db842cb983..17192c7fd55 100644
@@ -1243,12 +1243,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		config->dv_flow_en = 0;
 	}
 #endif
-	if (spawn->max_port > UINT8_MAX) {
-		/* Verbs can't support ports larger than 255 by design. */
-		DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
-		err = EINVAL;
-		goto error;
-	}
 	config->ind_table_max_size =
 		sh->device_attr.max_rwq_indirection_table_size;
 	/*

@@ -1699,6 +1693,11 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 					mlx5_rxq_ibv_obj_dummy_lb_create;
 		priv->obj_ops.lb_dummy_queue_release =
 					mlx5_rxq_ibv_obj_dummy_lb_release;
+	} else if (spawn->max_port > UINT8_MAX) {
+		/* Verbs can't support ports larger than 255 by design. */
+		DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
+		err = ENOTSUP;
+		goto error;
 	} else {
 		priv->obj_ops = ibv_obj_ops;
 	}

Signature · 1 line

2.33.0