arm64: dts: sm8350: add support for Microsoft Surface Duo 2
cover arm64: dts: sm8350: add support for Microsoft Surface Duo 2
Add initial support for the Microsoft Surface Duo 2 based on the sm8350-mtp DT with the following functionality:
* UFS internal storage
* USB peripheral mode
* Remoteproc
Katherine Perez (2):
arm64: dts: add minimal DTS for Microsoft Surface Duo2
arm64: dts: sm8350: fix tlmm base address
arch/arm64/boot/dts/qcom/Makefile | 1 + .../qcom/sm8350-microsoft-surface-duo2.dts | 363 ++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 +- 3 files changed, 366 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts
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2.31.1
PATCH 1/2 arm64: dts: add minimal DTS for Microsoft Surface Duo2
This is a minimal devicetree for Microsoft Surface Duo 2 with SM8350 Chipset
Signed-off-by Katherine Perez <[email protected]>
--- arch/arm64/boot/dts/qcom/Makefile | 1 + .../qcom/sm8350-microsoft-surface-duo2.dts | 363 ++++++++++++++++++ 2 files changed, 364 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts
arch/arm64/boot/dts/qcom/Makefile +1 -0
@@ -94,4 +94,5 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8250-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8250-sony-xperia-edo-pdx203.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8250-sony-xperia-edo-pdx206.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8350-hdk.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm8350-microsoft-surface-duo2.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8350-mtp.dtb
arch/arm64/boot/dts/qcom/sm8350-microsoft-surface-duo2.dts new file +363 -0
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2.31.1
PATCH 2/2 arm64: dts: sm8350: fix tlmm base address
In reply to Katherine PerezTLMM controller base address is incorrect and will hang on some platforms. Fix by giving the correct address.
Signed-off-by Katherine Perez <[email protected]>
--- arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sm8350.dtsi +2 -2
@@ -815,9 +815,9 @@ spmi_bus: spmi@c440000 { #interrupt-cells = <4>; }; - tlmm: pinctrl@f100000 { + tlmm: pinctrl@f000000 { compatible = "qcom,sm8350-tlmm"; - reg = <0 0x0f100000 0 0x300000>; + reg = <0 0x0f000000 0 0x300000>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>;
Signature · 1 line
2.31.1