drm/i915: Asynchronous vma unbinding
Subsystems (3)
v7 cover drm/i915: Asynchronous vma unbinding
This patch series introduces infrastructure for asynchronous vma unbinding. The single enabled use-case is initially at buffer object migration where we otherwise sync when unbinding vmas before migration. This in theory allows us to pipeline any number of migrations, but in practice the number is restricted by a sync wait when filling the migration context ring. We might want to look at that moving forward if needed.
The other main use-case is to be able to pipeline vma evictions, for example with softpinning where a new vma wants to reuse the vm range of an already active vma. We can't support this just yet because we need dma_resv locking around vma eviction for that, which is under implementation.
Patch 1 introduces vma resource first for error capture purposes Patch 2 changes the vm backend interface to take vma resources rather than vmas Patch 3 removes and unneeded page pinning
Patch 4 introduces the async unbinding itself, and finally
Patch 5 introduces a selftest
Patch 6 realizes we have duplicated functionality and removes the vma snapshots
v2:
-- Some kernel test robot reports addressed.
-- kmem cache for vma resources, See patch 4
-- Various fixes all over the place. See separate commit messages. v3:
-- Re-add a missing i915_vma_resource_put()
-- Remove a stray debug printout
v4:
-- Patch series split in two. This is the second part.
-- Take cache coloring into account when searching for vma_resources
pending unbind. (Matthew Auld)
v5:
-- Add a selftest.
-- Remove page pinning while sync binding.
-- A couple of fixes in i915_vma_resource_bind_dep_await()
v6:
-- Some documentation updates
-- Remove I915_VMA_ALLOC_BIT (Matthew Auld)
-- Change some members of struct i915_vma_resource from unsigned long to u64
(Matthew Auld)
-- Fix up the cache coloring adjustment. (Kernel test robot <[email protected]>) -- Don't allow async unbinding if the vma_res pages are not the same as
the object pages. (Matthew Auld)
v7:
-- More s/unsigned long/u64/ changes (Matthew Auld)
Thomas Hellström (6):
drm/i915: Initial introduction of vma resources
drm/i915: Use the vma resource as argument for gtt binding / unbinding drm/i915: Don't pin the object pages during pending vma binds drm/i915: Use vma resources for async unbinding
drm/i915: Asynchronous migration selftest
drm/i915: Use struct vma_resource instead of struct vma_snapshot
drivers/gpu/drm/i915/Makefile | 2 +- drivers/gpu/drm/i915/display/intel_dpt.c | 27 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 17 +- drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 + drivers/gpu/drm/i915/gem/i915_gem_object.h | 3 + .../gpu/drm/i915/gem/i915_gem_object_types.h | 27 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 11 +- .../gpu/drm/i915/gem/selftests/huge_pages.c | 37 +- .../drm/i915/gem/selftests/i915_gem_migrate.c | 192 +++++++- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 19 +- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 37 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 9 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 72 +-- drivers/gpu/drm/i915/gt/intel_gtt.c | 4 + drivers/gpu/drm/i915/gt/intel_gtt.h | 19 +- drivers/gpu/drm/i915/gt/intel_ppgtt.c | 22 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 +- drivers/gpu/drm/i915/i915_debugfs.c | 3 +- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 12 +- drivers/gpu/drm/i915/i915_gpu_error.c | 87 ++-- drivers/gpu/drm/i915/i915_module.c | 3 + drivers/gpu/drm/i915/i915_request.c | 12 +- drivers/gpu/drm/i915/i915_request.h | 6 +- drivers/gpu/drm/i915/i915_vma.c | 241 +++++++++- drivers/gpu/drm/i915/i915_vma.h | 33 +- drivers/gpu/drm/i915/i915_vma_resource.c | 417 ++++++++++++++++++ drivers/gpu/drm/i915/i915_vma_resource.h | 234 ++++++++++ drivers/gpu/drm/i915/i915_vma_snapshot.c | 134 ------ drivers/gpu/drm/i915/i915_vma_snapshot.h | 112 ----- drivers/gpu/drm/i915/i915_vma_types.h | 19 +- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 159 ++++--- drivers/gpu/drm/i915/selftests/mock_gtt.c | 12 +- 34 files changed, 1421 insertions(+), 589 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_vma_resource.c create mode 100644 drivers/gpu/drm/i915/i915_vma_resource.h delete mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.c delete mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.h
Signature · 1 line
2.31.1
PATCH v7 1/6 drm/i915: Initial introduction of vma resources
Introduce vma resources, sort of similar to TTM resources, needed for asynchronous bind management. Initially we will use them to hold completion of unbinding when we capture data from a vma, but they will be used extensively in upcoming patches for asynchronous vma unbinding.
v6:
- Some documentation updates
--- drivers/gpu/drm/i915/Makefile | 1 + .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- drivers/gpu/drm/i915/i915_vma.c | 55 +++++++- drivers/gpu/drm/i915/i915_vma.h | 19 ++- drivers/gpu/drm/i915/i915_vma_resource.c | 124 ++++++++++++++++++ drivers/gpu/drm/i915/i915_vma_resource.h | 69 ++++++++++ drivers/gpu/drm/i915/i915_vma_snapshot.c | 15 +-- drivers/gpu/drm/i915/i915_vma_snapshot.h | 7 +- drivers/gpu/drm/i915/i915_vma_types.h | 5 + drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 99 ++++++++------ 10 files changed, 333 insertions(+), 63 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_vma_resource.c create mode 100644 drivers/gpu/drm/i915/i915_vma_resource.h
drivers/gpu/drm/i915/Makefile +1 -0
@@ -174,6 +174,7 @@ i915-y += \ i915_trace_points.o \ i915_ttm_buddy_manager.o \ i915_vma.o \ + i915_vma_resource.o \ i915_vma_snapshot.o \ intel_wopcm.o
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +1 -1
@@ -1424,7 +1424,7 @@ eb_relocate_entry(struct i915_execbuffer *eb,mutex_lock (&vma->vm->mutex); err =i915_vma_bind (target->vma, target->vma->obj->cache_level, -PIN_GLOBAL ,NULL ); +PIN_GLOBAL ,NULL ,NULL );mutex_unlock (&vma->vm->mutex);reloc_cache_remap (&eb->reloc_cache, ev->vma->obj);if (err)
drivers/gpu/drm/i915/i915_vma.c +49 -6
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drivers/gpu/drm/i915/i915_vma.h +18 -1
@@ -37,6 +37,7 @@#include "i915_active.h" #include "i915_request.h" +#include "i915_vma_resource.h" #include "i915_vma_types.h" struct i915_vma *
@@ -204,7 +205,8 @@ struct i915_vma_work *i915_vma_work(void);int i915_vma_bind (struct i915_vma *vma,enum i915_cache_level cache_level,u32 flags, -struct i915_vma_work *work); +struct i915_vma_work *work, +struct i915_vma_resource *vma_res);bool i915_gem_valid_gtt_space (struct i915_vma *vma,unsigned long color); bool i915_vma_misplaced(const struct i915_vma *vma,
@@ -428,6 +430,21 @@ static inline int i915_vma_sync(struct i915_vma *vma)return i915_active_wait (&vma->active); } +/** +* i915_vma_get_current_resource - Get the current resource of the vma +* @vma: The vma to get the current resource from. +* +* It's illegal to call this function if the vma is not bound. +* +* Return: A refcounted pointer to the current vma resource +* of the vma, assuming the vma is bound. +*/ +static inline struct i915_vma_resource * +i915_vma_get_current_resource (struct i915_vma *vma) +{ +return i915_vma_resource_get (vma->resource); +} +void i915_vma_module_exit (void );int i915_vma_module_init (void );
drivers/gpu/drm/i915/i915_vma_resource.c new file +124 -0
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drivers/gpu/drm/i915/i915_vma_resource.h new file +69 -0
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drivers/gpu/drm/i915/i915_vma_snapshot.c +5 -10
@@ -3,6 +3,7 @@* Copyright © 2021 Intel Corporation */ +#include "i915_vma_resource.h" #include "i915_vma_snapshot.h" #include "i915_vma_types.h" #include "i915_vma.h"
@@ -35,7 +36,7 @@ void i915_vma_snapshot_init(struct i915_vma_snapshot *vsnap, vsnap->pages_rsgt =i915_refct_sgt_get (vma->obj->mm.rsgt); vsnap->mr = vma->obj->mm.region;kref_init (&vsnap->kref); - vsnap->vma_resource = &vma->active; + vsnap->vma_resource =i915_vma_get_current_resource (vma); vsnap->onstack = false; vsnap->present = true; }
@@ -62,6 +63,7 @@ static void vma_snapshot_release(struct kref *ref)container_of (ref,typeof (*vsnap), kref); vsnap->present = false; +i915_vma_resource_put (vsnap->vma_resource);if (vsnap->pages_rsgt)i915_refct_sgt_put (vsnap->pages_rsgt);if (!vsnap->onstack)
@@ -109,12 +111,7 @@ void i915_vma_snapshot_put_onstack(struct i915_vma_snapshot *vsnap)bool i915_vma_snapshot_resource_pin (struct i915_vma_snapshot *vsnap,bool *lockdep_cookie) { -bool pinned =i915_active_acquire_if_busy (vsnap->vma_resource); - -if (pinned) - *lockdep_cookie =dma_fence_begin_signalling (); - -return pinned; +return i915_vma_resource_hold (vsnap->vma_resource, lockdep_cookie); }/**
@@ -128,7 +125,5 @@ bool i915_vma_snapshot_resource_pin(struct i915_vma_snapshot *vsnap,void i915_vma_snapshot_resource_unpin (struct i915_vma_snapshot *vsnap,bool lockdep_cookie) { -dma_fence_end_signalling (lockdep_cookie); - -return i915_active_release (vsnap->vma_resource); +i915_vma_resource_unhold (vsnap->vma_resource, lockdep_cookie); }
drivers/gpu/drm/i915/i915_vma_snapshot.h +2 -5
@@ -31,10 +31,7 @@ struct sg_table;* @pages_rsgt: The refcounted sg_table holding the reference for @pages if any. * @mr: The memory region pointed for the pages bound. * @kref: Reference for this structure. -* @vma_resource: FIXME: A means to keep the unbind fence from signaling. -* Temporarily while we have only sync unbinds, and still use the vma -* active, we use that. With async unbinding we need a signaling refcount -* for the unbind fence. +* @vma_resource: Pointer to the vma resource representing the vma binding. * @page_sizes: The vma GTT page sizes information. * @onstack: Whether the structure shouldn't be freed on final put. * @present: Whether the structure is present and initialized.
@@ -49,7 +46,7 @@ struct i915_vma_snapshot {struct i915_refct_sgt *pages_rsgt;struct intel_memory_region *mr;struct kref kref; -struct i915_active *vma_resource; +struct i915_vma_resource *vma_resource;u32 page_sizes; bool onstack:1; bool present:1;
drivers/gpu/drm/i915/i915_vma_types.h +5 -0
@@ -95,6 +95,8 @@ enum i915_cache_level;* */ +struct i915_vma_resource ; +struct intel_remapped_plane_info {/* in gtt pages */ u32 offset:31 ;
@@ -291,6 +293,9 @@ struct i915_vma {struct list_head evict_link;struct list_head closed_link; + +/** The async vma resource. Protected by the vm_mutex */ + struct i915_vma_resource *resource; };#endif
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +59 -40
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Signature · 1 line
2.31.1
PATCH v7 2/6 drm/i915: Use the vma resource as argument for gtt binding / unbinding
In reply to Thomas HellströmWhen introducing asynchronous unbinding, the vma itself may no longer be alive when the actual binding or unbinding takes place.
Update the gtt i915_vma_ops accordingly to take a struct i915_vma_resource instead of a struct i915_vma for the bind_vma() and unbind_vma() ops. Similarly change the insert_entries() op for struct i915_address_space.
Replace a couple of i915_vma_snapshot members with their newly introduced i915_vma_resource counterparts, since they have the same lifetime.
Also make sure to avoid changing the struct i915_vma_flags (in particular the bind flags) async. That should now only be done sync under the vm mutex.
v2:
- Update the vma_res::bound_flags when binding to the aliased ggtt v6:
- Remove I915_VMA_ALLOC_BIT (Matthew Auld)
- Change some members of struct i915_vma_resource from unsigned long to u64 (Matthew Auld)
v7:
- Fix vma resource size parameters to be u64 rather than unsigned long (Matthew Auld)
--- drivers/gpu/drm/i915/display/intel_dpt.c | 27 ++--- .../gpu/drm/i915/gem/i915_gem_object_types.h | 27 +---- .../gpu/drm/i915/gem/selftests/huge_pages.c | 37 +++---- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 19 ++-- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 37 +++---- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 4 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 70 ++++++------- drivers/gpu/drm/i915/gt/intel_gtt.h | 16 +-- drivers/gpu/drm/i915/gt/intel_ppgtt.c | 22 +++-- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 ++- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 +- drivers/gpu/drm/i915/i915_debugfs.c | 3 +- drivers/gpu/drm/i915/i915_gpu_error.c | 6 +- drivers/gpu/drm/i915/i915_vma.c | 24 ++++- drivers/gpu/drm/i915/i915_vma.h | 11 +-- drivers/gpu/drm/i915/i915_vma_resource.c | 9 +- drivers/gpu/drm/i915/i915_vma_resource.h | 99 ++++++++++++++++++- drivers/gpu/drm/i915/i915_vma_snapshot.c | 4 - drivers/gpu/drm/i915/i915_vma_snapshot.h | 8 -- drivers/gpu/drm/i915/i915_vma_types.h | 14 ++- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 64 ++++++++---- drivers/gpu/drm/i915/selftests/mock_gtt.c | 12 +-- 22 files changed, 314 insertions(+), 214 deletions(-)
drivers/gpu/drm/i915/display/intel_dpt.c +15 -12
@@ -48,7 +48,7 @@ static void dpt_insert_page(struct i915_address_space *vm, }static void dpt_insert_entries (struct i915_address_space *vm, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level level,u32 flags) {
@@ -64,8 +64,8 @@ static void dpt_insert_entries(struct i915_address_space *vm,* not to allow the user to override access to a read only page. */ - i = vma->node.start /I915_GTT_PAGE_SIZE ; -for_each_sgt_daddr (addr, sgt_iter, vma->pages) + i = vma_res->start /I915_GTT_PAGE_SIZE ; +for_each_sgt_daddr (addr, sgt_iter, vma_res->bi.pages)gen8_set_pte (&base[i++], pte_encode | addr); }
@@ -76,35 +76,38 @@ static void dpt_clear_range(struct i915_address_space *vm,static void dpt_bind_vma (struct i915_address_space *vm,struct i915_vm_pt_stash *stash, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 flags) { -struct drm_i915_gem_object *obj = vma->obj;u32 pte_flags; +if (vma_res->bound_flags) +return ; +/* Applicable to VLV (gen8+ do not support RO in the GGTT) */ pte_flags =0 ; -if (vma->vm->has_read_only &&i915_gem_object_is_readonly (obj)) +if (vm->has_read_only && vma_res->bi.readonly) pte_flags |=PTE_READ_ONLY ; -if (i915_gem_object_is_lmem (obj)) +if (vma_res->bi.lmem) pte_flags |=PTE_LM ; - vma->vm->insert_entries (vma->vm, vma, cache_level, pte_flags); + vm->insert_entries (vm, vma_res, cache_level, pte_flags); - vma->page_sizes.gtt =I915_GTT_PAGE_SIZE ; + vma_res->page_sizes_gtt =I915_GTT_PAGE_SIZE ;/* * Without aliasing PPGTT there's no difference between * GLOBAL/LOCAL_BIND, it's all the same ptes. Hence unconditionally * upgrade to both bound if we bind either to avoid double-binding. */ -atomic_or (I915_VMA_GLOBAL_BIND |I915_VMA_LOCAL_BIND , &vma->flags); + vma_res->bound_flags =I915_VMA_GLOBAL_BIND |I915_VMA_LOCAL_BIND ; } -static void dpt_unbind_vma (struct i915_address_space *vm,struct i915_vma *vma) +static void dpt_unbind_vma (struct i915_address_space *vm, +struct i915_vma_resource *vma_res) { - vm->clear_range (vm, vma->node.start, vma->size); + vm->clear_range (vm, vma_res->start, vma_res->vma_size); }static void dpt_cleanup (struct i915_address_space *vm)
drivers/gpu/drm/i915/gem/i915_gem_object_types.h +2 -25
@@ -15,6 +15,7 @@#include "i915_active.h" #include "i915_selftest.h" +#include "i915_vma_resource.h" struct drm_i915_gem_object ;struct intel_fronbuffer ;
@@ -566,31 +567,7 @@ struct drm_i915_gem_object {struct sg_table *pages;void *mapping; -struct i915_page_sizes { -/** -* The sg mask of the pages sg_table. i.e the mask of -* of the lengths for each sg entry. -*/ -unsigned int phys; - -/** -* The gtt page sizes we are allowed to use given the -* sg mask and the supported page sizes. This will -* express the smallest unit we can use for the whole -* object, as well as the larger sizes we may be able -* to use opportunistically. -*/ -unsigned int sg; - -/** -* The actual gtt page size usage. Since we can have -* multiple vma associated with this object we need to -* prevent any trampling of state, hence a copy of this -* struct also lives in each vma, therefore the gtt -* value here should only be read/write through the vma. -*/ -unsigned int gtt; - } page_sizes; +struct i915_page_sizes page_sizes; I915_SELFTEST_DECLARE(unsigned int page_mask);
drivers/gpu/drm/i915/gem/selftests/huge_pages.c +16 -21
@@ -370,9 +370,9 @@ static int igt_check_page_sizes(struct i915_vma *vma) err = -EINVAL ; } -if (!HAS_PAGE_SIZES (i915, vma->page_sizes.gtt)) { +if (!HAS_PAGE_SIZES (i915, vma->resource->page_sizes_gtt)) {pr_err ("unsupported page_sizes.gtt=%u, supported=%u\n" , - vma->page_sizes.gtt & ~supported, supported); + vma->resource->page_sizes_gtt & ~supported, supported); err = -EINVAL ; }
@@ -403,15 +403,9 @@ static int igt_check_page_sizes(struct i915_vma *vma)if (i915_gem_object_is_lmem (obj) &&IS_ALIGNED (vma->node.start,SZ_2M ) && vma->page_sizes.sg &SZ_2M && - vma->page_sizes.gtt <SZ_2M ) { + vma->resource->page_sizes_gtt <SZ_2M ) {pr_err ("gtt pages mismatch for LMEM, expected 2M GTT pages, sg(%u), gtt(%u)\n" , - vma->page_sizes.sg, vma->page_sizes.gtt); - err = -EINVAL ; - } - -if (obj->mm.page_sizes.gtt) { -pr_err ("obj->page_sizes.gtt(%u) should never be set\n" , - obj->mm.page_sizes.gtt); + vma->page_sizes.sg, vma->resource->page_sizes_gtt); err = -EINVAL ; }
@@ -547,9 +541,9 @@ static int igt_mock_memory_region_huge_pages(void *arg) goto out_unpin; } -if (vma->page_sizes.gtt != page_size) { +if (vma->resource->page_sizes_gtt != page_size) {pr_err ("%s page_sizes.gtt=%u, expected=%u\n" , - __func__, vma->page_sizes.gtt, + __func__, vma->resource->page_sizes_gtt, page_size); err = -EINVAL ; goto out_unpin;
@@ -630,9 +624,9 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg) err =igt_check_page_sizes (vma); -if (vma->page_sizes.gtt != page_size) { +if (vma->resource->page_sizes_gtt != page_size) {pr_err ("page_sizes.gtt=%u, expected %u\n" , - vma->page_sizes.gtt, page_size); + vma->resource->page_sizes_gtt, page_size); err = -EINVAL ; }
@@ -657,9 +651,10 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg) err =igt_check_page_sizes (vma); -if (vma->page_sizes.gtt !=I915_GTT_PAGE_SIZE_4K ) { +if (vma->resource->page_sizes_gtt !=I915_GTT_PAGE_SIZE_4K ) {pr_err ("page_sizes.gtt=%u, expected %llu\n" , - vma->page_sizes.gtt,I915_GTT_PAGE_SIZE_4K ); + vma->resource->page_sizes_gtt, +I915_GTT_PAGE_SIZE_4K ); err = -EINVAL ; }
@@ -805,9 +800,9 @@ static int igt_mock_ppgtt_huge_fill(void *arg) } } -if (vma->page_sizes.gtt != expected_gtt) { +if (vma->resource->page_sizes_gtt != expected_gtt) {pr_err ("gtt=%u, expected=%u, size=%zd, single=%s\n" , - vma->page_sizes.gtt, expected_gtt, + vma->resource->page_sizes_gtt, expected_gtt, obj->base.size,yesno (!!single)); err = -EINVAL ;break ;
@@ -961,10 +956,10 @@ static int igt_mock_ppgtt_64K(void *arg) } } -if (vma->page_sizes.gtt != expected_gtt) { +if (vma->resource->page_sizes_gtt != expected_gtt) {pr_err ("gtt=%u, expected=%u, i=%d, single=%s\n" , - vma->page_sizes.gtt, expected_gtt, i, -yesno (!!single)); + vma->resource->page_sizes_gtt, + expected_gtt, i,yesno (!!single)); err = -EINVAL ; goto out_vma_unpin; }
drivers/gpu/drm/i915/gt/gen6_ppgtt.c +10 -9
@@ -104,17 +104,17 @@ static void gen6_ppgtt_clear_range(struct i915_address_space *vm, }static void gen6_ppgtt_insert_entries (struct i915_address_space *vm, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 flags) {struct i915_ppgtt *ppgtt =i915_vm_to_ppgtt (vm);struct i915_page_directory *const pd = ppgtt->pd; -unsigned int first_entry = vma->node.start /I915_GTT_PAGE_SIZE ; +unsigned int first_entry = vma_res->start /I915_GTT_PAGE_SIZE ;unsigned int act_pt = first_entry /GEN6_PTES ;unsigned int act_pte = first_entry %GEN6_PTES ;const u32 pte_encode = vm->pte_encode (0 , cache_level, flags); -struct sgt_dma iter =sgt_dma (vma); +struct sgt_dma iter =sgt_dma (vma_res);gen6_pte_t *vaddr;GEM_BUG_ON (!pd->entry[act_pt]);
@@ -140,7 +140,7 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm, } }while (1 ); - vma->page_sizes.gtt =I915_GTT_PAGE_SIZE ; + vma_res->page_sizes_gtt =I915_GTT_PAGE_SIZE ; }static void gen6_flush_pd (struct gen6_ppgtt *ppgtt,u64 start,u64 end)
@@ -271,13 +271,13 @@ static void gen6_ppgtt_cleanup(struct i915_address_space *vm)static void pd_vma_bind (struct i915_address_space *vm,struct i915_vm_pt_stash *stash, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 unused) {struct i915_ggtt *ggtt =i915_vm_to_ggtt (vm); -struct gen6_ppgtt *ppgtt = vma->private; -u32 ggtt_offset =i915_ggtt_offset (vma) /I915_GTT_PAGE_SIZE ; +struct gen6_ppgtt *ppgtt = vma_res->private; +u32 ggtt_offset = vma_res->start /I915_GTT_PAGE_SIZE ; ppgtt->pp_dir = ggtt_offset *sizeof (gen6_pte_t) <<10 ; ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm + ggtt_offset;
@@ -285,9 +285,10 @@ static void pd_vma_bind(struct i915_address_space *vm,gen6_flush_pd (ppgtt,0 , ppgtt->base.vm.total); } -static void pd_vma_unbind (struct i915_address_space *vm,struct i915_vma *vma) +static void pd_vma_unbind (struct i915_address_space *vm, +struct i915_vma_resource *vma_res) { -struct gen6_ppgtt *ppgtt = vma->private; +struct gen6_ppgtt *ppgtt = vma_res->private;struct i915_page_directory *const pd = ppgtt->base.pd;struct i915_page_table *pt;unsigned int pde;
drivers/gpu/drm/i915/gt/gen8_ppgtt.c +19 -18
@@ -453,20 +453,21 @@ gen8_ppgtt_insert_pte(struct i915_ppgtt *ppgtt,return idx; } -static void gen8_ppgtt_insert_huge (struct i915_vma *vma, +static void gen8_ppgtt_insert_huge (struct i915_address_space *vm, +struct i915_vma_resource *vma_res,struct sgt_dma *iter,enum i915_cache_level cache_level,u32 flags) {const gen8_pte_t pte_encode =gen8_pte_encode (0 , cache_level, flags);unsigned int rem =sg_dma_len (iter->sg); -u64 start = vma->node.start; +u64 start = vma_res->start; -GEM_BUG_ON (!i915_vm_is_4lvl (vma->vm)); +GEM_BUG_ON (!i915_vm_is_4lvl (vm)); do { struct i915_page_directory * const pdp = - gen8_pdp_for_page_address(vma->vm, start); + gen8_pdp_for_page_address(vm, start); struct i915_page_directory * const pd = i915_pd_entry(pdp, __gen8_pte_index(start, 2)); gen8_pte_t encode = pte_encode;
@@ -475,7 +476,7 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,gen8_pte_t *vaddr;u16 index; -if (vma->page_sizes.sg &I915_GTT_PAGE_SIZE_2M && +if (vma_res->bi.page_sizes.sg &I915_GTT_PAGE_SIZE_2M &&IS_ALIGNED (iter->dma,I915_GTT_PAGE_SIZE_2M ) && rem >=I915_GTT_PAGE_SIZE_2M && !__gen8_pte_index (start,0 )) {
@@ -492,7 +493,7 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma, page_size =I915_GTT_PAGE_SIZE ;if (!index && - vma->page_sizes.sg &I915_GTT_PAGE_SIZE_64K && + vma_res->bi.page_sizes.sg &I915_GTT_PAGE_SIZE_64K &&IS_ALIGNED (iter->dma,I915_GTT_PAGE_SIZE_64K ) && (IS_ALIGNED (rem,I915_GTT_PAGE_SIZE_64K ) || rem >= (I915_PDES - index) *I915_GTT_PAGE_SIZE ))
@@ -541,9 +542,9 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,*/ if (maybe_64K !=-1 && (index ==I915_PDES || - (i915_vm_has_scratch_64K (vma->vm) && - !iter->sg &&IS_ALIGNED (vma->node.start + - vma->node.size, + (i915_vm_has_scratch_64K (vm) && + !iter->sg &&IS_ALIGNED (vma_res->start + + vma_res->node_size,I915_GTT_PAGE_SIZE_2M )))) { vaddr =px_vaddr (pd); vaddr[maybe_64K] |=GEN8_PDE_IPS_64K ;
@@ -559,10 +560,10 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,* instead - which we detect as missing results during * selftests. */ -if (I915_SELFTEST_ONLY (vma->vm->scrub_64K)) { +if (I915_SELFTEST_ONLY (vm->scrub_64K)) {u16 i; - encode = vma->vm->scratch[0 ]->encode; + encode = vm->scratch[0 ]->encode; vaddr =px_vaddr (i915_pt_entry (pd, maybe_64K));for (i =1 ; i < index; i +=16 )
@@ -572,22 +573,22 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma, } } - vma->page_sizes.gtt |= page_size; + vma_res->page_sizes_gtt |= page_size; }while (iter->sg &&sg_dma_len (iter->sg)); }static void gen8_ppgtt_insert (struct i915_address_space *vm, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 flags) {struct i915_ppgtt *const ppgtt =i915_vm_to_ppgtt (vm); -struct sgt_dma iter =sgt_dma (vma); +struct sgt_dma iter =sgt_dma (vma_res); -if (vma->page_sizes.sg >I915_GTT_PAGE_SIZE ) { -gen8_ppgtt_insert_huge (vma, &iter, cache_level, flags); +if (vma_res->bi.page_sizes.sg >I915_GTT_PAGE_SIZE ) { +gen8_ppgtt_insert_huge (vm, vma_res, &iter, cache_level, flags); }else { -u64 idx = vma->node.start >>GEN8_PTE_SHIFT ; +u64 idx = vma_res->start >>GEN8_PTE_SHIFT ; do { struct i915_page_directory * const pdp =
@@ -597,7 +598,7 @@ static void gen8_ppgtt_insert(struct i915_address_space *vm, cache_level, flags); }while (idx); - vma->page_sizes.gtt =I915_GTT_PAGE_SIZE ; + vma_res->page_sizes_gtt =I915_GTT_PAGE_SIZE ; } }
drivers/gpu/drm/i915/gt/intel_engine_cs.c +2 -2
@@ -1718,8 +1718,8 @@ static void print_request_ring(struct drm_printer *m, struct i915_request *rq)drm_printf (m,"[head %04x, postfix %04x, tail %04x, batch 0x%08x_%08x]:\n" , rq->head, rq->postfix, rq->tail, - vsnap ?upper_32_bits (vsnap->gtt_offset) : ~0u , - vsnap ?lower_32_bits (vsnap->gtt_offset) : ~0u ); + vsnap ?upper_32_bits (vsnap->vma_resource->start) : ~0u , + vsnap ?lower_32_bits (vsnap->vma_resource->start) : ~0u ); size = rq->tail - rq->head;if (rq->tail < rq->head)
drivers/gpu/drm/i915/gt/intel_ggtt.c +37 -33
179 lines not on this page · raw message
drivers/gpu/drm/i915/gt/intel_gtt.h +9 -7
@@ -27,6 +27,7 @@#include "gt/intel_reset.h" #include "i915_selftest.h" +#include "i915_vma_resource.h" #include "i915_vma_types.h" #define I915_GFP_ALLOW_FAIL (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
@@ -200,7 +201,7 @@ struct i915_vma_ops {/* Map an object into an address space with the given cache flags. */ void (*bind_vma)(struct i915_address_space *vm,struct i915_vm_pt_stash *stash, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 flags);/*
@@ -208,7 +209,8 @@ struct i915_vma_ops {* setting the valid PTE entries to a reserved scratch page. */ void (*unbind_vma)(struct i915_address_space *vm, -struct i915_vma *vma); +struct i915_vma_resource *vma_res); + };struct i915_address_space {
@@ -285,7 +287,7 @@ struct i915_address_space {enum i915_cache_level cache_level, u32 flags);void (*insert_entries)(struct i915_address_space *vm, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 flags);void (*cleanup)(struct i915_address_space *vm);
@@ -600,11 +602,11 @@ void gen6_ggtt_invalidate(struct i915_ggtt *ggtt);void ppgtt_bind_vma (struct i915_address_space *vm,struct i915_vm_pt_stash *stash, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 flags);void ppgtt_unbind_vma (struct i915_address_space *vm, -struct i915_vma *vma); +struct i915_vma_resource *vma_res);void gtt_write_workarounds (struct intel_gt *gt);
@@ -627,8 +629,8 @@ __vm_create_scratch_for_read_pinned(struct i915_address_space *vm, unsigned longstatic inline struct sgt_dma {struct scatterlist *sg;dma_addr_t dma, max; -}sgt_dma (struct i915_vma *vma) { -struct scatterlist *sg = vma->pages->sgl; +}sgt_dma (struct i915_vma_resource *vma_res) { +struct scatterlist *sg = vma_res->bi.pages->sgl;dma_addr_t addr =sg_dma_address (sg);return (struct sgt_dma ){ sg, addr, addr +sg_dma_len (sg) };
drivers/gpu/drm/i915/gt/intel_ppgtt.c +12 -10
@@ -179,32 +179,34 @@ struct i915_ppgtt *i915_ppgtt_create(struct intel_gt *gt,void ppgtt_bind_vma (struct i915_address_space *vm,struct i915_vm_pt_stash *stash, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 flags) {u32 pte_flags; -if (!test_bit (I915_VMA_ALLOC_BIT ,__i915_vma_flags (vma))) { - vm->allocate_va_range (vm, stash, vma->node.start, vma->size); -set_bit (I915_VMA_ALLOC_BIT ,__i915_vma_flags (vma)); +if (!vma_res->allocated) { + vm->allocate_va_range (vm, stash, vma_res->start, + vma_res->vma_size); + vma_res->allocated = true; }/* Applicable to VLV, and gen8+ */ pte_flags =0 ; -if (i915_gem_object_is_readonly (vma->obj)) +if (vma_res->bi.readonly) pte_flags |=PTE_READ_ONLY ; -if (i915_gem_object_is_lmem (vma->obj)) +if (vma_res->bi.lmem) pte_flags |=PTE_LM ; - vm->insert_entries (vm, vma, cache_level, pte_flags); + vm->insert_entries (vm, vma_res, cache_level, pte_flags);wmb (); } -void ppgtt_unbind_vma (struct i915_address_space *vm,struct i915_vma *vma) +void ppgtt_unbind_vma (struct i915_address_space *vm, +struct i915_vma_resource *vma_res) { -if (test_and_clear_bit (I915_VMA_ALLOC_BIT ,__i915_vma_flags (vma))) - vm->clear_range (vm, vma->node.start, vma->size); +if (vma_res->allocated) + vm->clear_range (vm, vma_res->start, vma_res->vma_size); }static unsigned long pd_count (u64 size,int shift)
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +6 -7
@@ -448,20 +448,19 @@ static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw) {struct drm_i915_gem_object *obj = uc_fw->obj;struct i915_ggtt *ggtt =__uc_fw_to_gt (uc_fw)->ggtt; -struct i915_vma *dummy = &uc_fw->dummy; +struct i915_vma_resource *dummy = &uc_fw->dummy;u32 pte_flags =0 ; - dummy->node.start =uc_fw_ggtt_offset (uc_fw); - dummy->node.size = obj->base.size; - dummy->pages = obj->mm.pages; - dummy->vm = &ggtt->vm; + dummy->start =uc_fw_ggtt_offset (uc_fw); + dummy->node_size = obj->base.size; + dummy->bi.pages = obj->mm.pages;GEM_BUG_ON (!i915_gem_object_has_pinned_pages (obj)); -GEM_BUG_ON (dummy->node.size > ggtt->uc_fw.size); +GEM_BUG_ON (dummy->node_size > ggtt->uc_fw.size);/* uc_fw->obj cache domains were not controlled across suspend */ if (i915_gem_object_has_struct_page (obj)) -drm_clflush_sg (dummy->pages); +drm_clflush_sg (dummy->bi.pages);if (i915_gem_object_is_lmem (obj)) pte_flags |=PTE_LM ;
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h +1 -1
@@ -85,7 +85,7 @@ struct intel_uc_fw {* threaded as it done during driver load (inherently single threaded) * or during a GT reset (mutex guarantees single threaded). */ -struct i915_vma dummy; +struct i915_vma_resource dummy;struct i915_vma *rsa_data;/*
drivers/gpu/drm/i915/i915_debugfs.c +2 -1
@@ -170,7 +170,8 @@ i915_debugfs_describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)seq_printf (m," (%s offset: %08llx, size: %08llx, pages: %s" ,stringify_vma_type (vma), vma->node.start, vma->node.size, -stringify_page_sizes (vma->page_sizes.gtt,NULL ,0 )); +stringify_page_sizes (vma->resource->page_sizes_gtt, +NULL ,0 ));if (i915_vma_is_ggtt (vma) ||i915_vma_is_dpt (vma)) {switch (vma->ggtt_view.type) {case I915_GGTT_VIEW_NORMAL :
drivers/gpu/drm/i915/i915_gpu_error.c +3 -3
@@ -1040,9 +1040,9 @@ i915_vma_coredump_create(const struct intel_gt *gt,strcpy (dst->name, vsnap->name); dst->next =NULL ; - dst->gtt_offset = vsnap->gtt_offset; - dst->gtt_size = vsnap->gtt_size; - dst->gtt_page_sizes = vsnap->page_sizes; + dst->gtt_offset = vsnap->vma_resource->start; + dst->gtt_size = vsnap->vma_resource->node_size; + dst->gtt_page_sizes = vsnap->vma_resource->page_sizes_gtt; dst->unused =0 ; ret = -EINVAL ;
drivers/gpu/drm/i915/i915_vma.c +20 -4
@@ -299,7 +299,7 @@ static void __vma_bind(struct dma_fence_work *work)struct i915_vma *vma = vw->vma; vma->ops->bind_vma (vw->vm, &vw->stash, - vma, vw->cache_level, vw->flags); + vma->resource, vw->cache_level, vw->flags); }static void __vma_release (struct dma_fence_work *work)
@@ -376,6 +376,21 @@ static int i915_vma_verify_bind_complete(struct i915_vma *vma)#define i915_vma_verify_bind_complete (_vma) 0#endif +I915_SELFTEST_EXPORT void +i915_vma_resource_init_from_vma (struct i915_vma_resource *vma_res, +struct i915_vma *vma) +{ +struct drm_i915_gem_object *obj = vma->obj; + +i915_vma_resource_init (vma_res, vma->pages, &vma->page_sizes, +i915_gem_object_is_readonly (obj), +i915_gem_object_is_lmem (obj), + vma->private, + vma->node.start, + vma->node.size, + vma->size); +} +/** * i915_vma_bind - Sets up PTEs for an VMA in it's corresponding address space. * @vma: VMA to map
@@ -433,7 +448,7 @@ int i915_vma_bind(struct i915_vma *vma,GEM_WARN_ON (!vma_flags);kfree (vma_res); }else { -i915_vma_resource_init (vma_res); +i915_vma_resource_init_from_vma (vma_res, vma); vma->resource = vma_res; }trace_i915_vma_bind (vma, bind_flags);
@@ -473,7 +488,8 @@ int i915_vma_bind(struct i915_vma *vma,if (ret)return ret; } - vma->ops->bind_vma (vma->vm,NULL , vma, cache_level, bind_flags); + vma->ops->bind_vma (vma->vm,NULL , vma->resource, cache_level, + bind_flags); }atomic_or (bind_flags, &vma->flags);
@@ -1779,7 +1795,7 @@ void __i915_vma_evict(struct i915_vma *vma)if (likely (atomic_read (&vma->vm->open))) {trace_i915_vma_unbind (vma); - vma->ops->unbind_vma (vma->vm, vma); + vma->ops->unbind_vma (vma->vm, vma->resource); }atomic_and (~(I915_VMA_BIND_MASK |I915_VMA_ERROR |I915_VMA_GGTT_WRITE ), &vma->flags);
drivers/gpu/drm/i915/i915_vma.h +5 -6
@@ -339,12 +339,6 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma);*/ void i915_vma_unpin_iomap (struct i915_vma *vma); -static inline struct page *i915_vma_first_page (struct i915_vma *vma) -{ -GEM_BUG_ON (!vma->pages); -return sg_page (vma->pages->sgl); -} -/** * i915_vma_pin_fence - pin fencing state * @vma: vma to pin fencing for
@@ -445,6 +439,11 @@ i915_vma_get_current_resource(struct i915_vma *vma)return i915_vma_resource_get (vma->resource); } +#if IS_ENABLED (CONFIG_DRM_I915_SELFTEST ) +void i915_vma_resource_init_from_vma (struct i915_vma_resource *vma_res, +struct i915_vma *vma); +#endif +void i915_vma_module_exit (void );int i915_vma_module_init (void );
drivers/gpu/drm/i915/i915_vma_resource.c +3 -6
@@ -23,15 +23,12 @@ static struct dma_fence_ops unbind_fence_ops = { };/** -* i915_vma_resource_init - Initialize a vma resource. +* __i915_vma_resource_init - Initialize a vma resource. * @vma_res: The vma resource to initialize * -* Initializes a vma resource allocated using i915_vma_resource_alloc(). -* The reason for having separate allocate and initialize function is that -* initialization may need to be performed from under a lock where -* allocation is not allowed. +* Initializes the private members of a vma resource. */ -void i915_vma_resource_init (struct i915_vma_resource *vma_res) +void __i915_vma_resource_init (struct i915_vma_resource *vma_res) {spin_lock_init (&vma_res->lock); dma_fence_init(&vma_res->unbind_fence, &unbind_fence_ops,
drivers/gpu/drm/i915/i915_vma_resource.h +96 -3
128 lines not on this page · raw message
drivers/gpu/drm/i915/i915_vma_snapshot.c +0 -4
@@ -24,11 +24,7 @@ void i915_vma_snapshot_init(struct i915_vma_snapshot *vsnap,assert_object_held (vma->obj); vsnap->name = name; - vsnap->size = vma->size; vsnap->obj_size = vma->obj->base.size; - vsnap->gtt_offset = vma->node.start; - vsnap->gtt_size = vma->node.size; - vsnap->page_sizes = vma->page_sizes.gtt; vsnap->pages = vma->pages; vsnap->pages_rsgt =NULL ; vsnap->mr =NULL ;
drivers/gpu/drm/i915/i915_vma_snapshot.h +0 -8
@@ -23,31 +23,23 @@ struct sg_table;/** * struct i915_vma_snapshot - Snapshot of vma metadata. -* @size: The vma size in bytes. * @obj_size: The size of the underlying object in bytes. -* @gtt_offset: The gtt offset the vma is bound to. -* @gtt_size: The size in bytes allocated for the vma in the GTT. * @pages: The struct sg_table pointing to the pages bound. * @pages_rsgt: The refcounted sg_table holding the reference for @pages if any. * @mr: The memory region pointed for the pages bound. * @kref: Reference for this structure. * @vma_resource: Pointer to the vma resource representing the vma binding. -* @page_sizes: The vma GTT page sizes information. * @onstack: Whether the structure shouldn't be freed on final put. * @present: Whether the structure is present and initialized. */ struct i915_vma_snapshot {const char *name; -size_t size;size_t obj_size; -size_t gtt_offset; -size_t gtt_size;struct sg_table *pages;struct i915_refct_sgt *pages_rsgt;struct intel_memory_region *mr;struct kref kref;struct i915_vma_resource *vma_resource; -u32 page_sizes;bool onstack:1 ;bool present:1 ; };
drivers/gpu/drm/i915/i915_vma_types.h +6 -8
@@ -249,22 +249,20 @@ struct i915_vma {#define I915_VMA_BIND_MASK (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND) -#define I915_VMA_ALLOC_BIT 12 - -#define I915_VMA_ERROR_BIT 13 +#define I915_VMA_ERROR_BIT 12#define I915_VMA_ERROR ((int)BIT(I915_VMA_ERROR_BIT)) -#define I915_VMA_GGTT_BIT 14 -#define I915_VMA_CAN_FENCE_BIT 15 -#define I915_VMA_USERFAULT_BIT 16 -#define I915_VMA_GGTT_WRITE_BIT 17 +#define I915_VMA_GGTT_BIT 13 +#define I915_VMA_CAN_FENCE_BIT 14 +#define I915_VMA_USERFAULT_BIT 15 +#define I915_VMA_GGTT_WRITE_BIT 16#define I915_VMA_GGTT ((int)BIT(I915_VMA_GGTT_BIT))#define I915_VMA_CAN_FENCE ((int)BIT(I915_VMA_CAN_FENCE_BIT))#define I915_VMA_USERFAULT ((int)BIT(I915_VMA_USERFAULT_BIT))#define I915_VMA_GGTT_WRITE ((int)BIT(I915_VMA_GGTT_WRITE_BIT)) -#define I915_VMA_SCANOUT_BIT 18 +#define I915_VMA_SCANOUT_BIT 17#define I915_VMA_SCANOUT ((int)BIT(I915_VMA_SCANOUT_BIT))struct i915_active active;
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +44 -20
177 lines not on this page · raw message
drivers/gpu/drm/i915/selftests/mock_gtt.c +6 -6
@@ -33,23 +33,23 @@ static void mock_insert_page(struct i915_address_space *vm, }static void mock_insert_entries (struct i915_address_space *vm, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level level,u32 flags) { }static void mock_bind_ppgtt (struct i915_address_space *vm,struct i915_vm_pt_stash *stash, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 flags) {GEM_BUG_ON (flags &I915_VMA_GLOBAL_BIND ); -set_bit (I915_VMA_LOCAL_BIND_BIT ,__i915_vma_flags (vma)); + vma_res->bound_flags |= flags; }static void mock_unbind_ppgtt (struct i915_address_space *vm, -struct i915_vma *vma) +struct i915_vma_resource *vma_res) { }
@@ -93,14 +93,14 @@ struct i915_ppgtt *mock_ppgtt(struct drm_i915_private *i915, const char *name)static void mock_bind_ggtt (struct i915_address_space *vm,struct i915_vm_pt_stash *stash, -struct i915_vma *vma, +struct i915_vma_resource *vma_res,enum i915_cache_level cache_level,u32 flags) { }static void mock_unbind_ggtt (struct i915_address_space *vm, -struct i915_vma *vma) +struct i915_vma_resource *vma_res) { }
Signature · 1 line
2.31.1
PATCH v7 3/6 drm/i915: Don't pin the object pages during pending vma binds
In reply to Thomas HellströmA pin-count is already held by vma->pages so taking an additional pin during async binds is not necessary.
When we introduce async unbinding we have other means of keeping the object pages alive.
--- drivers/gpu/drm/i915/i915_vma.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
drivers/gpu/drm/i915/i915_vma.c +1 -4
@@ -306,10 +306,8 @@ static void __vma_release(struct dma_fence_work *work) {struct i915_vma_work *vw =container_of (work,typeof (*vw), base); -if (vw->pinned) { -__i915_gem_object_unpin_pages (vw->pinned); +if (vw->pinned)i915_gem_object_put (vw->pinned); - }i915_vm_free_pt_stash (vw->vm, &vw->stash);i915_vm_put (vw->vm);
@@ -478,7 +476,6 @@ int i915_vma_bind(struct i915_vma *vma, work->base.dma.error =0 ;/* enable the queue_work() */ -__i915_gem_object_pin_pages (vma->obj); work->pinned =i915_gem_object_get (vma->obj); }else {if (vma->obj) {
Signature · 1 line
2.31.1
PATCH v7 4/6 drm/i915: Use vma resources for async unbinding
In reply to Thomas HellströmImplement async (non-blocking) unbinding by not syncing the vma before calling unbind on the vma_resource.
Add the resulting unbind fence to the object's dma_resv from where it is picked up by the ttm migration code.
Ideally these unbind fences should be coalesced with the migration blit fence to avoid stalling the migration blit waiting for unbind, as they can certainly go on in parallel, but since we don't yet have a reasonable data structure to use to coalesce fences and attach the resulting fence to a timeline, we defer that for now.
Note that with async unbinding, even while the unbind waits for the preceding bind to complete before unbinding, the vma itself might have been destroyed in the process, clearing the vma pages. Therefore we can only allow async unbinding if we have a refcounted sg-list and keep a refcount on that for the vma resource pages to stay intact until binding occurs. If this condition is not met, a request for an async unbind is diverted to a sync unbind.
v2:
- Use a separate kmem_cache for vma resources for now to isolate their memory allocation and aid debugging.
- Move the check for vm closed to the actual unbinding thread. Regardless of whether the vm is closed, we need the unbind fence to properly wait for capture.
- Clear vma_res::vm on unbind and update its documentation.
v4:
- Take cache coloring into account when searching for vma resources pending unbind. (Matthew Auld)
v5:
- Fix timeout and error check in i915_vma_resource_bind_dep_await().
- Avoid taking a reference on the object for async binding if async unbind capable.
- Fix braces around a single-line if statement.
v6:
- Fix up the cache coloring adjustment. (Kernel test robot <[email protected]>)
- Don't allow async unbinding if the vma_res pages are not the same as the object pages. (Matthew Auld)
v7:
- s/unsigned long/u64/ in a number of places (Matthew Auld)
--- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 11 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +- drivers/gpu/drm/i915/gt/intel_gtt.c | 4 + drivers/gpu/drm/i915/gt/intel_gtt.h | 3 + drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 12 +- drivers/gpu/drm/i915/i915_module.c | 3 + drivers/gpu/drm/i915/i915_vma.c | 205 +++++++++-- drivers/gpu/drm/i915/i915_vma.h | 3 +- drivers/gpu/drm/i915/i915_vma_resource.c | 354 +++++++++++++++++-- drivers/gpu/drm/i915/i915_vma_resource.h | 48 +++ 11 files changed, 579 insertions(+), 67 deletions(-)
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +10 -1
@@ -142,7 +142,16 @@ int i915_ttm_move_notify(struct ttm_buffer_object *bo)struct drm_i915_gem_object *obj =i915_ttm_to_gem (bo);int ret; - ret =i915_gem_object_unbind (obj,I915_GEM_OBJECT_UNBIND_ACTIVE ); +/* +* Note: The async unbinding here will actually transform the +* blocking wait for unbind into a wait before finally submitting +* evict / migration blit and thus stall the migration timeline +* which may not be good for overall throughput. We should make +* sure we await the unbind fences *after* the migration blit +* instead of *before* as we currently do. +*/ + ret =i915_gem_object_unbind (obj,I915_GEM_OBJECT_UNBIND_ACTIVE | +I915_GEM_OBJECT_UNBIND_ASYNC );if (ret)return ret;
drivers/gpu/drm/i915/gt/intel_ggtt.c +1 -1
@@ -142,7 +142,7 @@ void i915_ggtt_suspend_vm(struct i915_address_space *vm)continue ;if (!i915_vma_is_bound (vma,I915_VMA_GLOBAL_BIND )) { -__i915_vma_evict (vma); +__i915_vma_evict (vma, false);drm_mm_remove_node (&vma->node); } }
drivers/gpu/drm/i915/gt/intel_gtt.c +4 -0
@@ -161,6 +161,9 @@ static void __i915_vm_release(struct work_struct *work)struct i915_address_space *vm = container_of(work, struct i915_address_space, release_work); +/* Synchronize async unbinds. */ +i915_vma_resource_bind_dep_sync_all (vm); + vm->cleanup (vm);i915_address_space_fini (vm);
@@ -189,6 +192,7 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass)if (!kref_read (&vm->resv_ref))kref_init (&vm->resv_ref); + vm->pending_unbind =RB_ROOT_CACHED ;INIT_WORK (&vm->release_work, __i915_vm_release);atomic_set (&vm->open,1 );
drivers/gpu/drm/i915/gt/intel_gtt.h +3 -0
@@ -265,6 +265,9 @@ struct i915_address_space {/* Flags used when creating page-table objects for this vm */ unsigned long lmem_pt_obj_flags; +/* Interval tree for pending unbind vma resources */ +struct rb_root_cached pending_unbind; +struct drm_i915_gem_object * (*alloc_pt_dma)(struct i915_address_space *vm,int sz); struct drm_i915_gem_object *
drivers/gpu/drm/i915/i915_drv.h +1 -0
@@ -1661,6 +1661,7 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,#define I915_GEM_OBJECT_UNBIND_BARRIER BIT(1)#define I915_GEM_OBJECT_UNBIND_TEST BIT(2)#define I915_GEM_OBJECT_UNBIND_VM_TRYLOCK BIT(3) +#define I915_GEM_OBJECT_UNBIND_ASYNC BIT(4)void i915_gem_runtime_suspend (struct drm_i915_private *dev_priv);
drivers/gpu/drm/i915/i915_gem.c +9 -3
@@ -157,10 +157,16 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,spin_unlock (&obj->vma.lock);if (vma) { +bool vm_trylock = !!(flags &I915_GEM_OBJECT_UNBIND_VM_TRYLOCK ); ret = -EBUSY ; -if (flags &I915_GEM_OBJECT_UNBIND_ACTIVE || - !i915_vma_is_active (vma)) { -if (flags &I915_GEM_OBJECT_UNBIND_VM_TRYLOCK ) { +if (flags &I915_GEM_OBJECT_UNBIND_ASYNC ) { +assert_object_held (vma->obj); + ret =i915_vma_unbind_async (vma, vm_trylock); + } + +if (ret == -EBUSY && (flags &I915_GEM_OBJECT_UNBIND_ACTIVE || + !i915_vma_is_active (vma))) { +if (vm_trylock) {if (mutex_trylock (&vma->vm->mutex)) { ret =__i915_vma_unbind (vma);mutex_unlock (&vma->vm->mutex);
drivers/gpu/drm/i915/i915_module.c +3 -0
@@ -17,6 +17,7 @@#include "i915_scheduler.h" #include "i915_selftest.h" #include "i915_vma.h" +#include "i915_vma_resource.h" static int i915_check_nomodeset (void ) {
@@ -64,6 +65,8 @@ static const struct { .exit = i915_scheduler_module_exit }, { .init = i915_vma_module_init, .exit = i915_vma_module_exit }, + { .init = i915_vma_resource_module_init, + .exit = i915_vma_resource_module_exit }, { .init = i915_mock_selftests }, { .init = i915_pmu_init, .exit = i915_pmu_exit },
drivers/gpu/drm/i915/i915_vma.c +175 -30
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drivers/gpu/drm/i915/i915_vma.h +2 -1
@@ -213,9 +213,10 @@ bool i915_vma_misplaced(const struct i915_vma *vma, u64 size, u64 alignment, u64 flags);void __i915_vma_set_map_and_fenceable (struct i915_vma *vma);void i915_vma_revoke_mmap (struct i915_vma *vma); -void __i915_vma_evict (struct i915_vma *vma); +struct dma_fence *__i915_vma_evict (struct i915_vma *vma,bool async);int __i915_vma_unbind (struct i915_vma *vma);int __must_check i915_vma_unbind (struct i915_vma *vma); +int __must_check i915_vma_unbind_async (struct i915_vma *vma,bool trylock_vm);void i915_vma_unlink_ctx (struct i915_vma *vma);void i915_vma_close (struct i915_vma *vma);void i915_vma_reopen (struct i915_vma *vma);
drivers/gpu/drm/i915/i915_vma_resource.c +323 -31
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drivers/gpu/drm/i915/i915_vma_resource.h +48 -0
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Signature · 1 line
2.31.1
PATCH v7 5/6 drm/i915: Asynchronous migration selftest
In reply to Thomas HellströmAdd a selftest to exercise asynchronous migration and -unbining. Extend the gem_migrate selftest to perform the migrations while depending on a spinner and a bound vma set up on the migrated buffer object.
--- drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 ++ drivers/gpu/drm/i915/gem/i915_gem_object.h | 3 + .../drm/i915/gem/selftests/i915_gem_migrate.c | 192 ++++++++++++++++-- 3 files changed, 192 insertions(+), 15 deletions(-)
drivers/gpu/drm/i915/gem/i915_gem_object.c +12 -0
@@ -756,6 +756,18 @@ i915_gem_object_get_moving_fence(struct drm_i915_gem_object *obj)return dma_fence_get (i915_gem_to_ttm (obj)->moving); } +void i915_gem_object_set_moving_fence (struct drm_i915_gem_object *obj, +struct dma_fence *fence) +{ +struct dma_fence **moving = &i915_gem_to_ttm (obj)->moving; + +if (*moving == fence) +return ; + +dma_fence_put (*moving); + *moving =dma_fence_get (fence); +} +/** * i915_gem_object_wait_moving_fence - Wait for the object's moving fence if any * @obj: The object whose moving fence to wait for.
drivers/gpu/drm/i915/gem/i915_gem_object.h +3 -0
@@ -523,6 +523,9 @@ i915_gem_object_finish_access(struct drm_i915_gem_object *obj)struct dma_fence *i915_gem_object_get_moving_fence (struct drm_i915_gem_object *obj); +void i915_gem_object_set_moving_fence (struct drm_i915_gem_object *obj, +struct dma_fence *fence); +int i915_gem_object_wait_moving_fence (struct drm_i915_gem_object *obj,bool intr);
drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c +177 -15
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2.31.1
PATCH v7 6/6 drm/i915: Use struct vma_resource instead of struct vma_snapshot
In reply to Thomas HellströmThere is always a struct vma_resource guaranteed to be alive when we access a corresponding struct vma_snapshot.
So ditch the latter and instead of allocating vma_snapshots, reference the already existning vma_resource.
This requires a couple of extra members in struct vma_resource but that's a small price to pay for the simplification.
v2:
- Fix a missing include and declaration (kernel test robot <[email protected]>)
--- drivers/gpu/drm/i915/Makefile | 1 - .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 15 +-- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 9 +- drivers/gpu/drm/i915/i915_gpu_error.c | 87 ++++++------ drivers/gpu/drm/i915/i915_request.c | 12 +- drivers/gpu/drm/i915/i915_request.h | 6 +- drivers/gpu/drm/i915/i915_vma.c | 16 +-- drivers/gpu/drm/i915/i915_vma_resource.c | 4 + drivers/gpu/drm/i915/i915_vma_resource.h | 28 +++- drivers/gpu/drm/i915/i915_vma_snapshot.c | 125 ------------------ drivers/gpu/drm/i915/i915_vma_snapshot.h | 101 -------------- 11 files changed, 90 insertions(+), 314 deletions(-) delete mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.c delete mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.h
drivers/gpu/drm/i915/Makefile +0 -1
@@ -175,7 +175,6 @@ i915-y += \ i915_ttm_buddy_manager.o \ i915_vma.o \ i915_vma_resource.o \ - i915_vma_snapshot.o \ intel_wopcm.o # general-purpose microcontroller (GuC) support
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +3 -12
@@ -31,7 +31,6 @@#include "i915_gem_ioctls.h" #include "i915_trace.h" #include "i915_user_extensions.h" -#include "i915_vma_snapshot.h" struct eb_vma {struct i915_vma *vma;
@@ -1954,7 +1953,6 @@ static void eb_capture_stage(struct i915_execbuffer *eb) {const unsigned int count = eb->buffer_count;unsigned int i = count, j; -struct i915_vma_snapshot *vsnap;while (i--) {struct eb_vma *ev = &eb->vma[i];
@@ -1964,11 +1962,6 @@ static void eb_capture_stage(struct i915_execbuffer *eb)if (!(flags &EXEC_OBJECT_CAPTURE ))continue ; - vsnap =i915_vma_snapshot_alloc (GFP_KERNEL ); -if (!vsnap) -continue ; - -i915_vma_snapshot_init (vsnap, vma,"user" );for_each_batch_create_order (eb, j) {struct i915_capture_list *capture;
@@ -1977,10 +1970,9 @@ static void eb_capture_stage(struct i915_execbuffer *eb)continue ; capture->next = eb->capture_lists[j]; - capture->vma_snapshot =i915_vma_snapshot_get (vsnap); + capture->vma_res =i915_vma_resource_get (vma->resource); eb->capture_lists[j] = capture; } -i915_vma_snapshot_put (vsnap); } }
@@ -3283,9 +3275,8 @@ eb_requests_create(struct i915_execbuffer *eb, struct dma_fence *in_fence,* _onstack interface. */ if (eb->batches[i]->vma) -i915_vma_snapshot_init_onstack (&eb->requests[i]->batch_snapshot, - eb->batches[i]->vma, -"batch" ); + eb->requests[i]->batch_res = +i915_vma_resource_get (eb->batches[i]->vma->resource);if (eb->batch_pool) {GEM_BUG_ON (intel_context_is_parallel (eb->context)); intel_gt_buffer_pool_mark_active(eb->batch_pool,
drivers/gpu/drm/i915/gt/intel_engine_cs.c +3 -6
@@ -1708,18 +1708,15 @@ static void intel_engine_print_registers(struct intel_engine_cs *engine,static void print_request_ring (struct drm_printer *m,struct i915_request *rq) { -struct i915_vma_snapshot *vsnap = &rq->batch_snapshot; +struct i915_vma_resource *vma_res = rq->batch_res;void *ring;int size; -if (!i915_vma_snapshot_present (vsnap)) - vsnap =NULL ; -drm_printf (m,"[head %04x, postfix %04x, tail %04x, batch 0x%08x_%08x]:\n" , rq->head, rq->postfix, rq->tail, - vsnap ?upper_32_bits (vsnap->vma_resource->start) : ~0u , - vsnap ?lower_32_bits (vsnap->vma_resource->start) : ~0u ); + vma_res ?upper_32_bits (vma_res->start) : ~0u , + vma_res ?lower_32_bits (vma_res->start) : ~0u ); size = rq->tail - rq->head;if (rq->tail < rq->head)
drivers/gpu/drm/i915/i915_gpu_error.c +40 -47
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drivers/gpu/drm/i915/i915_request.c +7 -5
@@ -116,8 +116,10 @@ static void i915_fence_release(struct dma_fence *fence) rq->guc_prio != GUC_PRIO_FINI);i915_request_free_capture_list (fetch_and_zero (&rq->capture_list)); -if (i915_vma_snapshot_present (&rq->batch_snapshot)) -i915_vma_snapshot_put_onstack (&rq->batch_snapshot); +if (rq->batch_res) { +i915_vma_resource_put (rq->batch_res); + rq->batch_res =NULL ; + }/* * The request is put onto a RCU freelist (i.e. the address
@@ -308,7 +310,7 @@ void i915_request_free_capture_list(struct i915_capture_list *capture)while (capture) {struct i915_capture_list *next = capture->next; -i915_vma_snapshot_put (capture->vma_snapshot); +i915_vma_resource_put (capture->vma_res);kfree (capture); capture = next; }
@@ -854,7 +856,7 @@ static void __i915_request_ctor(void *arg)i915_sw_fence_init (&rq->semaphore, semaphore_notify);clear_capture_list (rq); - rq->batch_snapshot.present = false; + rq->batch_res =NULL ;init_llist_head (&rq->execute_cb); }
@@ -960,7 +962,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp)__rq_init_watchdog (rq);assert_capture_list_is_null (rq);GEM_BUG_ON (!llist_empty (&rq->execute_cb)); -GEM_BUG_ON (i915_vma_snapshot_present (&rq->batch_snapshot)); +GEM_BUG_ON (rq->batch_res);/* * Reserve space in the ring buffer for all the commands required to
drivers/gpu/drm/i915/i915_request.h +3 -3
@@ -40,7 +40,7 @@#include "i915_scheduler.h" #include "i915_selftest.h" #include "i915_sw_fence.h" -#include "i915_vma_snapshot.h" +#include "i915_vma_resource.h" #include <uapi/drm/i915_drm.h>
@@ -52,7 +52,7 @@ struct i915_request;#if IS_ENABLED (CONFIG_DRM_I915_CAPTURE_ERROR )struct i915_capture_list { -struct i915_vma_snapshot *vma_snapshot; +struct i915_vma_resource *vma_res;struct i915_capture_list *next; };
@@ -300,7 +300,7 @@ struct i915_request {/** Batch buffer pointer for selftest internal use. */ I915_SELFTEST_DECLARE(struct i915_vma *batch); -struct i915_vma_snapshot batch_snapshot; +struct i915_vma_resource *batch_res;#if IS_ENABLED (CONFIG_DRM_I915_CAPTURE_ERROR )/**
drivers/gpu/drm/i915/i915_vma.c +4 -12
@@ -289,7 +289,6 @@ struct i915_vma_work {struct i915_vma_resource *vma_res;struct drm_i915_gem_object *pinned;struct i915_sw_dma_fence_cb cb; -struct i915_refct_sgt *rsgt;enum i915_cache_level cache_level;unsigned int flags; };
@@ -315,8 +314,6 @@ static void __vma_release(struct dma_fence_work *work)i915_vm_put (vw->vm);if (vw->vma_res)i915_vma_resource_put (vw->vma_res); -if (vw->rsgt) -i915_refct_sgt_put (vw->rsgt); }static const struct dma_fence_work_ops bind_ops = {
@@ -387,8 +384,8 @@ i915_vma_resource_init_from_vma(struct i915_vma_resource *vma_res,struct drm_i915_gem_object *obj = vma->obj;i915_vma_resource_init (vma_res, vma->vm, vma->pages, &vma->page_sizes, -i915_gem_object_is_readonly (obj), -i915_gem_object_is_lmem (obj), + obj->mm.rsgt,i915_gem_object_is_readonly (obj), +i915_gem_object_is_lmem (obj), obj->mm.region, vma->ops, vma->private, vma->node.start, vma->node.size, vma->size); }
@@ -479,8 +476,6 @@ int i915_vma_bind(struct i915_vma *vma, work->vma_res =i915_vma_resource_get (vma->resource); work->cache_level = cache_level; work->flags = bind_flags; -if (vma->obj->mm.rsgt) - work->rsgt =i915_refct_sgt_get (vma->obj->mm.rsgt);/* * Note we only want to chain up to the migration fence on
@@ -506,7 +501,7 @@ int i915_vma_bind(struct i915_vma *vma,* on the object to avoid waiting for the async bind to * complete in the object destruction path. */ -if (!work->rsgt) +if (!work->vma_res->bi.pages_rsgt) work->pinned =i915_gem_object_get (vma->obj); }else {if (vma->obj) {
@@ -1827,7 +1822,7 @@ struct dma_fence *__i915_vma_evict(struct i915_vma *vma, bool async)GEM_BUG_ON (i915_vma_has_userfault (vma));/* Object backend must be async capable. */ -GEM_WARN_ON (async && !vma->obj->mm.rsgt); +GEM_WARN_ON (async && !vma->resource->bi.pages_rsgt);/* If vm is not open, unbind is a nop. */ vma_res->needs_wakeref = i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND) &&
@@ -1840,9 +1835,6 @@ struct dma_fence *__i915_vma_evict(struct i915_vma *vma, bool async)atomic_and (~(I915_VMA_BIND_MASK |I915_VMA_ERROR |I915_VMA_GGTT_WRITE ), &vma->flags); -/* Object backend must be async capable. */ -GEM_WARN_ON (async && !vma->obj->mm.rsgt); -i915_vma_detach (vma);if (!async && unbind_fence) {
drivers/gpu/drm/i915/i915_vma_resource.c +4 -0
@@ -9,6 +9,7 @@#include "i915_sw_fence.h" #include "i915_vma_resource.h" #include "i915_drv.h" +#include "intel_memory_region.h" #include "gt/intel_gtt.h"
@@ -117,6 +118,9 @@ static void __i915_vma_resource_unhold(struct i915_vma_resource *vma_res)vma_res_itree_remove (vma_res, &vm->pending_unbind);mutex_unlock (&vm->mutex); } + +if (vma_res->bi.pages_rsgt) +i915_refct_sgt_put (vma_res->bi.pages_rsgt); }/**
drivers/gpu/drm/i915/i915_vma_resource.h +26 -2
@@ -10,9 +10,12 @@#include <linux/refcount.h> #include "i915_gem.h" +#include "i915_scatterlist.h" #include "i915_sw_fence.h" #include "intel_runtime_pm.h" +struct intel_memory_region ; +struct i915_page_sizes {/** * The sg mask of the pages sg_table. i.e the mask of
@@ -46,6 +49,7 @@ struct i915_page_sizes {* @__subtree_last: Interval tree private member. * @vm: non-refcounted pointer to the vm. This is for internal use only and * this member is cleared after vm_resource unbind. +* @mr: The memory region of the object pointed to by the vma. * @ops: Pointer to the backend i915_vma_ops. * @private: Bind backend private info. * @start: Offset into the address space of bind range start.
@@ -54,8 +58,10 @@ struct i915_page_sizes {* @page_sizes_gtt: Resulting page sizes from the bind operation. * @bound_flags: Flags indicating binding status. * @allocated: Backend private data. TODO: Should move into @private. -* @immediate_unbind: Unbind can be done immediately and don't need to be -* deferred to a work item awaiting unsignaled fences. +* @immediate_unbind: Unbind can be done immediately and doesn't need to be +* deferred to a work item awaiting unsignaled fences. This is a hack. +* (dma_fence_work uses a fence flag for this, but this seems slightly +* cleaner). * * The lifetime of a struct i915_vma_resource is from a binding request to * the actual possible asynchronous unbind has completed.
@@ -80,16 +86,22 @@ struct i915_vma_resource {* and flags * @pages: The pages sg-table. * @page_sizes: Page sizes of the pages. +* @pages_rsgt: Refcounted sg-table when delayed object destruction +* is supported. May be NULL. * @readonly: Whether the vma should be bound read-only. * @lmem: Whether the vma points to lmem. */ struct i915_vma_bindinfo {struct sg_table *pages;struct i915_page_sizes page_sizes; +struct i915_refct_sgt *pages_rsgt;bool readonly:1 ;bool lmem:1 ; } bi; +#if IS_ENABLED (CONFIG_DRM_I915_CAPTURE_ERROR ) +struct intel_memory_region *mr; +#endif const struct i915_vma_ops *ops;void *private;u64 start;
@@ -145,8 +157,11 @@ static inline void i915_vma_resource_put(struct i915_vma_resource *vma_res)* @vm: Pointer to the vm. * @pages: The pages sg-table. * @page_sizes: Page sizes of the pages. +* @pages_rsgt: Pointer to a struct i915_refct_sgt of an object with +* delayed destruction. * @readonly: Whether the vma should be bound read-only. * @lmem: Whether the vma points to lmem. +* @mr: The memory region of the object the vma points to. * @ops: The backend ops. * @private: Bind backend private info. * @start: Offset into the address space of bind range start.
@@ -162,8 +177,10 @@ static inline void i915_vma_resource_init(struct i915_vma_resource *vma_res,struct i915_address_space *vm, struct sg_table *pages, const struct i915_page_sizes *page_sizes, + struct i915_refct_sgt *pages_rsgt, bool readonly, bool lmem, + struct intel_memory_region *mr, const struct i915_vma_ops *ops, void *private, u64 start,
@@ -174,8 +191,13 @@ static inline void i915_vma_resource_init(struct i915_vma_resource *vma_res, vma_res->vm = vm; vma_res->bi.pages = pages; vma_res->bi.page_sizes = *page_sizes; +if (pages_rsgt) + vma_res->bi.pages_rsgt =i915_refct_sgt_get (pages_rsgt); vma_res->bi.readonly = readonly; vma_res->bi.lmem = lmem; +#if IS_ENABLED (CONFIG_DRM_I915_CAPTURE_ERROR ) + vma_res->mr = mr; +#endif vma_res->ops = ops; vma_res->private = private; vma_res->start = start;
@@ -186,6 +208,8 @@ static inline void i915_vma_resource_init(struct i915_vma_resource *vma_res,static inline void i915_vma_resource_fini (struct i915_vma_resource *vma_res) {GEM_BUG_ON (refcount_read (&vma_res->hold_count) !=1 ); +if (vma_res->bi.pages_rsgt) +i915_refct_sgt_put (vma_res->bi.pages_rsgt);i915_sw_fence_fini (&vma_res->chain); }
drivers/gpu/drm/i915/i915_vma_snapshot.c deleted +0 -125
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drivers/gpu/drm/i915/i915_vma_snapshot.h deleted +0 -101
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Signature · 1 line
2.31.1
Patchwork
CI[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Asynchronous vma unbinding (rev7)
In reply to Thomas Hellström== Series Details ==
== Series Details ==
Series: drm/i915: Asynchronous vma unbinding (rev7)
URL : https://patchwork.freedesktop.org/series/98055/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip fa2206c87130 drm/i915: Initial introduction of vma resources -:249: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #249: new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 625 lines checked1191590313f3 drm/i915: Use the vma resource as argument for gtt binding / unbinding 98debb352edc drm/i915: Don't pin the object pages during pending vma binds 402bca0f34dc drm/i915: Use vma resources for async unbinding
-:596: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_node' - possible side-effects? #596: FILE: drivers/gpu/drm/i915/i915_vma_resource.c:37:
+#define VMA_RES_LAST(_node) ((_node)->start + (_node)->node_size - 1)
total: 0 errors, 0 warnings, 1 checks, 941 lines checked8adfa6f048ac drm/i915: Asynchronous migration selftestb66f2c830d70 drm/i915: Use struct vma_resource instead of struct vma_snapshot -:614: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #614:
deleted file mode 100644
total: 0 errors, 1 warnings, 0 checks, 507 lines checked
Patchwork
CI[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Asynchronous vma unbinding (rev7)
In reply to Thomas Hellström== Series Details ==
== Series Details ==
Series: drm/i915: Asynchronous vma unbinding (rev7)
URL : https://patchwork.freedesktop.org/series/98055/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Patchwork
CI[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Asynchronous vma unbinding (rev7)
In reply to Thomas Hellström== Series Details ==
== Series Details ==
Series: drm/i915: Asynchronous vma unbinding (rev7)
URL : https://patchwork.freedesktop.org/series/98055/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11061 -> Patchwork_21958
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/index.html
Participating hosts (46 -> 37)
------------------------------
Additional (1): fi-pnv-d510
Missing (10): fi-bdw-samus bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-6 bat-adlp-4 bat-rpls-1 bat-rpls-2 bat-jsl-2 bat-jsl-1
Known issues
------------
Here are the changes found in Patchwork_21958 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-gfx:
- fi-hsw-4770: NOTRUN -> [SKIP][1] ([fdo#109271] / [fdo#109315]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-hsw-4770/igt@amdgpu/[email protected]
* igt@amdgpu/amd_basic@query-info:
- fi-bsw-kefka: NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-bsw-kefka/igt@amdgpu/[email protected]
* igt@debugfs_test@read_all_entries:
- fi-apl-guc: [PASS][3] -> [DMESG-WARN][4] ([i915#1610])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/fi-apl-guc/igt@debugfs_test@read_all_entries.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-apl-guc/igt@debugfs_test@read_all_entries.html
* igt@i915_module_load@reload:
- fi-bxt-dsi: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/fi-bxt-dsi/igt@[email protected]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-bxt-dsi/igt@[email protected]
* igt@i915_selftest@live:
- fi-skl-6600u: NOTRUN -> [FAIL][7] ([i915#4547])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-skl-6600u/igt@[email protected]
* igt@i915_selftest@live@execlists:
- fi-bsw-nick: [PASS][8] -> [INCOMPLETE][9] ([i915#2940])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/fi-bsw-nick/igt@i915_selftest@[email protected]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-bsw-nick/igt@i915_selftest@[email protected]
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [PASS][10] -> [DMESG-FAIL][11] ([i915#4528])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/fi-blb-e6850/igt@i915_selftest@[email protected]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-blb-e6850/igt@i915_selftest@[email protected]
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [PASS][12] -> [DMESG-WARN][13] ([i915#4269])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/fi-cml-u2/igt@[email protected]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-cml-u2/igt@[email protected]
* igt@prime_vgem@basic-userptr:
- fi-pnv-d510: NOTRUN -> [SKIP][14] ([fdo#109271]) +57 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-pnv-d510/igt@[email protected]
* igt@runner@aborted:
- fi-skl-6600u: NOTRUN -> [FAIL][15] ([i915#1436] / [i915#4312])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-skl-6600u/igt@[email protected]
- fi-bsw-nick: NOTRUN -> [FAIL][16] ([fdo#109271] / [i915#1436] / [i915#2722] / [i915#3428] / [i915#4312])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-bsw-nick/igt@[email protected]
- fi-blb-e6850: NOTRUN -> [FAIL][17] ([fdo#109271] / [i915#2403] / [i915#4312])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-blb-e6850/igt@[email protected]
#### Possible fixes ####
* igt@i915_selftest@live@execlists:
- fi-bsw-kefka: [INCOMPLETE][18] ([i915#2940]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/fi-bsw-kefka/igt@i915_selftest@[email protected]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-bsw-kefka/igt@i915_selftest@[email protected]
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [INCOMPLETE][20] ([i915#4785]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/fi-hsw-4770/igt@i915_selftest@[email protected]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/fi-hsw-4770/igt@i915_selftest@[email protected]
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
Build changes
-------------
* Linux: CI_DRM_11061 -> Patchwork_21958
CI-20190529: 20190529
CI_DRM_11061: 0ee2fe64a0021c173a686de95f9961c35c82cb99 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6326: ec75f64fcbcf4aac58fbf1bf629e8f59b19db4ce @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21958: b66f2c830d70881495dc694eb3d8c951ad44e618 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b66f2c830d70 drm/i915: Use struct vma_resource instead of struct vma_snapshot 8adfa6f048ac drm/i915: Asynchronous migration selftest402bca0f34dc drm/i915: Use vma resources for async unbinding 98debb352edc drm/i915: Don't pin the object pages during pending vma binds 1191590313f3 drm/i915: Use the vma resource as argument for gtt binding / unbinding fa2206c87130 drm/i915: Initial introduction of vma resources
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/index.html
Patchwork
CI[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Asynchronous vma unbinding (rev7)
In reply to Thomas Hellström== Series Details ==
== Series Details ==
Series: drm/i915: Asynchronous vma unbinding (rev7)
URL : https://patchwork.freedesktop.org/series/98055/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11061_full -> Patchwork_21958_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_21958_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_balancer@parallel-contexts:
- shard-iclb: [PASS][1] -> [SKIP][2] ([i915#4525])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb2/igt@[email protected]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb6/igt@[email protected]
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][3] -> [FAIL][4] ([i915#2842])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-tglb5/igt@gem_exec_fair@[email protected]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb3/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-kbl: NOTRUN -> [FAIL][5] ([i915#2842])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl3/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-none@vcs0:
- shard-apl: [PASS][6] -> [FAIL][7] ([i915#2842])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-apl4/igt@gem_exec_fair@[email protected]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl6/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][8] ([i915#2842])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb2/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-none@vecs0:
- shard-glk: [PASS][9] -> [FAIL][10] ([i915#2842])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-glk2/igt@gem_exec_fair@[email protected]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-glk6/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-iclb: [PASS][11] -> [FAIL][12] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb8/igt@gem_exec_fair@[email protected]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb7/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [PASS][13] -> [FAIL][14] ([i915#2842])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-kbl4/igt@gem_exec_fair@[email protected]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl3/igt@gem_exec_fair@[email protected]
* igt@gem_huc_copy@huc-copy:
- shard-skl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#2190])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl3/igt@[email protected]
* igt@gem_lmem_swapping@basic:
- shard-kbl: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl4/igt@[email protected]
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-skl: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#4613])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl7/igt@[email protected]
* igt@gem_lmem_swapping@random:
- shard-apl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) +2 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl3/igt@[email protected]
* igt@gem_pwrite@basic-exhaustion:
- shard-kbl: NOTRUN -> [WARN][19] ([i915#2658])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl4/igt@[email protected]
- shard-apl: NOTRUN -> [WARN][20] ([i915#2658])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl3/igt@[email protected]
* igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-tglb: NOTRUN -> [SKIP][21] ([i915#4270])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@gem_userptr_blits@dmabuf-sync:
- shard-tglb: NOTRUN -> [SKIP][22] ([i915#3323])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb3/igt@[email protected]
* igt@gem_userptr_blits@input-checking:
- shard-apl: NOTRUN -> [DMESG-WARN][23] ([i915#3002]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl6/igt@[email protected]
* igt@gem_userptr_blits@vma-merge:
- shard-tglb: NOTRUN -> [FAIL][24] ([i915#3318])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][25] -> [DMESG-WARN][26] ([i915#180]) +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-apl3/igt@[email protected]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl6/igt@[email protected]
* igt@gen9_exec_parse@bb-start-cmd:
- shard-tglb: NOTRUN -> [SKIP][27] ([i915#2527] / [i915#2856]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-tglb: NOTRUN -> [SKIP][28] ([fdo#111644] / [i915#1397] / [i915#2411])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@kms_async_flips@crc:
- shard-skl: NOTRUN -> [FAIL][29] ([i915#4272])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl10/igt@[email protected]
* igt@kms_big_fb@linear-32bpp-rotate-180:
- shard-glk: [PASS][30] -> [DMESG-WARN][31] ([i915#118]) +2 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-glk6/igt@[email protected]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-glk8/igt@[email protected]
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-skl: NOTRUN -> [FAIL][32] ([i915#3743]) +1 similar issue
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl10/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][33] ([fdo#111614])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][34] ([i915#3763])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl10/igt@[email protected]
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-apl: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#3777]) +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl3/igt@[email protected]
* igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
- shard-tglb: NOTRUN -> [SKIP][36] ([fdo#111615]) +1 similar issue
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-skl: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl3/igt@[email protected]
* igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][38] ([i915#3689]) +2 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_ccs.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886]) +8 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl6/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-random-ccs-data-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][40] ([fdo#111615] / [i915#3689]) +2 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@kms_ccs@pipe-a-random-ccs-data-yf_tiled_ccs.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-kbl: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +2 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl4/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +5 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl6/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@hdmi-crc-fast:
- shard-apl: NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +11 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl3/igt@[email protected]
* igt@kms_chamelium@vga-hpd:
- shard-skl: NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +11 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl3/igt@[email protected]
* igt@kms_color_chamelium@pipe-b-degamma:
- shard-kbl: NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +2 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl4/igt@[email protected]
* igt@kms_color_chamelium@pipe-d-ctm-red-to-blue:
- shard-tglb: NOTRUN -> [SKIP][46] ([fdo#109284] / [fdo#111827]) +3 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb3/igt@[email protected]
* igt@kms_cursor_crc@pipe-b-cursor-32x10-sliding:
- shard-tglb: NOTRUN -> [SKIP][47] ([i915#3359]) +4 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb7/igt@[email protected]
* igt@kms_cursor_crc@pipe-c-cursor-32x32-onscreen:
- shard-tglb: NOTRUN -> [SKIP][48] ([i915#3319]) +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@kms_cursor_crc@pipe-d-cursor-512x170-sliding:
- shard-tglb: NOTRUN -> [SKIP][49] ([fdo#109279] / [i915#3359]) +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@kms_cursor_legacy@pipe-d-single-bo:
- shard-skl: NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#533]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl3/igt@[email protected]
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [PASS][51] -> [INCOMPLETE][52] ([i915#636])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-kbl1/igt@[email protected]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl4/igt@[email protected]
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-tglb: NOTRUN -> [SKIP][53] ([fdo#109274] / [fdo#111825]) +3 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
- shard-skl: [PASS][54] -> [INCOMPLETE][55] ([i915#1982])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-skl6/igt@kms_flip@[email protected]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl7/igt@kms_flip@[email protected]
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: [PASS][56] -> [DMESG-WARN][57] ([i915#180])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-kbl6/igt@kms_flip@[email protected]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl7/igt@kms_flip@[email protected]
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
- shard-tglb: NOTRUN -> [SKIP][58] ([i915#2587])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb7/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-iclb: [PASS][59] -> [SKIP][60] ([i915#3701])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-glk: [PASS][61] -> [FAIL][62] ([i915#2546]) +2 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-glk9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-glk7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-onoff:
- shard-tglb: NOTRUN -> [SKIP][63] ([fdo#109280] / [fdo#111825]) +12 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-shrfb-fliptrack-mmap-gtt:
- shard-skl: NOTRUN -> [SKIP][64] ([fdo#109271]) +149 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl10/igt@[email protected]
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-apl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#533])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl6/igt@[email protected]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
- shard-kbl: [PASS][66] -> [INCOMPLETE][67] ([i915#2828])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-kbl7/igt@[email protected]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl4/igt@[email protected]
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-skl: [PASS][68] -> [INCOMPLETE][69] ([i915#4939])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-skl4/igt@kms_plane@[email protected]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl2/igt@kms_plane@[email protected]
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-apl: NOTRUN -> [FAIL][70] ([fdo#108145] / [i915#265]) +2 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl6/igt@[email protected]
* igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
- shard-skl: NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265]) +1 similar issue
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl3/igt@[email protected]
* igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-kbl: NOTRUN -> [FAIL][72] ([fdo#108145] / [i915#265]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl4/igt@[email protected]
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][73] ([i915#265])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl6/igt@[email protected]
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][74] -> [FAIL][75] ([fdo#108145] / [i915#265])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-skl8/igt@[email protected]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl7/igt@[email protected]
* igt@kms_plane_multiple@atomic-pipe-d-tiling-x:
- shard-kbl: NOTRUN -> [SKIP][76] ([fdo#109271]) +28 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl6/igt@[email protected]
* igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
- shard-skl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#2733])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl10/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
- shard-skl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#658])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl3/igt@[email protected]
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-tglb: NOTRUN -> [SKIP][79] ([i915#1911])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@[email protected]
* igt@kms_psr@psr2_suspend:
- shard-iclb: [PASS][80] -> [SKIP][81] ([fdo#109441]) +4 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb2/igt@kms_psr@psr2_suspend.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb8/igt@kms_psr@psr2_suspend.html
* igt@kms_setmode@basic:
- shard-glk: [PASS][82] -> [FAIL][83] ([i915#31])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-glk7/igt@[email protected]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-glk4/igt@[email protected]
* igt@kms_sysfs_edid_timing:
- shard-apl: NOTRUN -> [FAIL][84] ([IGT#2])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl7/igt@kms_sysfs_edid_timing.html
* igt@kms_writeback@writeback-check-output:
- shard-apl: NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2437]) +1 similar issue
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl6/igt@[email protected]
* igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame:
- shard-apl: NOTRUN -> [SKIP][86] ([fdo#109271]) +148 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl7/igt@[email protected]
* igt@perf@blocking:
- shard-skl: [PASS][87] -> [FAIL][88] ([i915#1542])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-skl1/igt@[email protected]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl8/igt@[email protected]
* igt@perf@polling-parameterized:
- shard-iclb: [PASS][89] -> [FAIL][90] ([i915#1542])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb5/igt@[email protected]
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb7/igt@[email protected]
* igt@prime_nv_api@i915_nv_import_vs_close:
- shard-tglb: NOTRUN -> [SKIP][91] ([fdo#109291]) +1 similar issue
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb6/igt@prime_nv_api@i915_nv_import_vs_close.html
* igt@sysfs_clients@fair-0:
- shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#2994])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl3/igt@[email protected]
- shard-kbl: NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl4/igt@[email protected]
* igt@sysfs_clients@split-25:
- shard-skl: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994]) +1 similar issue
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl7/igt@[email protected]
#### Possible fixes ####
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [FAIL][95] ([i915#2846]) -> [PASS][96]
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-glk5/igt@[email protected]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-glk6/igt@[email protected]
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [FAIL][97] ([i915#2842]) -> [PASS][98]
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb5/igt@gem_exec_fair@[email protected]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb7/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-none@vcs0:
- shard-glk: [FAIL][99] ([i915#2842]) -> [PASS][100] +2 similar issues
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-glk2/igt@gem_exec_fair@[email protected]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-glk6/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][101] ([i915#2842]) -> [PASS][102] +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-tglb1/igt@gem_exec_fair@[email protected]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb1/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [FAIL][103] ([i915#2849]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb5/igt@gem_exec_fair@[email protected]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb6/igt@gem_exec_fair@[email protected]
* igt@gem_exec_parallel@engines@basic:
- shard-glk: [DMESG-WARN][105] ([i915#118]) -> [PASS][106] +2 similar issues
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-glk7/igt@gem_exec_parallel@[email protected]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-glk1/igt@gem_exec_parallel@[email protected]
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][107] ([i915#2190]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-tglb7/igt@[email protected]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-tglb5/igt@[email protected]
* igt@gem_workarounds@reset-context:
- shard-snb: [TIMEOUT][109] -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-snb2/igt@[email protected]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-snb5/igt@[email protected]
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-skl: [FAIL][111] ([i915#2346]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-skl5/igt@[email protected]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl1/igt@[email protected]
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-apl: [DMESG-WARN][113] ([i915#180]) -> [PASS][114] +5 similar issues
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-apl3/igt@kms_flip@[email protected]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-apl3/igt@kms_flip@[email protected]
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-kbl: [DMESG-WARN][115] ([i915#180]) -> [PASS][116] +3 similar issues
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-kbl7/igt@kms_plane@[email protected]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl4/igt@kms_plane@[email protected]
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [FAIL][117] ([fdo#108145] / [i915#265]) -> [PASS][118] +1 similar issue
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-skl2/igt@[email protected]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-skl2/igt@[email protected]
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [SKIP][119] ([fdo#109441]) -> [PASS][120] +1 similar issue
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_gtt.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@perf@polling-parameterized:
- shard-glk: [FAIL][121] ([i915#1542]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-glk1/igt@[email protected]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-glk5/igt@[email protected]
#### Warnings ####
* igt@gem_exec_balancer@parallel-ordering:
- shard-iclb: [SKIP][123] ([i915#4525]) -> [FAIL][124] ([i915#4916])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb3/igt@[email protected]
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb4/igt@[email protected]
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-iclb: [FAIL][125] ([i915#2852]) -> [FAIL][126] ([i915#2842])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb8/igt@gem_exec_fair@[email protected]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb1/igt@gem_exec_fair@[email protected]
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-kbl: [FAIL][127] ([i915#2842]) -> [SKIP][128] ([fdo#109271])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-kbl4/igt@gem_exec_fair@[email protected]
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-kbl3/igt@gem_exec_fair@[email protected]
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][129] ([i915#658]) -> [SKIP][130] ([i915#588])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb4/igt@[email protected]
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb2/igt@[email protected]
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][131] ([i915#2684]) -> [WARN][132] ([i915#1804] / [i915#2684])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb2/igt@[email protected]
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb6/igt@[email protected]
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][133] ([i915#1804] / [i915#2684]) -> [WARN][134] ([i915#2684])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb4/igt@[email protected]
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb2/igt@[email protected]
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
- shard-iclb: [SKIP][135] ([fdo#111068] / [i915#658]) -> [SKIP][136] ([i915#2920])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb4/igt@[email protected]
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb2/igt@[email protected]
* igt@kms_psr2_su@page_flip-nv12:
- shard-iclb: [SKIP][137] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [FAIL][138] ([i915#4148])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-iclb8/igt@kms_psr2_su@page_flip-nv12.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/shard-iclb2/igt@kms_psr2_su@page_flip-nv12.html
* igt@runner@aborted:
- shard-apl: ([FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#4312]) -> ([FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11061/shard-apl6/igt@[email protected]
[140]: https://intel-gfx-ci.01.org/tree/drm
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21958/index.html
Re: [Intel-gfx] [PATCH v7 4/6] drm/i915: Use vma resources for async unbinding
In reply to Thomas HellströmQuoted 288 lines · Thomas Hellström
Implement async (non-blocking) unbinding by not syncing the vma before calling unbind on the
vma_resource.
Add the resulting unbind fence to the object'sdma_resvfrom where it is picked up by the ttm migration code.
Ideally these unbind fences should be coalesced with the migration blit fence to avoid stalling the migration blit waiting for unbind, as they can certainly go on in parallel, but since we don't yet have a reasonable data structure to use to coalesce fences and attach the resulting fence to a timeline, we defer that for now.Note that with async unbinding, even while the unbind waits for the preceding bind to complete before unbinding, the vma itself might have been destroyed in the process, clearing the vma pages. Therefore we can only allow async unbinding if we have a refcounted sg-list and keep a refcount on that for the vma resource pages to stay intact until binding occurs. If this condition is not met, a request for an async unbind is diverted to a sync unbind.
v2:
- Use a separatekmem_cachefor vma resources for now to isolate their memory allocation and aid debugging.
- Move the check for vm closed to the actual unbinding thread. Regardless of whether the vm is closed, we need the unbind fence to properly wait for capture.
- Clearvma_res::vmon unbind and update its documentation.
v4:
- Take cache coloring into account when searching for vma resources pending unbind. (Matthew Auld)
v5:
- Fix timeout and error check ini915_vma_resource_bind_dep_await().
- Avoid taking a reference on the object for async binding if async unbind capable.
- Fix braces around a single-line if statement.
v6:
- Fix up the cache coloring adjustment. (Kernel test robot <[email protected]>)
- Don't allow async unbinding if thevma_respages are not the same as the object pages. (Matthew Auld)
v7:
- s/unsigned long/u64/ in a number of places (Matthew Auld)Signed-off-by Thomas Hellström <[email protected]>Reviewed-by Matthew Auld <[email protected]>--- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 11 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +- drivers/gpu/drm/i915/gt/intel_gtt.c | 4 + drivers/gpu/drm/i915/gt/intel_gtt.h | 3 + drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 12 +- drivers/gpu/drm/i915/i915_module.c | 3 + drivers/gpu/drm/i915/i915_vma.c | 205 +++++++++-- drivers/gpu/drm/i915/i915_vma.h | 3 +- drivers/gpu/drm/i915/i915_vma_resource.c | 354 +++++++++++++++++-- drivers/gpu/drm/i915/i915_vma_resource.h | 48 +++ 11 files changed, 579 insertions(+), 67 deletions(-)drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +10
-1@@ -142,7 +142,16 @@ int i915_ttm_move_notify(struct ttm_buffer_object *bo)struct drm_i915_gem_object *obj =i915_ttm_to_gem (bo);int ret; - ret =i915_gem_object_unbind (obj,I915_GEM_OBJECT_UNBIND_ACTIVE ); +/* +* Note: The async unbinding here will actually transform the +* blocking wait for unbind into a wait before finally submitting +* evict / migration blit and thus stall the migration timeline +* which may not be good for overall throughput. We should make +* sure we await the unbind fences *after* the migration blit +* instead of *before* as we currently do. +*/ + ret =i915_gem_object_unbind (obj,I915_GEM_OBJECT_UNBIND_ACTIVE | +I915_GEM_OBJECT_UNBIND_ASYNC );if (ret)return ret;drivers/gpu/drm/i915/gt/intel_ggtt.c +1
-1@@ -142,7 +142,7 @@ void i915_ggtt_suspend_vm(struct i915_address_space *vm)continue ;if (!i915_vma_is_bound (vma,I915_VMA_GLOBAL_BIND )) { -__i915_vma_evict (vma); +__i915_vma_evict (vma, false);drm_mm_remove_node (&vma->node); } }drivers/gpu/drm/i915/gt/intel_gtt.c +4
-0@@ -161,6 +161,9 @@ static void __i915_vm_release(struct work_struct *work)struct i915_address_space *vm = container_of(work, struct i915_address_space, release_work); +/* Synchronize async unbinds. */ +i915_vma_resource_bind_dep_sync_all (vm); + vm->cleanup (vm);i915_address_space_fini (vm);@@ -189,6 +192,7 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass)if (!kref_read (&vm->resv_ref))kref_init (&vm->resv_ref); + vm->pending_unbind =RB_ROOT_CACHED ;INIT_WORK (&vm->release_work, __i915_vm_release);atomic_set (&vm->open,1 );drivers/gpu/drm/i915/gt/intel_gtt.h +3
-0@@ -265,6 +265,9 @@ struct i915_address_space {/* Flags used when creating page-table objects for this vm */ unsigned long lmem_pt_obj_flags; +/* Interval tree for pending unbind vma resources */ +struct rb_root_cached pending_unbind; +struct drm_i915_gem_object * (*alloc_pt_dma)(struct i915_address_space *vm,int sz); struct drm_i915_gem_object *drivers/gpu/drm/i915/i915_drv.h +1
-0@@ -1661,6 +1661,7 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,#define I915_GEM_OBJECT_UNBIND_BARRIER BIT(1)#define I915_GEM_OBJECT_UNBIND_TEST BIT(2)#define I915_GEM_OBJECT_UNBIND_VM_TRYLOCK BIT(3) +#define I915_GEM_OBJECT_UNBIND_ASYNC BIT(4)void i915_gem_runtime_suspend (struct drm_i915_private *dev_priv);drivers/gpu/drm/i915/i915_gem.c +9
-3@@ -157,10 +157,16 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj,spin_unlock (&obj->vma.lock);if (vma) { +bool vm_trylock = !!(flags &I915_GEM_OBJECT_UNBIND_VM_TRYLOCK ); ret = -EBUSY ; -if (flags &I915_GEM_OBJECT_UNBIND_ACTIVE || - !i915_vma_is_active (vma)) { -if (flags &I915_GEM_OBJECT_UNBIND_VM_TRYLOCK ) { +if (flags &I915_GEM_OBJECT_UNBIND_ASYNC ) { +assert_object_held (vma->obj); + ret =i915_vma_unbind_async (vma, vm_trylock); + } + +if (ret == -EBUSY && (flags &I915_GEM_OBJECT_UNBIND_ACTIVE || + !i915_vma_is_active (vma))) { +if (vm_trylock) {if (mutex_trylock (&vma->vm->mutex)) { ret =__i915_vma_unbind (vma);mutex_unlock (&vma->vm->mutex);drivers/gpu/drm/i915/i915_module.c +3
-0@@ -17,6 +17,7 @@#include "i915_scheduler.h" #include "i915_selftest.h" #include "i915_vma.h" +#include "i915_vma_resource.h" static int i915_check_nomodeset (void ) {@@ -64,6 +65,8 @@ static const struct { .exit = i915_scheduler_module_exit }, { .init = i915_vma_module_init, .exit = i915_vma_module_exit }, + { .init = i915_vma_resource_module_init, + .exit = i915_vma_resource_module_exit }, { .init = i915_mock_selftests }, { .init = i915_pmu_init, .exit = i915_pmu_exit },drivers/gpu/drm/i915/i915_vma.c +28
-12@@ -286,9 +286,10 @@ struct i915_vma_work {struct dma_fence_work base;struct i915_address_space *vm;struct i915_vm_pt_stash stash; -struct i915_vma *vma; +struct i915_vma_resource *vma_res;struct drm_i915_gem_object *pinned;struct i915_sw_dma_fence_cb cb; +struct i915_refct_sgt *rsgt;enum i915_cache_level cache_level;unsigned int flags; };@@ -296,10 +297,11 @@ struct i915_vma_work {static void __vma_bind (struct dma_fence_work *work) {struct i915_vma_work *vw =container_of (work,typeof (*vw), base); -struct i915_vma *vma = vw->vma; +struct i915_vma_resource *vma_res = vw->vma_res; + + vma_res->ops->bind_vma (vma_res->vm, &vw->stash, + vma_res, vw->cache_level, vw->flags); - vma->ops->bind_vma (vw->vm, &vw->stash, - vma->resource, vw->cache_level, vw->flags); }static void __vma_release (struct dma_fence_work *work)@@ -311,6 +313,10 @@ static void __vma_release(struct dma_fence_work *work)i915_vm_free_pt_stash (vw->vm, &vw->stash);i915_vm_put (vw->vm); +if (vw->vma_res) +i915_vma_resource_put (vw->vma_res); +if (vw->rsgt) +i915_refct_sgt_put (vw->rsgt); }static const struct dma_fence_work_ops bind_ops = {@@ -380,13 +386,11 @@ i915_vma_resource_init_from_vma(struct i915_vma_resource *vma_res, {struct drm_i915_gem_object *obj = vma->obj; -i915_vma_resource_init (vma_res, vma->pages, &vma->page_sizes, +i915_vma_resource_init (vma_res, vma->vm, vma->pages, &vma->page_sizes,i915_gem_object_is_readonly (obj),i915_gem_object_is_lmem (obj), - vma->private, - vma->node.start, - vma->node.size, - vma->size); + vma->ops, vma->private, vma->node.start, + vma->node.size, vma->size); }/** @@ -410,6 +414,7 @@ int i915_vma_bind(struct i915_vma *vma, {u32 bind_flags;u32 vma_flags; +int ret;lockdep_assert_held (&vma->vm->mutex);GEM_BUG_ON (!drm_mm_node_allocated (&vma->node));@@ -418,12 +423,12 @@ int i915_vma_bind(struct i915_vma *vma,if (GEM_DEBUG_WARN_ON (range_overflows (vma->node.start, vma->node.size, vma->vm->total))) { -kfree (vma_res); +i915_vma_resource_free (vma_res);return -ENODEV ; }if (GEM_DEBUG_WARN_ON (!flags)) { -kfree (vma_res); +i915_vma_resource_free (vma_res);return -EINVAL ; }@@ -435,12 +440,30 @@ int i915_vma_bind(struct i915_vma *vma, bind_flags &= ~vma_flags;if (bind_flags ==0 ) { -kfree (vma_res); +i915_vma_resource_free (vma_res);return 0 ; }GEM_BUG_ON (!atomic_read (&vma->pages_count)); +/* Wait for or await async unbinds touching our range */ +if (work && bind_flags & vma->vm->bind_async_flags) + ret =i915_vma_resource_bind_dep_await (vma->vm, + &work->base.chain, + vma->node.start, + vma->node.size, + true, +GFP_NOWAIT | + __GFP_RETRY_MAYFAIL | + __GFP_NOWARN); +else
drivers/gpu/drm/i915/i915_vma.c int i915_vma_bind(struct i915_vma *vma, · line 469
Quoted 10 lines
drivers/gpu/drm/i915/i915_vma.c +7
-0+ ret =i915_vma_resource_bind_dep_sync (vma->vm, vma->node.start, + vma->node.size, true); +if (ret) { +i915_vma_resource_free (vma_res); +return ret; + } +if (vma->resource || !vma_res) {/* Rebinding with an additional I915_VMA_*_BIND */ GEM_WARN_ON (!vma_flags);
You missed an extra kfree(vma_res) on the next line from here (not in patch context), which would presumably need to be i915_vma_resource_free(vma_res)
Further to that, you are freeing it where it can already be known to be null, which, while relying on known zero side effect of double free will work, looks very unintuitive.
Firther to that, once this series is applied, i915_vma_bind only appears to be called from eb_relocate_entry() with vma_res always null, and from i915_vma_pin_ww() where it allocates vma_res.
It would be much cleaner to just allocate the vma_res in i915_vma_bind if required. That way it will avoid the null asignment on return to i915_vma_pin_ww with the equally unintuitive kfree(vma_res) during the error fallthrough path at the end of i915_vma_pin_ww on a knowingly null pointer (also that would need to be a i915_vma_resource_free if you keep it the way it is).
Quoted 780 lines
drivers/gpu/drm/i915/i915_vma.c +140
-18@@ -453,9 +476,11 @@ int i915_vma_bind(struct i915_vma *vma,if (work && bind_flags & vma->vm->bind_async_flags) {struct dma_fence *prev; - work->vma = vma; + work->vma_res =i915_vma_resource_get (vma->resource); work->cache_level = cache_level; work->flags = bind_flags; +if (vma->obj->mm.rsgt) + work->rsgt =i915_refct_sgt_get (vma->obj->mm.rsgt);/* * Note we only want to chain up to the migration fence on @@ -476,14 +501,24 @@ int i915_vma_bind(struct i915_vma *vma, work->base.dma.error =0 ;/* enable the queue_work() */ - work->pinned =i915_gem_object_get (vma->obj); +/* +* If we don't have the refcounted pages list, keep a reference +* on the object to avoid waiting for the async bind to +* complete in the object destruction path. +*/ +if (!work->rsgt) + work->pinned =i915_gem_object_get (vma->obj); }else {if (vma->obj) {int ret; ret =i915_gem_object_wait_moving_fence (vma->obj, true); -if (ret) +if (ret) { +i915_vma_resource_free (vma->resource); + vma->resource =NULL ; +return ret; + } } vma->ops->bind_vma (vma->vm,NULL , vma->resource, cache_level, bind_flags);@@ -1756,8 +1791,9 @@ int _i915_vma_move_to_active(struct i915_vma *vma,return 0 ; } -void __i915_vma_evict (struct i915_vma *vma) +struct dma_fence *__i915_vma_evict (struct i915_vma *vma,bool async) { +struct i915_vma_resource *vma_res = vma->resource;struct dma_fence *unbind_fence;GEM_BUG_ON (i915_vma_is_pinned (vma));@@ -1790,27 +1826,39 @@ void __i915_vma_evict(struct i915_vma *vma)GEM_BUG_ON (vma->fence);GEM_BUG_ON (i915_vma_has_userfault (vma)); -if (likely (atomic_read (&vma->vm->open))) { -trace_i915_vma_unbind (vma); - vma->ops->unbind_vma (vma->vm, vma->resource); - } +/* Object backend must be async capable. */ +GEM_WARN_ON (async && !vma->obj->mm.rsgt); + +/* If vm is not open, unbind is a nop. */ + vma_res->needs_wakeref =i915_vma_is_bound (vma,I915_VMA_GLOBAL_BIND ) && +atomic_read (&vma->vm->open); +trace_i915_vma_unbind (vma); + + unbind_fence =i915_vma_resource_unbind (vma_res); + vma->resource =NULL ; +atomic_and (~(I915_VMA_BIND_MASK |I915_VMA_ERROR |I915_VMA_GGTT_WRITE ), &vma->flags); - unbind_fence =i915_vma_resource_unbind (vma->resource); -i915_vma_resource_put (vma->resource); - vma->resource =NULL ; +/* Object backend must be async capable. */ +GEM_WARN_ON (async && !vma->obj->mm.rsgt);i915_vma_detach (vma); -vma_unbind_pages (vma); + +if (!async && unbind_fence) { +dma_fence_wait (unbind_fence, false); +dma_fence_put (unbind_fence); + unbind_fence =NULL ; + }/* -* This uninterruptible wait under the vm mutex is currently -* only ever blocking while the vma is being captured from. -* With async unbinding, this wait here will be removed. +* Binding itself may not have completed until the unbind fence signals, +* so don't drop the pages until that happens, unless the resource is +* async_capable. */ -dma_fence_wait (unbind_fence, false); -dma_fence_put (unbind_fence); + +vma_unbind_pages (vma); +return unbind_fence; }int __i915_vma_unbind (struct i915_vma *vma)@@ -1837,12 +1885,47 @@ int __i915_vma_unbind(struct i915_vma *vma)return ret;GEM_BUG_ON (i915_vma_is_active (vma)); -__i915_vma_evict (vma); +__i915_vma_evict (vma, false);drm_mm_remove_node (&vma->node);/* pairs with i915_vma_release() */ return 0 ; } +static struct dma_fence *__i915_vma_unbind_async (struct i915_vma *vma) +{ +struct dma_fence *fence; + +lockdep_assert_held (&vma->vm->mutex); + +if (!drm_mm_node_allocated (&vma->node)) +return NULL ; + +if (i915_vma_is_pinned (vma) || + &vma->obj->mm.rsgt->table != vma->resource->bi.pages) +return ERR_PTR (-EAGAIN ); + +/* +* We probably need to replace this with awaiting the fences of the +* object's dma_resv when the vma active goes away. When doing that +* we need to be careful to not add the vma_resource unbind fence +* immediately to the object's dma_resv, because then unbinding +* the next vma from the object, in case there are many, will +* actually await the unbinding of the previous vmas, which is +* undesirable. +*/ +if (i915_sw_fence_await_active (&vma->resource->chain, &vma->active, +I915_ACTIVE_AWAIT_EXCL | +I915_ACTIVE_AWAIT_ACTIVE ) <0 ) { +return ERR_PTR (-EBUSY ); + } + + fence =__i915_vma_evict (vma, true); + +drm_mm_remove_node (&vma->node);/* pairs with i915_vma_release() */ + +return fence; +} +int i915_vma_unbind (struct i915_vma *vma) {struct i915_address_space *vm = vma->vm;@@ -1879,6 +1962,68 @@ int i915_vma_unbind(struct i915_vma *vma)return err; } +int i915_vma_unbind_async (struct i915_vma *vma,bool trylock_vm) +{ +struct drm_i915_gem_object *obj = vma->obj; +struct i915_address_space *vm = vma->vm; +intel_wakeref_t wakeref =0 ; +struct dma_fence *fence; +int err; + +/* +* We need the dma-resv lock since we add the +* unbind fence to the dma-resv object. +*/ +assert_object_held (obj); + +if (!drm_mm_node_allocated (&vma->node)) +return 0 ; + +if (i915_vma_is_pinned (vma)) { +vma_print_allocator (vma,"is pinned" ); +return -EAGAIN ; + } + +if (!obj->mm.rsgt) +return -EBUSY ; + + err =dma_resv_reserve_shared (obj->base.resv,1 ); +if (err) +return -EBUSY ; + +/* +* It would be great if we could grab this wakeref from the +* async unbind work if needed, but we can't because it uses +* kmalloc and it's in the dma-fence signalling critical path. +*/ +if (i915_vma_is_bound (vma,I915_VMA_GLOBAL_BIND )) + wakeref =intel_runtime_pm_get (&vm->i915->runtime_pm); + +if (trylock_vm && !mutex_trylock (&vm->mutex)) { + err = -EBUSY ; + goto out_rpm; + }else if (!trylock_vm) { + err =mutex_lock_interruptible_nested (&vm->mutex, !wakeref); +if (err) + goto out_rpm; + } + + fence =__i915_vma_unbind_async (vma); +mutex_unlock (&vm->mutex); +if (IS_ERR_OR_NULL (fence)) { + err =PTR_ERR_OR_ZERO (fence); + goto out_rpm; + } + +dma_resv_add_shared_fence (obj->base.resv, fence); +dma_fence_put (fence); + +out_rpm: +if (wakeref) +intel_runtime_pm_put (&vm->i915->runtime_pm, wakeref); +return err; +} +struct i915_vma *i915_vma_make_unshrinkable (struct i915_vma *vma) {i915_gem_object_make_unshrinkable (vma->obj);drivers/gpu/drm/i915/i915_vma.h +2
-1@@ -213,9 +213,10 @@ bool i915_vma_misplaced(const struct i915_vma *vma, u64 size, u64 alignment, u64 flags);void __i915_vma_set_map_and_fenceable (struct i915_vma *vma);void i915_vma_revoke_mmap (struct i915_vma *vma); -void __i915_vma_evict (struct i915_vma *vma); +struct dma_fence *__i915_vma_evict (struct i915_vma *vma,bool async);int __i915_vma_unbind (struct i915_vma *vma);int __must_check i915_vma_unbind (struct i915_vma *vma); +int __must_check i915_vma_unbind_async (struct i915_vma *vma,bool trylock_vm);void i915_vma_unlink_ctx (struct i915_vma *vma);void i915_vma_close (struct i915_vma *vma);void i915_vma_reopen (struct i915_vma *vma);drivers/gpu/drm/i915/i915_vma_resource.c +323
-31@@ -2,39 +2,44 @@/* * Copyright © 2021 Intel Corporation */ + +#include <linux/interval_tree_generic.h> #include <linux/slab.h> +#include "i915_sw_fence.h" #include "i915_vma_resource.h" +#include "i915_drv.h" -/* Callbacks for the unbind dma-fence. */ -static const char *get_driver_name (struct dma_fence *fence) -{ -return "vma unbind fence" ; -} +#include "gt/intel_gtt.h" -static const char *get_timeline_name (struct dma_fence *fence) -{ -return "unbound" ; -} - -static struct dma_fence_ops unbind_fence_ops = { - .get_driver_name = get_driver_name, - .get_timeline_name = get_timeline_name, -}; +static struct kmem_cache *slab_vma_resources;/** -* __i915_vma_resource_init - Initialize a vma resource. -* @vma_res: The vma resource to initialize +* DOC: +* We use a per-vm interval tree to keep track of vma_resources +* scheduled for unbind but not yet unbound. The tree is protected by +* the vm mutex, and nodes are removed just after the unbind fence signals. +* The removal takes the vm mutex from a kernel thread which we need to +* keep in mind so that we don't grab the mutex and try to wait for all +* pending unbinds to complete, because that will temporaryily block many +* of the workqueue threads, and people will get angry. * -* Initializes the private members of a vma resource. +* We should consider using a single ordered fence per VM instead but that +* requires ordering the unbinds and might introduce unnecessary waiting +* for unrelated unbinds. Amount of code will probably be roughly the same +* due to the simplicity of using the interval tree interface. +* +* Another drawback of this interval tree is that the complexity of insertion +* and removal of fences increases as O(ln(pending_unbinds)) instead of +* O(1) for a single fence without interval tree. */ -void __i915_vma_resource_init (struct i915_vma_resource *vma_res) -{ -spin_lock_init (&vma_res->lock); -dma_fence_init (&vma_res->unbind_fence, &unbind_fence_ops, - &vma_res->lock,0 ,0 ); -refcount_set (&vma_res->hold_count,1 ); -} +#define VMA_RES_START (_node) ((_node)->start) +#define VMA_RES_LAST (_node) ((_node)->start + (_node)->node_size - 1) +INTERVAL_TREE_DEFINE(struct i915_vma_resource, rb, + u64, __subtree_last, + VMA_RES_START, VMA_RES_LAST, static, vma_res_itree); + +/* Callbacks for the unbind dma-fence. */ /** * i915_vma_resource_alloc - Allocate a vma resource @@ -45,15 +50,73 @@ void __i915_vma_resource_init(struct i915_vma_resource *vma_res)struct i915_vma_resource *i915_vma_resource_alloc (void ) {struct i915_vma_resource *vma_res = -kzalloc (sizeof (*vma_res),GFP_KERNEL ); +kmem_cache_zalloc (slab_vma_resources,GFP_KERNEL );return vma_res ? vma_res :ERR_PTR (-ENOMEM ); } +/** +* i915_vma_resource_free - Free a vma resource +* @vma_res: The vma resource to free. +*/ +void i915_vma_resource_free (struct i915_vma_resource *vma_res) +{ +kmem_cache_free (slab_vma_resources, vma_res); +} + +static const char *get_driver_name (struct dma_fence *fence) +{ +return "vma unbind fence" ; +} + +static const char *get_timeline_name (struct dma_fence *fence) +{ +return "unbound" ; +} + +static void unbind_fence_free_rcu (struct rcu_head *head) +{ +struct i915_vma_resource *vma_res = +container_of (head,typeof (*vma_res), unbind_fence.rcu); + +i915_vma_resource_free (vma_res); +} + +static void unbind_fence_release (struct dma_fence *fence) +{ +struct i915_vma_resource *vma_res = +container_of (fence,typeof (*vma_res), unbind_fence); + +i915_sw_fence_fini (&vma_res->chain); + +call_rcu (&fence->rcu, unbind_fence_free_rcu); +} + +static struct dma_fence_ops unbind_fence_ops = { + .get_driver_name = get_driver_name, + .get_timeline_name = get_timeline_name, + .release = unbind_fence_release, +}; +static void __i915_vma_resource_unhold (struct i915_vma_resource *vma_res) { -if (refcount_dec_and_test (&vma_res->hold_count)) -dma_fence_signal (&vma_res->unbind_fence); +struct i915_address_space *vm; + +if (!refcount_dec_and_test (&vma_res->hold_count)) +return ; + +dma_fence_signal (&vma_res->unbind_fence); + + vm = vma_res->vm; +if (vma_res->wakeref) +intel_runtime_pm_put (&vm->i915->runtime_pm, vma_res->wakeref); + + vma_res->vm =NULL ; +if (!RB_EMPTY_NODE (&vma_res->rb)) { +mutex_lock (&vm->mutex); +vma_res_itree_remove (vma_res, &vm->pending_unbind); +mutex_unlock (&vm->mutex); + } }/** @@ -102,6 +165,49 @@ bool i915_vma_resource_hold(struct i915_vma_resource *vma_res,return held; } +static void i915_vma_resource_unbind_work (struct work_struct *work) +{ +struct i915_vma_resource *vma_res = +container_of (work,typeof (*vma_res), work); +struct i915_address_space *vm = vma_res->vm; +bool lockdep_cookie; + + lockdep_cookie =dma_fence_begin_signalling (); +if (likely (atomic_read (&vm->open))) + vma_res->ops->unbind_vma (vm, vma_res); + +dma_fence_end_signalling (lockdep_cookie); +__i915_vma_resource_unhold (vma_res); +i915_vma_resource_put (vma_res); +} + +static int +i915_vma_resource_fence_notify (struct i915_sw_fence *fence, +enum i915_sw_fence_notify state) +{ +struct i915_vma_resource *vma_res = +container_of (fence,typeof (*vma_res), chain); +struct dma_fence *unbind_fence = + &vma_res->unbind_fence; + +switch (state) { +case FENCE_COMPLETE : +dma_fence_get (unbind_fence); +if (vma_res->immediate_unbind) { +i915_vma_resource_unbind_work (&vma_res->work); + }else { +INIT_WORK (&vma_res->work, i915_vma_resource_unbind_work); +queue_work (system_unbound_wq, &vma_res->work); + } +break ; +case FENCE_FREE : +i915_vma_resource_put (vma_res); +break ; + } + +return NOTIFY_DONE ; +} +/** * i915_vma_resource_unbind - Unbind a vma resource * @vma_res: The vma resource to unbind. @@ -112,10 +218,196 @@ bool i915_vma_resource_hold(struct i915_vma_resource *vma_res,* Return: A refcounted pointer to a dma-fence that signals when unbinding is * complete. */ -struct dma_fence * -i915_vma_resource_unbind (struct i915_vma_resource *vma_res) +struct dma_fence *i915_vma_resource_unbind (struct i915_vma_resource *vma_res) { -__i915_vma_resource_unhold (vma_res); -dma_fence_get (&vma_res->unbind_fence); +struct i915_address_space *vm = vma_res->vm; + +/* Reference for the sw fence */ +i915_vma_resource_get (vma_res); + +/* Caller must already have a wakeref in this case. */ +if (vma_res->needs_wakeref) + vma_res->wakeref =intel_runtime_pm_get_if_in_use (&vm->i915->runtime_pm); + +if (atomic_read (&vma_res->chain.pending) <=1 ) { +RB_CLEAR_NODE (&vma_res->rb); + vma_res->immediate_unbind =1 ; + }else { +vma_res_itree_insert (vma_res, &vma_res->vm->pending_unbind); + } + +i915_sw_fence_commit (&vma_res->chain); +return &vma_res->unbind_fence; } + +/** +* __i915_vma_resource_init - Initialize a vma resource. +* @vma_res: The vma resource to initialize +* +* Initializes the private members of a vma resource. +*/ +void __i915_vma_resource_init (struct i915_vma_resource *vma_res) +{ +spin_lock_init (&vma_res->lock); +dma_fence_init (&vma_res->unbind_fence, &unbind_fence_ops, + &vma_res->lock,0 ,0 ); +refcount_set (&vma_res->hold_count,1 ); +i915_sw_fence_init (&vma_res->chain, i915_vma_resource_fence_notify); +} + +static void +i915_vma_resource_color_adjust_range (struct i915_address_space *vm, +u64 *start, +u64 *end) +{ +if (i915_vm_has_cache_coloring (vm)) { +if (*start) + *start -=I915_GTT_PAGE_SIZE ; + *end +=I915_GTT_PAGE_SIZE ; + } +} + +/** +* i915_vma_resource_bind_dep_sync - Wait for / sync all unbinds touching a +* certain vm range. +* @vm: The vm to look at. +* @offset: The range start. +* @size: The range size. +* @intr: Whether to wait interrubtible. +* +* The function needs to be called with the vm lock held. +* +* Return: Zero on success, -ERESTARTSYS if interrupted and @intr==true +*/ +int i915_vma_resource_bind_dep_sync (struct i915_address_space *vm, +u64 offset, +u64 size, +bool intr) +{ +struct i915_vma_resource *node; +u64 last = offset + size -1 ; + +lockdep_assert_held (&vm->mutex); +might_sleep (); + +i915_vma_resource_color_adjust_range (vm, &offset, &last); + node =vma_res_itree_iter_first (&vm->pending_unbind, offset, last); +while (node) { +int ret =dma_fence_wait (&node->unbind_fence, intr); + +if (ret) +return ret; + + node =vma_res_itree_iter_next (node, offset, last); + } + +return 0 ; +} + +/** +* i915_vma_resource_bind_dep_sync_all - Wait for / sync all unbinds of a vm, +* releasing the vm lock while waiting. +* @vm: The vm to look at. +* +* The function may not be called with the vm lock held. +* Typically this is called at vm destruction to finish any pending +* unbind operations. The vm mutex is released while waiting to avoid +* stalling kernel workqueues trying to grab the mutex. +*/ +void i915_vma_resource_bind_dep_sync_all (struct i915_address_space *vm) +{ +struct i915_vma_resource *node; +struct dma_fence *fence; + +do { + fence =NULL ; +mutex_lock (&vm->mutex); + node =vma_res_itree_iter_first (&vm->pending_unbind,0 , +U64_MAX ); +if (node) + fence =dma_fence_get_rcu (&node->unbind_fence); +mutex_unlock (&vm->mutex); + +if (fence) { +/* +* The wait makes sure the node eventually removes +* itself from the tree. +*/ +dma_fence_wait (fence, false); +dma_fence_put (fence); + } + }while (node); +} + +/** +* i915_vma_resource_bind_dep_await - Have a struct i915_sw_fence await all +* pending unbinds in a certain range of a vm. +* @vm: The vm to look at. +* @sw_fence: The struct i915_sw_fence that will be awaiting the unbinds. +* @offset: The range start. +* @size: The range size. +* @intr: Whether to wait interrubtible. +* @gfp: Allocation mode for memory allocations. +* +* The function makes @sw_fence await all pending unbinds in a certain +* vm range before calling the complete notifier. To be able to await +* each individual unbind, the function needs to allocate memory using +* the @gpf allocation mode. If that fails, the function will instead +* wait for the unbind fence to signal, using @intr to judge whether to +* wait interruptible or not. Note that @gfp should ideally be selected so +* as to avoid any expensive memory allocation stalls and rather fail and +* synchronize itself. For now the vm mutex is required when calling this +* function with means that @gfp can't call into direct reclaim. In reality +* this means that during heavy memory pressure, we will sync in this +* function. +* +* Return: Zero on success, -ERESTARTSYS if interrupted and @intr==true +*/ +int i915_vma_resource_bind_dep_await (struct i915_address_space *vm, +struct i915_sw_fence *sw_fence, +u64 offset, +u64 size, +bool intr, +gfp_t gfp) +{ +struct i915_vma_resource *node; +u64 last = offset + size -1 ; + +lockdep_assert_held (&vm->mutex); +might_alloc (gfp); +might_sleep (); + +i915_vma_resource_color_adjust_range (vm, &offset, &last); + node =vma_res_itree_iter_first (&vm->pending_unbind, offset, last); +while (node) { +int ret; + + ret =i915_sw_fence_await_dma_fence (sw_fence, + &node->unbind_fence, +0 , gfp); +if (ret <0 ) { + ret =dma_fence_wait (&node->unbind_fence, intr); +if (ret) +return ret; + } + + node =vma_res_itree_iter_next (node, offset, last); + } + +return 0 ; +} + +void i915_vma_resource_module_exit (void ) +{ +kmem_cache_destroy (slab_vma_resources); +} + +int __init i915_vma_resource_module_init (void ) +{ + slab_vma_resources =KMEM_CACHE (i915_vma_resource,SLAB_HWCACHE_ALIGN ); +if (!slab_vma_resources) +return -ENOMEM ; + +return 0 ; +}drivers/gpu/drm/i915/i915_vma_resource.h +48
-0@@ -10,6 +10,8 @@#include <linux/refcount.h> #include "i915_gem.h" +#include "i915_sw_fence.h" +#include "intel_runtime_pm.h" struct i915_page_sizes {/** @@ -38,6 +40,13 @@ struct i915_page_sizes {* @hold_count: Number of holders blocking the fence from finishing. * The vma itself is keeping a hold, which is released when unbind * is scheduled. +* @work: Work struct for deferred unbind work. +* @chain: Pointer to struct i915_sw_fence used to await dependencies. +* @rb: Rb node for the vm's pending unbind interval tree. +* @__subtree_last: Interval tree private member. +* @vm: non-refcounted pointer to the vm. This is for internal use only and +* this member is cleared after vm_resource unbind. +* @ops: Pointer to the backend i915_vma_ops. * @private: Bind backend private info. * @start: Offset into the address space of bind range start. * @node_size: Size of the allocated range manager node. @@ -45,6 +54,8 @@ struct i915_page_sizes {* @page_sizes_gtt: Resulting page sizes from the bind operation. * @bound_flags: Flags indicating binding status. * @allocated: Backend private data. TODO: Should move into @private. +* @immediate_unbind: Unbind can be done immediately and don't need to be +* deferred to a work item awaiting unsignaled fences. * * The lifetime of a struct i915_vma_resource is from a binding request to * the actual possible asynchronous unbind has completed. @@ -54,6 +65,12 @@ struct i915_vma_resource {/* See above for description of the lock. */ spinlock_t lock;refcount_t hold_count; +struct work_struct work; +struct i915_sw_fence chain; +struct rb_node rb; +u64 __subtree_last; +struct i915_address_space *vm; +intel_wakeref_t wakeref;/** * struct i915_vma_bindinfo - Information needed for async bind @@ -73,13 +90,17 @@ struct i915_vma_resource { bool lmem:1; } bi; +const struct i915_vma_ops *ops;void *private;u64 start;u64 node_size;u64 vma_size;u32 page_sizes_gtt; +u32 bound_flags; bool allocated:1; + bool immediate_unbind:1; + bool needs_wakeref:1; }; bool i915_vma_resource_hold(struct i915_vma_resource *vma_res,@@ -90,6 +111,8 @@ void i915_vma_resource_unhold(struct i915_vma_resource *vma_res,struct i915_vma_resource *i915_vma_resource_alloc (void ); +void i915_vma_resource_free (struct i915_vma_resource *vma_res); +struct dma_fence *i915_vma_resource_unbind (struct i915_vma_resource *vma_res);void __i915_vma_resource_init (struct i915_vma_resource *vma_res);@@ -119,10 +142,12 @@ static inline void i915_vma_resource_put(struct i915_vma_resource *vma_res)/** * i915_vma_resource_init - Initialize a vma resource. * @vma_res: The vma resource to initialize +* @vm: Pointer to the vm. * @pages: The pages sg-table. * @page_sizes: Page sizes of the pages. * @readonly: Whether the vma should be bound read-only. * @lmem: Whether the vma points to lmem. +* @ops: The backend ops. * @private: Bind backend private info. * @start: Offset into the address space of bind range start. * @node_size: Size of the allocated range manager node. @@ -134,20 +159,24 @@ static inline void i915_vma_resource_put(struct i915_vma_resource *vma_res)* allocation is not allowed. */ static inline void i915_vma_resource_init (struct i915_vma_resource *vma_res, +struct i915_address_space *vm,struct sg_table *pages,const struct i915_page_sizes *page_sizes,bool readonly,bool lmem, +const struct i915_vma_ops *ops,void *private,u64 start,u64 node_size,u64 size) {__i915_vma_resource_init (vma_res); + vma_res->vm = vm; vma_res->bi.pages = pages; vma_res->bi.page_sizes = *page_sizes; vma_res->bi.readonly = readonly; vma_res->bi.lmem = lmem; + vma_res->ops = ops; vma_res->private = private; vma_res->start = start; vma_res->node_size = node_size;@@ -157,6 +186,25 @@ static inline void i915_vma_resource_init(struct i915_vma_resource *vma_res,static inline void i915_vma_resource_fini (struct i915_vma_resource *vma_res) {GEM_BUG_ON (refcount_read (&vma_res->hold_count) !=1 ); +i915_sw_fence_fini (&vma_res->chain); } +int i915_vma_resource_bind_dep_sync (struct i915_address_space *vm, +u64 first, +u64 last, +bool intr); + +int i915_vma_resource_bind_dep_await (struct i915_address_space *vm, +struct i915_sw_fence *sw_fence, +u64 first, +u64 last, +bool intr, +gfp_t gfp); + +void i915_vma_resource_bind_dep_sync_all (struct i915_address_space *vm); + +void i915_vma_resource_module_exit (void ); + +int i915_vma_resource_module_init (void ); +#endif
Re: [Intel-gfx] [PATCH v7 4/6] drm/i915: Use vma resources for async unbinding
Hi,
Quoted 365 lines · Robert Beckett
Quoted 353 lines · Thomas Hellström
Implement async (non-blocking) unbinding by not syncing the vma before
calling unbind on thevma_resource.
Add the resulting unbind fence to the object'sdma_resvfrom where it is
picked up by the ttm migration code.
Ideally these unbind fences should be coalesced with the migration blit
fence to avoid stalling the migration blit waiting for unbind, as they
can certainly go on in parallel, but since we don't yet have a reasonable data structure to use to coalesce fences and attach the resulting fence to a timeline, we defer that for now.Note that with async unbinding, even while the unbind waits for the preceding bind to complete before unbinding, the vma itself might have been
destroyed in the process, clearing the vma pages. Therefore we can only allow async unbinding if we have a refcounted sg-list and keep a
refcount on that for the vma resource pages to stay intact until binding occurs. If this condition is not met, a request for an async
unbind is diverted to a sync unbind.v2:
- Use a separatekmem_cachefor vma resources for now to isolate their
memory allocation and aid debugging.
- Move the check for vm closed to the actual unbinding thread. Regardless
of whether the vm is closed, we need the unbind fence to properly wait
for capture.
- Clearvma_res::vmon unbind and update its documentation. v4:
- Take cache coloring into account when searching for vma resources pending unbind. (Matthew Auld)
v5:
- Fix timeout and error check ini915_vma_resource_bind_dep_await().
- Avoid taking a reference on the object for async binding if async unbind capable.
- Fix braces around a single-line if statement.
v6:
- Fix up the cache coloring adjustment. (Kernel test robot <[email protected]>)
- Don't allow async unbinding if thevma_respages are not the same as
the object pages. (Matthew Auld)
v7:
- s/unsigned long/u64/ in a number of places (Matthew Auld)Signed-off-by Thomas Hellström <[email protected]>Reviewed-by Matthew Auld <[email protected]>---
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c| 11 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +- drivers/gpu/drm/i915/gt/intel_gtt.c | 4 + drivers/gpu/drm/i915/gt/intel_gtt.h | 3 + drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 12 +- drivers/gpu/drm/i915/i915_module.c | 3 + drivers/gpu/drm/i915/i915_vma.c | 205 +++++++++-- drivers/gpu/drm/i915/i915_vma.h | 3 +- drivers/gpu/drm/i915/i915_vma_resource.c | 354
+++++++++++++++++--
drivers/gpu/drm/i915/i915_vma_resource.h | 48 +++11 files changed, 579 insertions(+), 67 deletions(-)drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +0
-0@@ -142,7 +142,16 @@ int i915_ttm_move_notify(struct ttm_buffer_object *bo) struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo); int ret;
- ret =i915_gem_object_unbind(obj, I915_GEM_OBJECT_UNBIND_ACTIVE);
+ /*
+ * Note: The async unbinding here will actually transform the
+ * blocking wait for unbind into a wait before finally submitting
+ * evict / migration blit and thus stall the migration timeline
+ * which may not be good for overall throughput. We should make
+ * sure we await the unbind fences *after* the migration blit
+ * instead of *before* as we currently do.
+ */
+ ret = i915_gem_object_unbind(obj,I915_GEM_OBJECT_UNBIND_ACTIVE|
+I915_GEM_OBJECT_UNBIND_ASYNC); if (ret)
return ret;drivers/gpu/drm/i915/gt/intel_ggtt.c +0
-0@@ -142,7 +142,7 @@ void i915_ggtt_suspend_vm(struct i915_address_space *vm) continue;
if (!i915_vma_is_bound(vma,I915_VMA_GLOBAL_BIND)) {
- __i915_vma_evict(vma);
+ __i915_vma_evict(vma, false);drm_mm_remove_node(&vma->node); }
}drivers/gpu/drm/i915/gt/intel_gtt.c +0
-0@@ -161,6 +161,9 @@ static void __i915_vm_release(struct work_struct *work)struct
i915_address_space*vm =container_of(work, struct i915_address_space, release_work);
+ /* Synchronize async unbinds. */
+ i915_vma_resource_bind_dep_sync_all(vm);
+
vm->cleanup(vm);i915_address_space_fini(vm);drivers/gpu/drm/i915/gt/intel_gtt.c +0
-0@@ -189,6 +192,7 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass) if (!kref_read(&vm->resv_ref)) kref_init(&vm->resv_ref);
+ vm->pending_unbind =RB_ROOT_CACHED;INIT_WORK(&vm->release_work, __i915_vm_release);atomic_set(&vm->open, 1);drivers/gpu/drm/i915/gt/intel_gtt.h +0
-0@@ -265,6 +265,9 @@ struct i915_address_space { /* Flags used when creating page-table objects for this vm */ unsigned long lmem_pt_obj_flags;
+ /* Interval tree for pending unbind vma resources */ + structrb_root_cachedpending_unbind;
+
structdrm_i915_gem_object* (*alloc_pt_dma)(structi915_address_space*vm, int sz);
structdrm_i915_gem_object*drivers/gpu/drm/i915/i915_drv.h +1
-0@@ -1661,6 +1661,7 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj, #define I915_GEM_OBJECT_UNBIND_BARRIER BIT(1) #define I915_GEM_OBJECT_UNBIND_TEST BIT(2) #define I915_GEM_OBJECT_UNBIND_VM_TRYLOCK BIT(3) +#define I915_GEM_OBJECT_UNBIND_ASYNC BIT(4)
voidi915_gem_runtime_suspend(struct drm_i915_private *dev_priv);drivers/gpu/drm/i915/i915_gem.c +0
-0@@ -157,10 +157,16 @@ int i915_gem_object_unbind(structdrm_i915_gem_object *obj, spin_unlock(&obj->vma.lock);
if (vma) {
+ boolvm_trylock= !!(flags &I915_GEM_OBJECT_UNBIND_VM_TRYLOCK);
ret =-EBUSY;
- if (flags &I915_GEM_OBJECT_UNBIND_ACTIVE||
- !i915_vma_is_active(vma)) { - if (flags &I915_GEM_OBJECT_UNBIND_VM_TRYLOCK) {
+ if (flags &I915_GEM_OBJECT_UNBIND_ASYNC) { + assert_object_held(vma->obj); + ret =i915_vma_unbind_async(vma, vm_trylock);
+ }
+
+ if (ret ==-EBUSY&& (flags &I915_GEM_OBJECT_UNBIND_ACTIVE||
+
!i915_vma_is_active(vma))) {
+ if (vm_trylock) {
if (mutex_trylock(&vma->vm-Quoted 1 line
mutex)) {
ret =
__i915_vma_unbind(vma);
mutex_unlock(&vma-Quoted 1 line
vm->mutex);drivers/gpu/drm/i915/i915_module.c +1
-0@@ -17,6 +17,7 @@ #include "i915_scheduler.h" #include "i915_selftest.h" #include "i915_vma.h" +#include "i915_vma_resource.h"
static inti915_check_nomodeset(void)
{drivers/gpu/drm/i915/i915_module.c +2
-0@@ -64,6 +65,8 @@ static const struct { .exit = i915_scheduler_module_exit }, { .init = i915_vma_module_init, .exit = i915_vma_module_exit }, + { .init = i915_vma_resource_module_init, + .exit = i915_vma_resource_module_exit }, { .init = i915_mock_selftests }, { .init = i915_pmu_init, .exit = i915_pmu_exit },drivers/gpu/drm/i915/i915_vma.c +6
-2@@ -286,9 +286,10 @@ struct i915_vma_work { struct dma_fence_work base; struct i915_address_space *vm; struct i915_vm_pt_stash stash; - struct i915_vma *vma; + struct i915_vma_resource *vma_res; struct drm_i915_gem_object *pinned; struct i915_sw_dma_fence_cb cb; + struct i915_refct_sgt *rsgt; enum i915_cache_level cache_level; unsigned int flags; };@@ -296,10 +297,11 @@ struct i915_vma_work { static void __vma_bind(struct dma_fence_work *work) { struct i915_vma_work *vw = container_of(work, typeof(*vw), base); - struct i915_vma *vma = vw->vma; + struct i915_vma_resource *vma_res = vw->vma_res; + + vma_res->ops->bind_vma(vma_res->vm, &vw->stash, + vma_res, vw->cache_level, vw- >flags);
- vma->ops->bind_vma(vw->vm,&vw->stash,
-vma->resource,vw->cache_level, vw-Quoted 1 line
flags);
}
static void__vma_release(struct dma_fence_work *work)drivers/gpu/drm/i915/i915_vma.c +0
-0@@ -311,6 +313,10 @@ static void __vma_release(struct dma_fence_work *work)
i915_vm_free_pt_stash(vw->vm,&vw->stash);i915_vm_put(vw->vm);
+ if (vw->vma_res)
+ i915_vma_resource_put(vw->vma_res); + if (vw->rsgt)
+ i915_refct_sgt_put(vw->rsgt); }
static const structdma_fence_work_opsbind_ops= {drivers/gpu/drm/i915/i915_vma.c +0
-0@@ -380,13 +386,11 @@ i915_vma_resource_init_from_vma(struct i915_vma_resource *vma_res, { struct drm_i915_gem_object *obj = vma->obj;
- i915_vma_resource_init(vma_res,vma->pages, &vma-Quoted 1 line
page_sizes,+ i915_vma_resource_init(vma_res,
vma->vm,vma->pages, &vma-Quoted 1 line
page_sizes,
i915_gem_object_is_readonly(obj),i915_gem_object_is_lmem(obj), -vma->private,
-vma->node.start,
-vma->node.size,
-vma->size);
+vma->ops,vma->private, vma-Quoted 1 line
node.start,
+
vma->node.size,vma->size); }
/**drivers/gpu/drm/i915/i915_vma.c +1
-0@@ -410,6 +414,7 @@ int i915_vma_bind(struct i915_vma *vma, { u32 bind_flags; u32 vma_flags; + int ret;
lockdep_assert_held(&vma->vm->mutex); GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));drivers/gpu/drm/i915/i915_vma.c +1
-1@@ -418,12 +423,12 @@ int i915_vma_bind(struct i915_vma *vma, if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start, vma->node.size, vma->vm->total))) { - kfree(vma_res); + i915_vma_resource_free(vma_res); return -ENODEV; }
if (GEM_DEBUG_WARN_ON(!flags)) {
- kfree(vma_res);
+ i915_vma_resource_free(vma_res);
return-EINVAL;
}drivers/gpu/drm/i915/i915_vma.c +0
-0@@ -435,12 +440,30 @@ int i915_vma_bind(struct i915_vma *vma,
bind_flags &= ~vma_flags;
if (bind_flags== 0) {
- kfree(vma_res);
+ i915_vma_resource_free(vma_res); return 0;
}
GEM_BUG_ON(!atomic_read(&vma->pages_count));
+ /* Wait for or await async unbinds touching our range */ + if (work &&bind_flags&vma->vm->bind_async_flags) + ret = i915_vma_resource_bind_dep_await(vma->vm, + &work-Quoted 1 line
base.chain,
+ vma-
Quoted 1 line
node.start,
+ vma-
Quoted 1 line
node.size,
+ true, +
GFP_NOWAIT| +__GFP_RETRY_MAYFAIL|
+__GFP_NOWARN);
+ else
+ ret = i915_vma_resource_bind_dep_sync(vma->vm, vma-Quoted 1 line
node.start,
+ vma-
Quoted 1 line
node.size, true);
Quoted 8 lines
+ if (ret) {
+ i915_vma_resource_free(vma_res);
+ return ret;
+ }
+
if (vma->resource|| !vma_res) {
/* Rebinding with an additional I915_VMA_*_BIND */GEM_WARN_ON(!vma_flags);
Quoted 4 lines
You missed an extra
kfree(vma_res)on the next line from here (not in
patch context), which would presumably need to bei915_vma_resource_free(vma_res)
It should, thanks. I see I've missed that in an error path as well, as you mention below.
Quoted 6 lines
Further to that, you are freeing it where it can already be known to be
null, which, while relying on known zero side effect of double free will
work, looks very unintuitive.
This stems from NULL checking before kfree() is typically not done. IIRC even checkpatch.pl warns if doing that, but with transition to kmem_cache_free() that doesn't hold anymore so I need to fix this up.
Quoted 5 lines
Firther to that, once this series is applied,
i915_vma_bindonly appears to be called fromeb_relocate_entry()withvma_resalways null, and fromi915_vma_pin_ww()where it allocatesvma_res.
Quoted 8 lines
It would be much cleaner to just allocate the
vma_resini915_vma_bindif required. That way it will avoid the null asignment
on return toi915_vma_pin_wwwith the equally unintuitivekfree(vma_res)during the error fallthrough path at the end ofi915_vma_pin_wwon a knowingly null pointer (also that would need to
be ai915_vma_resource_freeif you keep it the way it is).
We can't allocate (GFP_KERNEL) under the vm mutex, hence need to pass it as an argument.
Thanks,
Thomas