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pinctrl: intel: Fix a glitch when updating IRQ flags on a preconfigured line

PATCH Grace Kao 3 participants 3 messages Jan 21, 2022 – Jan 24, 2022 1 message not in the archive

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Grace Kao

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#1 lore raw

From: Andy Shevchenko <[email protected]>

The commit af7e3eeb84e2 ("pinctrl: intel: Disable input and output buffer when switching to GPIO") hadn't taken into account an update of the IRQ flags scenario.

When updating the IRQ flags on the preconfigured line the ->irq_set_type() is called again. In such case the sequential Rx buffer configuration changes may trigger a falling or rising edge interrupt that may lead, on some platforms, to an undesired event.

This may happen because each of intel_gpio_set_gpio_mode() and __intel_gpio_set_direction() updates the pad configuration with a different value of the GPIORXDIS bit. Notable, that the intel_gpio_set_gpio_mode() is called only for the pads that are configured as an input. Due to this fact, integrate the logic of __intel_gpio_set_direction() call into the intel_gpio_set_gpio_mode() so that the Rx buffer won't be disabled and immediately re-enabled.

Fixes af7e3eeb84e2 ("pinctrl: intel: Disable input and output buffer when switching to GPIO")
Change-Id I6ff5cf0c42a76dce709a445c1820c8f3a84d6d89
---
 drivers/pinctrl/intel/pinctrl-intel.c | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)
drivers/pinctrl/intel/pinctrl-intel.c +2 -8
index 85750974d182..afd35e6999cc 100644
@@ -451,8 +451,8 @@ static void intel_gpio_set_gpio_mode(void __iomem *padcfg0)
 	value &= ~PADCFG0_PMODE_MASK;
 	value |= PADCFG0_PMODE_GPIO;
 
-	/* Disable input and output buffers */
-	value |= PADCFG0_GPIORXDIS;
+	/* Disable TX buffer and enable RX (this will be input) */
+	value &= ~PADCFG0_GPIORXDIS;
 	value |= PADCFG0_GPIOTXDIS;
 
 	/* Disable SCI/SMI/NMI generation */
@@ -497,9 +497,6 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
 
 	intel_gpio_set_gpio_mode(padcfg0);
 
-	/* Disable TX buffer and enable RX (this will be input) */
-	__intel_gpio_set_direction(padcfg0, true);
-
 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
 
 	return 0;
@@ -1115,9 +1112,6 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned int type)
 
 	intel_gpio_set_gpio_mode(reg);
 
-	/* Disable TX buffer and enable RX (this will be input) */
-	__intel_gpio_set_direction(reg, true);
-
 	value = readl(reg);
 
 	value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV);
Signature · 1 line
2.17.1
#2 lore raw
Quoted 1 line · Grace Kao

Thanks for testing. I will apply the tag to the original patch. The idea that you simply reply to the original message with the line above and that's it, no need to resend a full patch.

Quoted 1 line

Change-Id: I6ff5cf0c42a76dce709a445c1820c8f3a84d6d89

I see it comes from the internal tree.

Signature · 2 lines
With Best Regards,
Andy Shevchenko
#3 lore raw
Quoted 11 lines · Andy Shevchenko
Quoted 1 line · Grace Kao

Thanks for testing. I will apply the tag to the original patch. The idea that you simply reply to the original message with the line above and that's it, no need to resend a full patch.

Quoted 1 line

Change-Id: I6ff5cf0c42a76dce709a445c1820c8f3a84d6d89

I see it comes from the internal tree.

Original patch with your tag has been pushed to my review and testing queue, thanks!

Signature · 2 lines
With Best Regards,
Andy Shevchenko