Add support for LPASS Core and Audio Clock for SC7280
v3 cover Add support for LPASS Core and Audio Clock for SC7280
[v3]
* Fix 'pm_clk_suspend' expansion warning in lpass_audio_cc_sc7280_probe and lpass_aon_cc_sc7280_probe.
* Update the vco table frequencies.
* Update 'regmap_config' name for all clock controllers.
* Fix the missing 'const' for clk_init_data.
* Update the binding for 'lpass_aon' CC.
[v2]
* Drop code for "Add support for clock voting from GDSC" from drivers/clk/qcom/gdsc.c
* Add support for runtime PM get/put from clk_summary.
* Update commit message for PLL detect lock timeout increase.
* Fix documentation bindings errors reported by DT_CHECKER_FLAGS.
* Update the driver code to take care of the following
- KCONFIG to add "select QCOM_GDSC"
- Use of "const" for pll_vco and clk_init_data
- Use of index instead of fw_name.
- Fix extra space, remove 'lpass_create_pm_clks' and corresponding code.
- cleanup 'lpass_hm_core_probe' and 'lpass_hm_sc7280_match_table'.
[v1]
This patchset supports the following.
- Few PLLs might require to a higher time to detect lock, thus increase the polling time.
- GDSC which require clocks to be explicitly enabled before access.
- LPASS core and audio clock driver support for SC7280.
Taniya Das (2):
dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
clk: qcom: lpass: Add support for LPASS clock controller for SC7280
.../clock/qcom,sc7280-lpasscorecc.yaml | 172 ++++ drivers/clk/qcom/Kconfig | 10 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/lpassaudiocc-sc7280.c | 837 ++++++++++++++++++ drivers/clk/qcom/lpasscorecc-sc7280.c | 430 +++++++++ .../clock/qcom,lpassaudiocc-sc7280.h | 43 + .../clock/qcom,lpasscorecc-sc7280.h | 26 + 7 files changed, 1519 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml create mode 100644 drivers/clk/qcom/lpassaudiocc-sc7280.c create mode 100644 drivers/clk/qcom/lpasscorecc-sc7280.c create mode 100644 include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h create mode 100644 include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h
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Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v3 1/2 dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic properties that are needed in a device tree. Also add clock ids for LPASS core clocks and audio clock IDs for LPASS client to request for the clocks.
--- .../clock/qcom,sc7280-lpasscorecc.yaml | 172 ++++++++++++++++++ .../clock/qcom,lpassaudiocc-sc7280.h | 43 +++++ .../clock/qcom,lpasscorecc-sc7280.h | 26 +++ 3 files changed, 241 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml create mode 100644 include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h create mode 100644 include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h
Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml new file +172 -0
@@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm LPASS Core & Audio Clock Controller Binding for SC7280 + +maintainers: + - Taniya Das <[email protected]> + +description: | + Qualcomm LPASS core and audio clock control module which supports the + clocks and power domains on SC7280. + + See also: + - dt-bindings/clock/qcom,lpasscorecc-sc7280.h + - dt-bindings/clock/qcom,lpassaudiocc-sc7280.h + +properties: + clocks: true + + clock-names: true + + compatible: + enum: + - qcom,sc7280-lpassaoncc + - qcom,sc7280-lpassaudiocc + - qcom,sc7280-lpasscorecc + - qcom,sc7280-lpasshm + + power-domains: + maxItems: 1 + + '#clock-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#power-domain-cells' + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: qcom,sc7280-lpassaudiocc + + then: + properties: + clocks: + items: + - description: Board XO source + - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC + + clock-names: + items: + - const: bi_tcxo + - const: lpass_aon_cc_main_rcg_clk_src + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7280-lpassaoncc + + then: + properties: + clocks: + items: + - description: Board XO source + - description: Board XO active only source + - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC + + clock-names: + items: + - const: bi_tcxo + - const: bi_tcxo_ao + - const: iface + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7280-lpasshm + - qcom,sc7280-lpasscorecc + + then: + properties: + clocks: + items: + - description: Board XO source + + clock-names: + items: + - const: bi_tcxo + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> + #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> + lpass_audiocc: clock-controller@3300000 { + compatible = "qcom,sc7280-lpassaudiocc"; + reg = <0x3300000 0x30000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>; + clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src"; + power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> + #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> + lpass_hm: clock-controller@3c00000 { + compatible = "qcom,sc7280-lpasshm"; + reg = <0x3c00000 0x28>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> + #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> + lpasscore: clock-controller@3900000 { + compatible = "qcom,sc7280-lpasscorecc"; + reg = <0x3900000 0x50000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/clock/qcom,gcc-sc7280.h> + #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> + #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> + lpass_aon: clock-controller@3380000 { + compatible = "qcom,sc7280-lpassaoncc"; + reg = <0x3380000 0x30000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, + <&lpasscore LPASS_CORE_CC_CORE_CLK>; + clock-names = "bi_tcxo", "bi_tcxo_ao","iface"; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + +...
include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h new file +43 -0
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include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h new file +26 -0
@@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* +* Copyright (c) 2021, The Linux Foundation. All rights reserved. +*/ + +#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H +#define _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H + +/* LPASS_CORE_CC clocks */ +#define LPASS_CORE_CC_DIG_PLL 0 +#define LPASS_CORE_CC_DIG_PLL_OUT_MAIN_DIV_CLK_SRC 1 +#define LPASS_CORE_CC_DIG_PLL_OUT_ODD 2 +#define LPASS_CORE_CC_CORE_CLK 3 +#define LPASS_CORE_CC_CORE_CLK_SRC 4 +#define LPASS_CORE_CC_EXT_IF0_CLK_SRC 5 +#define LPASS_CORE_CC_EXT_IF0_IBIT_CLK 6 +#define LPASS_CORE_CC_EXT_IF1_CLK_SRC 7 +#define LPASS_CORE_CC_EXT_IF1_IBIT_CLK 8 +#define LPASS_CORE_CC_LPM_CORE_CLK 9 +#define LPASS_CORE_CC_LPM_MEM0_CORE_CLK 10 +#define LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK 11 + +/* LPASS_CORE_CC power domains */ +#define LPASS_CORE_CC_LPASS_CORE_HM_GDSC 0 + +#endif
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Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
PATCH v3 2/2 clk: qcom: lpass: Add support for LPASS clock controller for SC7280
In reply to Taniya DasThe Low Power Audio subsystem core and audio clocks are required for Audio client to be able to request for the clocks and power domains.
--- drivers/clk/qcom/Kconfig | 10 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/lpassaudiocc-sc7280.c | 837 +++++++++++++++++++++++++ drivers/clk/qcom/lpasscorecc-sc7280.c | 430 +++++++++++++ 4 files changed, 1278 insertions(+) create mode 100644 drivers/clk/qcom/lpassaudiocc-sc7280.c create mode 100644 drivers/clk/qcom/lpasscorecc-sc7280.c
drivers/clk/qcom/Kconfig +10 -0
@@ -443,6 +443,16 @@ config SC_LPASS_CORECC_7180 Say Y if you want to use LPASS clocks and power domains of the LPASS core clock controller. +config SC_LPASS_CORECC_7280 + tristate "SC7280 LPASS Core & Audio Clock Controller" + select SC_GCC_7280 + select QCOM_GDSC + help + Support for the LPASS(Low Power Audio Subsystem) core and audio clock + controller on SC7280 devices. + Say Y if you want to use LPASS clocks and power domains of the LPASS + core clock controller. + config SC_MSS_7180 tristate "SC7180 Modem Clock Controller" select SC_GCC_7180
drivers/clk/qcom/Makefile +1 -0
@@ -70,6 +70,7 @@ obj-$(CONFIG_SC_GPUCC_7180) += gpucc-sc7180.o obj-$(CONFIG_SC_GPUCC_7280) += gpucc-sc7280.o obj-$(CONFIG_SC_LPASSCC_7280) += lpasscc-sc7280.o obj-$(CONFIG_SC_LPASS_CORECC_7180) += lpasscorecc-sc7180.o +obj-$(CONFIG_SC_LPASS_CORECC_7280) += lpasscorecc-sc7280.o lpassaudiocc-sc7280.o obj-$(CONFIG_SC_MSS_7180) += mss-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7180) += videocc-sc7180.o obj-$(CONFIG_SC_VIDEOCC_7280) += videocc-sc7280.o
drivers/clk/qcom/lpassaudiocc-sc7280.c new file +837 -0
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drivers/clk/qcom/lpasscorecc-sc7280.c new file +430 -0
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Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.
Stephen Boyd
maintainerRe: [PATCH v3 2/2] clk: qcom: lpass: Add support for LPASS clock controller for SC7280
Quoting Taniya Das (2022-01-24 08:24:42)
Quoted 6 lines
drivers/clk/qcom/lpasscorecc-sc7280.c new file +0
-0
drivers/clk/qcom/lpasscorecc-sc7280.c line 10
Quoted 10 lines
drivers/clk/qcom/lpasscorecc-sc7280.c new file +10
-0@@ -0,0 +1,430 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +* Copyright (c) 2021, The Linux Foundation. All rights reserved. +*/ + +#include <linux/clk-provider.h> +#include <linux/err.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/of.h>
Is the of.h include used?
Quoted 14 lines
drivers/clk/qcom/lpasscorecc-sc7280.c new file +14
-0+#include <linux/pm_clock.h> +#include <linux/pm_runtime.h> +#include <linux/regmap.h> + +#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> + +#include "clk-alpha-pll.h" +#include "clk-branch.h" +#include "clk-rcg.h" +#include "clk-regmap.h" +#include "clk-regmap-divider.h" +#include "common.h" +#include "gdsc.h" +
[...]
drivers/clk/qcom/lpasscorecc-sc7280.c line 336
Quoted 6 lines
drivers/clk/qcom/lpasscorecc-sc7280.c new file +6
-0+ +static struct regmap_config lpass_core_cc_sc7280_regmap_config = { + .reg_bits =32 , + .reg_stride =4 , + .val_bits =32 , + .fast_io = true,
What's the max_register? Please set it so that debugfs works.