drm/amdgpu: Set a suitable dev_info.gart_page_size
Subsystems (3)
PATCH 1/1 drm/amdgpu: Set a suitable dev_info.gart_page_size
From: Huacai Chen <[email protected]>
commit f4d3da72a76a9ce5f57bba64788931686a9dc333 upstream.
In Mesa, dev_info.gart_page_size is used for alignment and it was set to AMDGPU_GPU_PAGE_SIZE(4KB). However, the page table of AMDGPU driver requires an alignment on CPU pages. So, for non-4KB page system, gart_page_size should be max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE).
[Xi: rebased for drm-next, use max_t for checkpatch,
and reworded commit message.]
[Salvatore Bonaccorso: Backport to 5.10.y which does not contain a5a52a43eac0 ("drm/amd/amdgpu/amdgpu_kms: Remove 'struct drm_amdgpu_info_device dev_info' from the stack") which removes dev_info from the stack and places it on the heap.]
--- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +2 -2
@@ -766,9 +766,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file dev_info.high_va_offset =AMDGPU_GMC_HOLE_END ; dev_info.high_va_max =AMDGPU_GMC_HOLE_END | vm_size; } - dev_info.virtual_address_alignment =max ((int )PAGE_SIZE ,AMDGPU_GPU_PAGE_SIZE ); + dev_info.virtual_address_alignment =max_t (u32,PAGE_SIZE ,AMDGPU_GPU_PAGE_SIZE ); dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) *AMDGPU_GPU_PAGE_SIZE ; - dev_info.gart_page_size =AMDGPU_GPU_PAGE_SIZE ; + dev_info.gart_page_size =max_t (u32,PAGE_SIZE ,AMDGPU_GPU_PAGE_SIZE ); dev_info.cu_active_number = adev->gfx.cu_info.number; dev_info.cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; dev_info.ce_ram_size = adev->gfx.ce_ram_size;
Signature · 1 line
2.34.1
Am 09.02.22 um 21:16 schrieb Salvatore Bonaccorso:
Quoted 19 lines
From: Huacai Chen <[email protected]>
commit
f4d3da72a76a9ce5f57bba64788931686a9dc333upstream.In Mesa, dev_info.gart_page_size is used for alignment and it was set to
AMDGPU_GPU_PAGE_SIZE(4KB). However, the page table of AMDGPU driver requires an alignment on CPU pages. So, for non-4KB page system,gart_page_sizeshould bemax_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE).Signed-off-by Rui Wang <[email protected]>Signed-off-by Huacai Chen <[email protected]>[Xi: rebased for drm-next, use
max_tfor checkpatch,
and reworded commit message.]Signed-off-by Xi Ruoyao <[email protected]>Tested-by Dan Horák <[email protected]>Reviewed-by Christian König <[email protected]>Signed-off-by Alex Deucher <[email protected]>
Quoted 6 lines
[Salvatore Bonaccorso: Backport to 5.10.y which does not contain
a5a52a43eac0("drm/amd/amdgpu/amdgpu_kms: Remove 'structdrm_amdgpu_info_devicedev_info' from the stack") which removesdev_infofrom the stack and places it on the heap.]Tested-by Timothy Pearson <[email protected]>Signed-off-by Salvatore Bonaccorso <[email protected]>
Quoted 20 lines
--- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +2
-2@@ -766,9 +766,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file dev_info.high_va_offset =AMDGPU_GMC_HOLE_END ; dev_info.high_va_max =AMDGPU_GMC_HOLE_END | vm_size; } - dev_info.virtual_address_alignment =max ((int )PAGE_SIZE ,AMDGPU_GPU_PAGE_SIZE ); + dev_info.virtual_address_alignment =max_t (u32,PAGE_SIZE ,AMDGPU_GPU_PAGE_SIZE ); dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) *AMDGPU_GPU_PAGE_SIZE ; - dev_info.gart_page_size =AMDGPU_GPU_PAGE_SIZE ; + dev_info.gart_page_size =max_t (u32,PAGE_SIZE ,AMDGPU_GPU_PAGE_SIZE ); dev_info.cu_active_number = adev->gfx.cu_info.number; dev_info.cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; dev_info.ce_ram_size = adev->gfx.ce_ram_size;