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KVM: arm64: Handle host stage-2 faults from 32-bit EL0

PATCH Applied Will Deacon 2 participants 2 messages Apr 27, 2022 – Apr 28, 2022

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Will Deacon

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PATCH 1/1 KVM: arm64: Handle host stage-2 faults from 32-bit EL0

When pKVM is enabled, host memory accesses are translated by an identity mapping at stage-2, which is populated lazily in response to synchronous exceptions from 64-bit EL1 and EL0.

Extend this handling to cover exceptions originating from 32-bit EL0 as well. Although these are very unlikely to occur in practice, as the kernel typically ensures that user pages are initialised before mapping them in, drivers could still map previously untouched device pages into userspace and expect things to work rather than panic the system.

Cc Quentin Perret <[email protected]>
Cc Marc Zyngier <[email protected]>
---
 arch/arm64/kvm/hyp/nvhe/host.S | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)
arch/arm64/kvm/hyp/nvhe/host.S +9 -9
index 3d613e721a75..727c979b2b69 100644
@@ -198,15 +198,15 @@ SYM_CODE_START(__kvm_hyp_host_vector)
 	invalid_host_el2_vect			// FIQ EL2h
 	invalid_host_el2_vect			// Error EL2h
 
-	host_el1_sync_vect			// Synchronous 64-bit EL1
-	invalid_host_el1_vect			// IRQ 64-bit EL1
-	invalid_host_el1_vect			// FIQ 64-bit EL1
-	invalid_host_el1_vect			// Error 64-bit EL1
-
-	invalid_host_el1_vect			// Synchronous 32-bit EL1
-	invalid_host_el1_vect			// IRQ 32-bit EL1
-	invalid_host_el1_vect			// FIQ 32-bit EL1
-	invalid_host_el1_vect			// Error 32-bit EL1
+	host_el1_sync_vect			// Synchronous 64-bit EL1/EL0
+	invalid_host_el1_vect			// IRQ 64-bit EL1/EL0
+	invalid_host_el1_vect			// FIQ 64-bit EL1/EL0
+	invalid_host_el1_vect			// Error 64-bit EL1/EL0
+
+	host_el1_sync_vect			// Synchronous 32-bit EL1/EL0
+	invalid_host_el1_vect			// IRQ 32-bit EL1/EL0
+	invalid_host_el1_vect			// FIQ 32-bit EL1/EL0
+	invalid_host_el1_vect			// Error 32-bit EL1/EL0
 SYM_CODE_END(__kvm_hyp_host_vector)
 
 /*
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#1 lore raw
Quoted 9 lines · Will Deacon

When pKVM is enabled, host memory accesses are translated by an identity mapping at stage-2, which is populated lazily in response to synchronous exceptions from 64-bit EL1 and EL0.

Extend this handling to cover exceptions originating from 32-bit EL0 as well. Although these are very unlikely to occur in practice, as the kernel typically ensures that user pages are initialised before mapping them in, drivers could still map previously untouched device pages into userspace and expect things to work rather than panic the system.

Applied to fixes, thanks!

[1/1] KVM: arm64: Handle host stage-2 faults from 32-bit EL0

      commit: 2a50fc5fd09798cc154b587acd4f4ee261ea19be

Cheers,

	M.
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Without deviation from the norm, progress is not possible.


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