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ARM: rockchip: fix iodomain for r2pro V1.0

urgent Applied Frank Wunderlich 3 participants 4 messages May 14, 2022 – May 16, 2022

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Arm (32-bit) Arm sub-architectures Arm Rockchip Arm/actions semi architecture
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#0 lore raw

From: Frank Wunderlich <[email protected]>

Current code sets vccio4 and vccio6 both to 1v8. R2Pro v1.0 needs 3v3 setting on vccio4, else gmac0 (switch for lan-ports) will be damaged.

IO-domain is per default 3v3 so only vccio6 needs to be set to 1v8 and clear this bit in the 3v3 register.

Fixes 8ba96c5942d6 ("ARM: rockchip: add BPI-R2-Pro V00 board")
Signed-off-by Frank Wunderlich <[email protected]>
---
 arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c | 9 ++++++---
 arch/arm/mach-rockchip/include/mach/rockchip.h       | 3 +++
 2 files changed, 9 insertions(+), 3 deletions(-)
arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c +6 -3
index 4c5b4751b3fb..2a6e0700233a 100644
@@ -17,10 +17,13 @@ static noinline void rk3568_start(void *fdt_blob_fixed_offset)
 	void *fdt;
 
 	/*
-	 * Enable vccio4 1.8V and vccio6 1.8V
-	 * Needed for GMAC to work.
+	 * set iodomain vccio6 to 1.8V needed for GMAC1 to work.
+	 * vccio4 (gmac0/switch) needs to stay at 3v3 (default)
 	 */
-	writel(RK_SETBITS(0x50), 0xfdc20140);
+	//set bit 6 in PMU_GRF_IO_VSEL0 for vccio6 1v8
+	writel(RK_SETBITS(BIT(6)), PMU_GRF_IO_VSEL0);
+	//clear bit 6 for 3v3 as it was set to 1v8
+	writel(RK_CLRBITS(BIT(6)), PMU_GRF_IO_VSEL1);
 
 	fdt = fdt_blob_fixed_offset;
arch/arm/mach-rockchip/include/mach/rockchip.h +3 -0
index f24db36f0161..ff8b1109f858 100644
@@ -23,6 +23,9 @@ static inline int rk3288_init(void)
 
 #ifdef CONFIG_ARCH_RK3568
 int rk3568_init(void);
+#define PMU_GRF		0xfdc20000
+#define PMU_GRF_IO_VSEL0	(PMU_GRF + 0x140)
+#define PMU_GRF_IO_VSEL1	(PMU_GRF + 0x144)
 #else
 static inline int rk3568_init(void)
 {
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Applied
#1 lore raw
Quoted 8 lines · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Current code sets vccio4 and vccio6 both to 1v8. R2Pro v1.0 needs 3v3 setting on vccio4, else gmac0 (switch for lan-ports) will be damaged.

IO-domain is per default 3v3 so only vccio6 needs to be set to 1v8 and clear this bit in the 3v3 register.

Quoted 6 lines
Fixes 8ba96c5942d6 ("ARM: rockchip: add BPI-R2-Pro V00 board")
Signed-off-by Frank Wunderlich <[email protected]>
---
 arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c | 9 ++++++---
 arch/arm/mach-rockchip/include/mach/rockchip.h       | 3 +++
 2 files changed, 9 insertions(+), 3 deletions(-)

Applied, thanks

Sascha

Quoted 40 lines
arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c +6 -3
index 4c5b4751b3fb..2a6e0700233a 100644
@@ -17,10 +17,13 @@ static noinline void rk3568_start(void *fdt_blob_fixed_offset)
 	void *fdt;
 
 	/*
-	 * Enable vccio4 1.8V and vccio6 1.8V
-	 * Needed for GMAC to work.
+	 * set iodomain vccio6 to 1.8V needed for GMAC1 to work.
+	 * vccio4 (gmac0/switch) needs to stay at 3v3 (default)
 	 */
-	writel(RK_SETBITS(0x50), 0xfdc20140);
+	//set bit 6 in PMU_GRF_IO_VSEL0 for vccio6 1v8
+	writel(RK_SETBITS(BIT(6)), PMU_GRF_IO_VSEL0);
+	//clear bit 6 for 3v3 as it was set to 1v8
+	writel(RK_CLRBITS(BIT(6)), PMU_GRF_IO_VSEL1);
 
 	fdt = fdt_blob_fixed_offset;
arch/arm/mach-rockchip/include/mach/rockchip.h +3 -0
index f24db36f0161..ff8b1109f858 100644
@@ -23,6 +23,9 @@ static inline int rk3288_init(void)
 
 #ifdef CONFIG_ARCH_RK3568
 int rk3568_init(void);
+#define PMU_GRF		0xfdc20000
+#define PMU_GRF_IO_VSEL0	(PMU_GRF + 0x140)
+#define PMU_GRF_IO_VSEL1	(PMU_GRF + 0x144)
 #else
 static inline int rk3568_init(void)
 {
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Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
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#2 lore raw
In reply to Frank Wunderlich
Quoted 4 lines · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Current code sets vccio4 and vccio6 both to 1v8. R2Pro v1.0 needs 3v3 setting on vccio4, else gmac0 (switch for lan-ports) will be damaged.

By damaged you mean physically damaged? How can this happen? Does that mean some input signals are not 3v3 tolerant when the domain is supplied with 1v8?

Sascha

Quoted 50 lines

IO-domain is per default 3v3 so only vccio6 needs to be set to 1v8 and clear this bit in the 3v3 register.

Fixes 8ba96c5942d6 ("ARM: rockchip: add BPI-R2-Pro V00 board")
Signed-off-by Frank Wunderlich <[email protected]>
---
 arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c | 9 ++++++---
 arch/arm/mach-rockchip/include/mach/rockchip.h       | 3 +++
 2 files changed, 9 insertions(+), 3 deletions(-)
arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c +6 -3
index 4c5b4751b3fb..2a6e0700233a 100644
@@ -17,10 +17,13 @@ static noinline void rk3568_start(void *fdt_blob_fixed_offset)
 	void *fdt;
 
 	/*
-	 * Enable vccio4 1.8V and vccio6 1.8V
-	 * Needed for GMAC to work.
+	 * set iodomain vccio6 to 1.8V needed for GMAC1 to work.
+	 * vccio4 (gmac0/switch) needs to stay at 3v3 (default)
 	 */
-	writel(RK_SETBITS(0x50), 0xfdc20140);
+	//set bit 6 in PMU_GRF_IO_VSEL0 for vccio6 1v8
+	writel(RK_SETBITS(BIT(6)), PMU_GRF_IO_VSEL0);
+	//clear bit 6 for 3v3 as it was set to 1v8
+	writel(RK_CLRBITS(BIT(6)), PMU_GRF_IO_VSEL1);
 
 	fdt = fdt_blob_fixed_offset;
arch/arm/mach-rockchip/include/mach/rockchip.h +3 -0
index f24db36f0161..ff8b1109f858 100644
@@ -23,6 +23,9 @@ static inline int rk3288_init(void)
 
 #ifdef CONFIG_ARCH_RK3568
 int rk3568_init(void);
+#define PMU_GRF		0xfdc20000
+#define PMU_GRF_IO_VSEL0	(PMU_GRF + 0x140)
+#define PMU_GRF_IO_VSEL1	(PMU_GRF + 0x144)
 #else
 static inline int rk3568_init(void)
 {
Signature · 1 line
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Signature · 9 lines
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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#3 lore raw

Am 16. Mai 2022 10:41:26 MESZ schrieb Sascha Hauer <[email protected]>:

Quoted 10 lines · Frank Wunderlich
Quoted 4 lines

From: Frank Wunderlich <[email protected]>

Current code sets vccio4 and vccio6 both to 1v8. R2Pro v1.0 needs 3v3 setting on vccio4, else gmac0 (switch for lan-ports) will be damaged.

By damaged you mean physically damaged? How can this happen? Does that mean some input signals are not 3v3 tolerant when the domain is supplied
with 1v8?

Yes, if iodomain is set to 1v8 and board works with 3v3 signals it breaks hardware physically (affected me). I know this for device tree,but did not noticed this direct register write.

Quoted 44 lines

Sascha

Quoted 2 lines

IO-domain is per default 3v3 so only vccio6 needs to be set to 1v8

and

Review

Quoted 10 lines

clear this bit in the 3v3 register.

Fixes 8ba96c5942d6 ("ARM: rockchip: add BPI-R2-Pro V00 board")
Signed-off-by Frank Wunderlich <[email protected]>
---
 arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c | 9 ++++++---
 arch/arm/mach-rockchip/include/mach/rockchip.h       | 3 +++
 2 files changed, 9 insertions(+), 3 deletions(-)
(quoted diff) +0 -0

b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c

arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c static noinline void rk3568_start(void

Quoted 4 lines

index 4c5b4751b3fb..2a6e0700233a 100644

arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c +0 -0
@@ -17,10 +17,13 @@ static noinline void rk3568_start(void

*fdt_blob_fixed_offset)

Review

Quoted 17 lines
arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c +6 -3
 	void *fdt;
 
 	/*
-	 * Enable vccio4 1.8V and vccio6 1.8V
-	 * Needed for GMAC to work.
+	 * set iodomain vccio6 to 1.8V needed for GMAC1 to work.
+	 * vccio4 (gmac0/switch) needs to stay at 3v3 (default)
 	 */
-	writel(RK_SETBITS(0x50), 0xfdc20140);
+	//set bit 6 in PMU_GRF_IO_VSEL0 for vccio6 1v8
+	writel(RK_SETBITS(BIT(6)), PMU_GRF_IO_VSEL0);
+	//clear bit 6 for 3v3 as it was set to 1v8
+	writel(RK_CLRBITS(BIT(6)), PMU_GRF_IO_VSEL1);
 
 	fdt = fdt_blob_fixed_offset;
(quoted diff) +0 -0

b/arch/arm/mach-rockchip/include/mach/rockchip.h

Quoted 5 lines

index f24db36f0161..ff8b1109f858 100644

arch/arm/mach-rockchip/include/mach/rockchip.h +0 -0
@@ -23,6 +23,9 @@ static inline int rk3288_init(void)
Quoted 12 lines
Quoted 12 lines
arch/arm/mach-rockchip/include/mach/rockchip.h +3 -0
 #ifdef CONFIG_ARCH_RK3568
 int rk3568_init(void);
+#define PMU_GRF		0xfdc20000
+#define PMU_GRF_IO_VSEL0	(PMU_GRF + 0x140)
+#define PMU_GRF_IO_VSEL1	(PMU_GRF + 0x144)
 #else
 static inline int rk3568_init(void)
 {
Signature · 1 line
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regards Frank

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