arm64: dts: rockchip: Enable NVM Express PCIe controller on rock3a

Add -regulator suffix to regulator names on Radxa ROCK3 Model A board. This makes the naming more consistent.

Signed-off-by Chukun Pan <[email protected]>

---
 arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +7 -7

index fb87a168fe96..8adf672709e8 100644
@@ -60,7 +60,7 @@ simple-audio-card,codec {
 		};
 	};
 
-	vcc12v_dcin: vcc12v-dcin {
+	vcc12v_dcin: vcc12v-dcin-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc12v_dcin";
 		regulator-always-on;

@@ -79,7 +79,7 @@ vcc3v3_pcie: vcc3v3-pcie-regulator {
 		vin-supply = <&vcc5v0_sys>;
 	};
 
-	vcc3v3_sys: vcc3v3-sys {
+	vcc3v3_sys: vcc3v3-sys-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc3v3_sys";
 		regulator-always-on;

@@ -89,7 +89,7 @@ vcc3v3_sys: vcc3v3-sys {
 		vin-supply = <&vcc12v_dcin>;
 	};
 
-	vcc5v0_sys: vcc5v0-sys {
+	vcc5v0_sys: vcc5v0-sys-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_sys";
 		regulator-always-on;

@@ -99,7 +99,7 @@ vcc5v0_sys: vcc5v0-sys {
 		vin-supply = <&vcc12v_dcin>;
 	};
 
-	vcc5v0_usb: vcc5v0-usb {
+	vcc5v0_usb: vcc5v0-usb-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_usb";
 		regulator-always-on;

@@ -109,7 +109,7 @@ vcc5v0_usb: vcc5v0-usb {
 		vin-supply = <&vcc12v_dcin>;
 	};
 
-	vcc5v0_usb_host: vcc5v0-usb-host {
+	vcc5v0_usb_host: vcc5v0-usb-host-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
 		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;

@@ -144,7 +144,7 @@ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
 		vin-supply = <&vcc5v0_usb>;
 	};
 
-	vcc_cam: vcc-cam {
+	vcc_cam: vcc-cam-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
 		gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;

@@ -160,7 +160,7 @@ regulator-state-mem {
 		};
 	};
 
-	vcc_mipi: vcc-mipi {
+	vcc_mipi: vcc-mipi-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
 		gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;

Distinguish it from the pinctrl label of pcie3x2 added later. Also added comments to the pcie2x1 node.

Signed-off-by Chukun Pan <[email protected]>

---
 arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +0 -0

index 8adf672709e8..1b195355da2a 100644

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +1 -1

 	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
 	vpcie3v3-supply = <&vcc3v3_pcie>;
 	status = "okay";

@@ -582,7 +583,7 @@ pcie_enable_h: pcie-enable-h {
 			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 
-		pcie_reset_h: pcie-reset-h {
+		ngffpcie_reset_h: ngffpcie-reset-h {
 			rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};

Hi,

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts vcc3v3_pcie: vcc3v3-pcie-regulator { · line 100

Quoted 9 lines · Anand Moon

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +9 -0

+     pcie30_3v3: gpio-regulator {
+             compatible = "regulator-gpio";
+             regulator-name = "pcie30_3v3";
+             regulator-min-microvolt = <100000>;
+             regulator-max-microvolt = <3300000>;
+             gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+             gpios-states = <0x1>;
+             states = <100000 0x0>, <3300000 0x1>;
+     };

This is actually no different from vcc3v3-pcie regulator?

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts &pcie2x1 { · line 573

Quoted 5 lines

+&pcie30phy {

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +4 -0

+     data-lanes = <0 1 2 3>;
+     phy-supply = <&vcc3v3_pi6c_03>;
+     status = "okay";
+};

It seems that there is no need to define additional data-lanes when the pcie3x1 node is not enabled, and phy-supply seems unnecessary on this board.

Excuse me, can you try the patches I posted? Lspci can recognize pcie3x2 normally, but I don't have a spare nvme hard drive right now to test if it works.

Thanks, Chukun

---
Chukun Pan (3):
arm64: dts: rockchip: Add regulator suffix to ROCK3 Model A
arm64: dts: rockchip: Rename pinctrl label of pcie2x1 on rock-3a
arm64: dts: rockchip: Add PCIe v3 nodes to rock-3a

 .../boot/dts/rockchip/rk3568-rock-3a.dts      | 36 ++++++++++++++-----
 1 file changed, 27 insertions(+), 9 deletions(-)

--
2.25.1

Hi Chukun,

Quoted 23 lines · Chukun Pan

Hi,

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts vcc3v3_pcie: vcc3v3-pcie-regulator { · line 100

Quoted 9 lines · Anand Moon

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +9 -0

+     pcie30_3v3: gpio-regulator {
+             compatible = "regulator-gpio";
+             regulator-name = "pcie30_3v3";
+             regulator-min-microvolt = <100000>;
+             regulator-max-microvolt = <3300000>;
+             gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+             gpios-states = <0x1>;
+             states = <100000 0x0>, <3300000 0x1>;
+     };

This is actually no different from vcc3v3-pcie regulator?

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts &pcie2x1 { · line 573

Quoted 5 lines

+&pcie30phy {

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +4 -0

+     data-lanes = <0 1 2 3>;
+     phy-supply = <&vcc3v3_pi6c_03>;
+     status = "okay";
+};

Quoted 4 lines

It seems that there is no need to define additional data-lanes when the pcie3x1 node is not enabled, and phy-supply seems unnecessary on this board.

As per the schematic below pice support with 2 regulators

VCC3V3_PCIE (SCT2250FPA)
VCC3V3_PI6C_03 (PI6C557-03 is a spread spectrum clock generator supporting PCI Express and Ethernet requirements)

[0] https://dl.radxa.com/rock3/docs/hw/3a/rock3a_v1.3_sch.pdf

Quoted 4 lines

Excuse me, can you try the patches I posted? Lspci can recognize pcie3x2 normally, but I don't have a spare nvme hard drive right now to test if it works.

No, it did not work on my board, see bool logs.
[0] https://pastebin.com/Lk93VFxg

[ 0.725985] phy phy-fe8c0000.phy.4: lane number 0, val 1
[ 0.726975] phy phy-fe8c0000.phy.4: rockchip_p3phy_rk3568_init: lock
failed 0x6890000, check input refclk and power supply
[ 0.728172] phy phy-fe8c0000.phy.4: phy init failed --> -110
[ 0.728704] rockchip-dw-pcie: probe of 3c0800000.pcie failed with error -110
[ 0.745193] ALSA device list:

Thanks
-Anand

Quoted 11 lines

Thanks, Chukun

---
Chukun Pan (3):
arm64: dts: rockchip: Add regulator suffix to ROCK3 Model A
arm64: dts: rockchip: Rename pinctrl label of pcie2x1 on rock-3a
arm64: dts: rockchip: Add PCIe v3 nodes to rock-3a

  .../boot/dts/rockchip/rk3568-rock-3a.dts      | 36 ++++++++++++++-----
  1 file changed, 27 insertions(+), 9 deletions(-)

Quoted 3 lines

--
2.25.1

_______________________________________________
Linux-rockchip mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-rockchip

(as a side note, is pcie2x1's vpcie3v3-supply as queued in -next actually correct? AFAICS the other socket is effectively powered straight from VCC3V3_SYS so shouldn't have needed VCC3V3_PCIE, but at least it's there now ready for this one)

phy phy-fe8c0000.phy.4: rockchip_p3phy_rk3568_init: lock failed 0x6890000, check input refclk and power supply phy phy-fe8c0000.phy.4: phy init failed --> -110
rockchip-dw-pcie: probe of 3c0800000.pcie failed with error -110

Hi,

Quoted 4 lines · Robin Murphy

(as a side note, is pcie2x1's vpcie3v3-supply as queued in -next actually correct? AFAICS the other socket is effectively powered straight from VCC3V3_SYS so shouldn't have needed VCC3V3_PCIE, but at least it's there now ready for this one)

Thanks for the correction, I didn't notice this before. You are right, the supply of pcie2x1 comes from VCC3V3_SYS. But if we change supply of pcie2x1 to VCC3V3_SYS, it will cause pcie30phy to fail to initialize normally. The error is the same as the following:

Quoted 4 lines

phy phy-fe8c0000.phy.4: rockchip_p3phy_rk3568_init: lock failed 0x6890000, check input refclk and power supply phy phy-fe8c0000.phy.4: phy init failed --> -110
rockchip-dw-pcie: probe of 3c0800000.pcie failed with error -110

If both vpcie3v3-supply of pcie2x1 and pcie3x2 use VCC3V3_PCIE like the vendor kernel, they can initialized normally.

As per the schematic below pice support with 2 regulators

VCC3V3_PCIE (SCT2250FPA)
VCC3V3_PI6C_03 (PI6C557-03 is a spread spectrum clock generator supporting PCI Express and Ethernet requirements)

[0] https://dl.radxa.com/rock3/docs/hw/3a/rock3a_v1.3_sch.pdf

No, it did not work on my board, see bool logs.
[0] https://pastebin.com/Lk93VFxg

Hi Anand,

Quoted 2 lines · Anand Moon

As per the schematic below pice support with 2 regulators

Quoted 5 lines

VCC3V3_PCIE (SCT2250FPA)
VCC3V3_PI6C_03 (PI6C557-03 is a spread spectrum clock generator supporting PCI Express and Ethernet requirements)

[0] https://dl.radxa.com/rock3/docs/hw/3a/rock3a_v1.3_sch.pdf

Thanks for sharing, I rewrote this patch, can you try again?

Quoted 2 lines

No, it did not work on my board, see bool logs.
[0] https://pastebin.com/Lk93VFxg

From the boot log, looks like ethernet is broken:
mdio_bus stmmac-0: MDIO device at address 0 is missing. rk_gmac-dwmac fe010000.ethernet eth0: no phy at addr -1

Actually I had this problem too, and reusing the "snps, reset" property solved it. What confuses me is am I doing something wrong or there is something wrong with the device tree now?

No, It's not working on my board.
If you check the driver code it requires *data-line* and *num-lanes from the dts.

Hi Anand,

Quoted 3 lines

No, It's not working on my board.
If you check the driver code it requires *data-line* and *num-lanes from the dts.

I have successfully tested NVME hard drives on my board. See below for the patch, looking forward to your testing.

root@rock3a:~# lspci
0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd \
             RK3568 Remote Signal Processor (rev 01)
0000:01:00.0 Network controller: MEDIATEK Corp. MT7921 \
             802.11ax PCI Express Wireless Network Adapter
0002:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd \
             RK3568 Remote Signal Processor (rev 01)
0002:01:00.0 Non-Volatile memory controller: Sandisk Corp \
             PC SN520 NVMe SSD (rev 01)

Patch:

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +31 -0

@@ -67,6 +67,37 @@ vcc12v_dcin: vcc12v-dcin-regulator {
                regulator-boot-on;
        };
 
+       pcie30_avdd0v9: pcie30-avdd0v9-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "pcie30_avdd0v9";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <900000>;
+               regulator-max-microvolt = <900000>;
+               vin-supply = <&vcc3v3_sys>;
+       };
+
+       pcie30_avdd1v8: pcie30-avdd1v8-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "pcie30_avdd1v8";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               vin-supply = <&vcc3v3_sys>;
+       };
+
+       /* pi6c pcie clock generator */
+       vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc3v3_pi6c_03";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&vcc5v0_sys>;
+       };
+
        vcc3v3_pcie: vcc3v3-pcie-regulator {
                compatible = "regulator-fixed";
                enable-active-high;

arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +7 -1

+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie30x2m1_pins>;
+       reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+       vpcie3v3-supply = <&vcc3v3_pcie>;
+       status = "okay";
+};
+
 &pinctrl {
        cam {
                vcc_cam_en: vcc_cam_en {
--

2.25.1

Thanks,
Chukun