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arm: dts: socfpga: align mmc node names with dtschema

PATCH In review Dinh Nguyen 2 participants 2 messages Oct 24, 2022 Device tree bindings

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PATCH v3 1/1 arm: dts: socfpga: align mmc node names with dtschema

dwmmc0@ff704000: $nodename:0: 'dwmmc0@ff704000' does not match '^mmc(@.*)?$'

---
v3: remove unneccesary rename mmc0 to mmc
v2: put back mmc0 for "linux,default-trigger"

---
 arch/arm/boot/dts/socfpga.dtsi          | 2 +-
 arch/arm/boot/dts/socfpga_arria10.dtsi  | 2 +-
 arch/arm/boot/dts/socfpga_arria5.dtsi   | 2 +-
 arch/arm/boot/dts/socfpga_cyclone5.dtsi | 2 +-
 arch/arm/boot/dts/socfpga_vt.dts        | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)
arch/arm/boot/dts/socfpga.dtsi +1 -1
index 2459f3cd7dd9..57a5d6c924b1 100644
@@ -755,7 +755,7 @@ l3regs@0xff800000 {
 			reg = <0xff800000 0x1000>;
 		};
 
-		mmc: dwmmc0@ff704000 {
+		mmc: mmc@ff704000 {
 			compatible = "altr,socfpga-dw-mshc";
 			reg = <0xff704000 0x1000>;
 			interrupts = <0 139 4>;
arch/arm/boot/dts/socfpga_arria10.dtsi +1 -1
index 4370e3cbbb4b..a06211fcb5c3 100644
@@ -656,7 +656,7 @@ L2: cache-controller@fffff000 {
 			arm,shared-override;
 		};
 
-		mmc: dwmmc0@ff808000 {
+		mmc: mmc@ff808000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "altr,socfpga-dw-mshc";
arch/arm/boot/dts/socfpga_arria5.dtsi +1 -1
index 22dbf07afcff..d27e94a1f61f 100644
@@ -18,7 +18,7 @@ osc1 {
 			};
 		};
 
-		mmc0: dwmmc0@ff704000 {
+		mmc0: mmc@ff704000 {
 			broken-cd;
 			bus-width = <4>;
 			cap-mmc-highspeed;
arch/arm/boot/dts/socfpga_cyclone5.dtsi +1 -1
index 319a71e41ea4..20f114445f48 100644
@@ -18,7 +18,7 @@ osc1 {
 			};
 		};
 
-		mmc0: dwmmc0@ff704000 {
+		mmc0: mmc@ff704000 {
 			broken-cd;
 			bus-width = <4>;
 			cap-mmc-highspeed;
arch/arm/boot/dts/socfpga_vt.dts +1 -1
index a77846f73b34..3d0d806888b7 100644
@@ -29,7 +29,7 @@ osc1 {
 			};
 		};
 
-		dwmmc0@ff704000 {
+		mmc@ff704000 {
 			broken-cd;
 			bus-width = <4>;
 			cap-mmc-highspeed;
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