net/mlx5: fix port private max_lro_msg_size

PATCH In review Gregory Etelson 3 participants 8 messages Nov 17, 2022 – Nov 22, 2022 Network drivers

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Gregory Etelson

author

2022-11-17 14:39 UTC #0 lore raw

PATCH 1/2 net/mlx5: fix port private max_lro_msg_size

The PMD analyzes each Rx queue maximal LRO size and selects one that fits all queues to configure TIR LRO attribute.
TIR LRO attribute is number of 256 bytes chunks that match the selected maximal LRO size.

PMD used priv->max_lro_msg_size for selected maximal LRO size and number of TIR chunks.

Fixes 9f1035b5f71c ("net/mlx5: fix port initialization with small LRO")

Signed-off-by Gregory Etelson <[email protected]>

Acked-by Matan Azrad <[email protected]>

---
 drivers/net/mlx5/mlx5.h      | 2 +-
 drivers/net/mlx5/mlx5_devx.c | 3 ++-
 drivers/net/mlx5/mlx5_rxq.c  | 4 +---
 3 files changed, 4 insertions(+), 5 deletions(-)

drivers/net/mlx5/mlx5.h +1 -1

index 02bee5808d..31982002ee 100644
@@ -1711,7 +1711,7 @@ struct mlx5_priv {
 	uint32_t refcnt; /**< Reference counter. */
 	/**< Verbs modify header action object. */
 	uint8_t ft_type; /**< Flow table type, Rx or Tx. */
-	uint8_t max_lro_msg_size;
+	uint32_t max_lro_msg_size;
 	uint32_t link_speed_capa; /* Link speed capabilities. */
 	struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */
 	struct mlx5_stats_ctrl stats_ctrl; /* Stats control. */

drivers/net/mlx5/mlx5_devx.c +2 -1

index c1305836cf..02deaac612 100644
@@ -870,7 +870,8 @@ mlx5_devx_tir_attr_set(struct rte_eth_dev *dev, const uint8_t *rss_key,
 	if (lro) {
 		MLX5_ASSERT(priv->sh->config.lro_allowed);
 		tir_attr->lro_timeout_period_usecs = priv->config.lro_timeout;
-		tir_attr->lro_max_msg_sz = priv->max_lro_msg_size;
+		tir_attr->lro_max_msg_sz =
+			priv->max_lro_msg_size / MLX5_LRO_SEG_CHUNK_SIZE;
 		tir_attr->lro_enable_mask =
 				MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO |
 				MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO;

drivers/net/mlx5/mlx5_rxq.c +1 -3

index 724cd6c7e6..81aa3f074a 100644
@@ -1533,7 +1533,6 @@ mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
 	    MLX5_MAX_TCP_HDR_OFFSET)
 		max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
 	max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
-	max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
 	if (priv->max_lro_msg_size)
 		priv->max_lro_msg_size =
 			RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);

@@ -1541,8 +1540,7 @@ mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
 		priv->max_lro_msg_size = max_lro_size;
 	DRV_LOG(DEBUG,
 		"port %u Rx Queue %u max LRO message size adjusted to %u bytes",
-		dev->data->port_id, idx,
-		priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
+		dev->data->port_id, idx, priv->max_lro_msg_size);
 }
 
 /**

Signature · 1 line

2.34.1

Gregory Etelson

author

2022-11-17 14:39 UTC #1 lore raw

PATCH 2/2 doc: update MLX5 LRO limitation

Maximal LRO message size must be multiply of 256. Otherwise, TCP payload may not fit into a single WQE.

Cc [email protected]

Signed-off-by Gregory Etelson <[email protected]>

Acked-by Matan Azrad <[email protected]>

---
 doc/guides/nics/mlx5.rst | 3 +++
 1 file changed, 3 insertions(+)

doc/guides/nics/mlx5.rst +3 -0

index 4f0db21dde..98e0b24be4 100644
@@ -278,6 +278,9 @@ Limitations
 - No Tx metadata go to the E-Switch steering domain for the Flow group 0.
   The flows within group 0 and set metadata action are rejected by hardware.
 
+- The driver rounds down the ``max_lro_pkt_size`` value in the port
+  configuration to a multiple of 256 due to HW limitation.
+
 .. note::
 
    MAC addresses not already present in the bridge table of the associated

Signature · 1 line

2.34.1

Thomas Monjalon

2022-11-21 15:23 UTC #2 lore raw

Re: [PATCH 2/2] doc: update MLX5 LRO limitation

17/11/2022 15:39, Gregory Etelson:

Quoted 6 lines

Maximal LRO message size must be multiply of 256. Otherwise, TCP payload may not fit into a single WQE.
Cc [email protected]
Signed-off-by Gregory Etelson <[email protected]>
Acked-by Matan Azrad <[email protected]>

Why the doc update is not in the same patch as the code change?

doc/guides/nics/mlx5.rst Limitations · line 286

Quoted 10 lines

doc/guides/nics/mlx5.rst +3 -0

@@ -278,6 +278,9 @@ Limitations
 - No Tx metadata go to the E-Switch steering domain for the Flow group 0.
   The flows within group 0 and set metadata action are rejected by hardware.
 
+- The driver rounds down the ``max_lro_pkt_size`` value in the port
+  configuration to a multiple of 256 due to HW limitation.
+
 .. note::
 
    MAC addresses not already present in the bridge table of the associated

If you would like to read the doc, I guess you'd prefer to find this info in the section dedicated to LRO, not in a random place.

Gregory Etelson

author

2022-11-22 05:17 UTC #3 lore raw

RE: [PATCH 2/2] doc: update MLX5 LRO limitation

Hello Thomas,

Quoted 8 lines

Quoted 3 lines
.. note::
MAC addresses not already present in the bridge table of the
associated
If you would like to read the doc, I guess you'd prefer to find this info in the section dedicated to LRO, not in a random place.

I moved the patch location in v2

Regards,
Gregory

Thomas Monjalon

2022-11-22 08:25 UTC #4 lore raw

Re: [PATCH 2/2] doc: update MLX5 LRO limitation

22/11/2022 06:17, Gregory Etelson:

Quoted 11 lines

Hello Thomas,
Quoted 8 lines
Quoted 3 lines
.. note::
MAC addresses not already present in the bridge table of the
associated
If you would like to read the doc, I guess you'd prefer to find this info in the section dedicated to LRO, not in a random place.
I moved the patch location in v2

I've fixed v1 and merged yesterday. No need for v2.

Raslan Darawsheh

2022-11-20 15:32 UTC #5 lore raw

In reply to Gregory Etelson

Hi,

Quoted 14 lines

-----Original Message-----
From: Gregory Etelson <[email protected]>
Sent: Thursday, November 17, 2022 4:39 PM
To: [email protected]
Cc: Gregory Etelson <[email protected]>; Matan Azrad <[email protected]>; Raslan Darawsheh <[email protected]>; Slava Ovsiienko <[email protected]>
Subject: [PATCH 1/2] net/mlx5: fix port private max_lro_msg_size
The PMD analyzes each Rx queue maximal LRO size and selects one that fits all queues to configure TIR LRO attribute.
TIR LRO attribute is number of 256 bytes chunks that match the selected maximal LRO size.

Quoted 7 lines

PMD used priv->max_lro_msg_size for selected maximal LRO size and number of TIR chunks.
Fixes 9f1035b5f71c ("net/mlx5: fix port initialization with small LRO")
Signed-off-by Gregory Etelson <[email protected]>
Acked-by Matan Azrad <[email protected]>

Series applied to next-net-mlx,
With small fixes to title.

Kindest regards,
Raslan Darawsheh

Gregory Etelson

author

2022-11-22 05:13 UTC #6 lore raw

PATCH v2 1/2 net/mlx5: fix port private max LRO msg size

In reply to Gregory Etelson

PMD used priv->max_lro_msg_size for selected maximal LRO size and number of TIR chunks.

Fixes b9f1f4c239 ("net/mlx5: fix port initialization with small LRO")

Signed-off-by Gregory Etelson <[email protected]>

Acked-by Matan Azrad <[email protected]>

---
 drivers/net/mlx5/mlx5.h      | 2 +-
 drivers/net/mlx5/mlx5_devx.c | 3 ++-
 drivers/net/mlx5/mlx5_rxq.c  | 4 +---
 3 files changed, 4 insertions(+), 5 deletions(-)

drivers/net/mlx5/mlx5.h +1 -1

index 02bee5808d..31982002ee 100644
@@ -1711,7 +1711,7 @@ struct mlx5_priv {
 	uint32_t refcnt; /**< Reference counter. */
 	/**< Verbs modify header action object. */
 	uint8_t ft_type; /**< Flow table type, Rx or Tx. */
-	uint8_t max_lro_msg_size;
+	uint32_t max_lro_msg_size;
 	uint32_t link_speed_capa; /* Link speed capabilities. */
 	struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */
 	struct mlx5_stats_ctrl stats_ctrl; /* Stats control. */

drivers/net/mlx5/mlx5_devx.c +2 -1

index c1305836cf..02deaac612 100644
@@ -870,7 +870,8 @@ mlx5_devx_tir_attr_set(struct rte_eth_dev *dev, const uint8_t *rss_key,
 	if (lro) {
 		MLX5_ASSERT(priv->sh->config.lro_allowed);
 		tir_attr->lro_timeout_period_usecs = priv->config.lro_timeout;
-		tir_attr->lro_max_msg_sz = priv->max_lro_msg_size;
+		tir_attr->lro_max_msg_sz =
+			priv->max_lro_msg_size / MLX5_LRO_SEG_CHUNK_SIZE;
 		tir_attr->lro_enable_mask =
 				MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO |
 				MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO;

drivers/net/mlx5/mlx5_rxq.c +1 -3

index 724cd6c7e6..81aa3f074a 100644
@@ -1533,7 +1533,6 @@ mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
 	    MLX5_MAX_TCP_HDR_OFFSET)
 		max_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;
 	max_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);
-	max_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;
 	if (priv->max_lro_msg_size)
 		priv->max_lro_msg_size =
 			RTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);

@@ -1541,8 +1540,7 @@ mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,
 		priv->max_lro_msg_size = max_lro_size;
 	DRV_LOG(DEBUG,
 		"port %u Rx Queue %u max LRO message size adjusted to %u bytes",
-		dev->data->port_id, idx,
-		priv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);
+		dev->data->port_id, idx, priv->max_lro_msg_size);
 }
 
 /**

Signature · 1 line

2.34.1

Gregory Etelson

author

2022-11-22 05:13 UTC #7 lore raw

PATCH v2 2/2 doc: update MLX5 LRO limitation

Maximal LRO message size must be multiply of 256. Otherwise, TCP payload may not fit into a single WQE.

Cc [email protected]

Signed-off-by Gregory Etelson <[email protected]>

Acked-by Matan Azrad <[email protected]>

---
v2: move the patch to LRO section.

---
 doc/guides/nics/mlx5.rst | 2 ++
 1 file changed, 2 insertions(+)

doc/guides/nics/mlx5.rst +2 -0

index 4f0db21dde..e77d79774b 100644
@@ -411,6 +411,8 @@ Limitations
   - LRO packet aggregation is performed by HW only for packet size larger than
     ``lro_min_mss_size``. This value is reported on device start, when debug
     mode is enabled.
+  - The driver rounds down the ``max_lro_pkt_size`` value in the port configuration
+    to a multiple of 256 due to HW limitation.
 
 - CRC:

Signature · 1 line

2.34.1