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arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices

PATCH Applied Chris Morgan 3 participants 3 messages Mar 27, 2023 – Mar 30, 2023

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PATCH 1/1 arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices

From: Chris Morgan <[email protected]>

For the Anbernic devices to display properly, we need to specify the clock frequency of the PLL_VPLL. Adding the parent clock in the rk356x.dtsi requires us to update our clock definitions to accomplish this.

Fixes 64b69474edf3 ("arm64: dts: rockchip: assign rate to clk_rtc_32k on rk356x")
---
 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi | 6 ++++--
 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts   | 6 ++++--
 2 files changed, 8 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi +4 -2
index 65a80d1f6d91..9a0e217f069f 100644
@@ -16,8 +16,10 @@ backlight: backlight {
 };
 
 &cru {
-	assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
-	assigned-clock-rates = <1200000000>, <200000000>, <241500000>;
+	assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
+			  <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
+	assigned-clock-rates = <32768>, <1200000000>,
+			       <200000000>, <241500000>;
 };
 
 &gpio_keys_control {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts +4 -2
index b4b2df821cba..c763c7f3b1b3 100644
@@ -105,8 +105,10 @@ spk_amp: audio-amplifier {
 };
 
 &cru {
-	assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
-	assigned-clock-rates = <1200000000>, <200000000>, <500000000>;
+	assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
+			  <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
+	assigned-clock-rates = <32768>, <1200000000>,
+			       <200000000>, <500000000>;
 };
 
 &dsi_dphy0 {
Signature · 1 line
2.34.1
#1 lore raw
Quoted 10 lines · Chris Morgan

From: Chris Morgan <[email protected]>

For the Anbernic devices to display properly, we need to specify the clock frequency of the PLL_VPLL. Adding the parent clock in the rk356x.dtsi requires us to update our clock definitions to accomplish this.

Fixes 64b69474edf3 ("arm64: dts: rockchip: assign rate to clk_rtc_32k on rk356x")

No line breaks between tags.

Best regards,
Krzysztof

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maintainer Applied
#2 lore raw
In reply to Chris Morgan
Quoted 8 lines · Chris Morgan

From: Chris Morgan <[email protected]>

For the Anbernic devices to display properly, we need to specify the clock frequency of the PLL_VPLL. Adding the parent clock in the rk356x.dtsi requires us to update our clock definitions to accomplish this.

[...]

Applied, thanks!

[1/1] arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices

      commit: 87891399d9883ed823ba58c2be3ac20cc499ad7d

Best regards,

Signature · 6 lines
Heiko Stuebner <[email protected]>

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