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clk: Add basic register clock controller

PATCH Superseded David Yang 4 participants 9 messages Apr 14, 2023 – Apr 18, 2023

Subsystems (2)
Device tree bindings Common clk

v1 of 3 Superseded Latest is v3 →

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David Yang

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#0 lore raw

cover clk: Add basic register clock controller

These clocks were provided in include/linux/clk-provider.h, but lacks DT bindings. Add a clock controller to avoid operation conflict on same register.

*** BLURB HERE ***

David Yang (2):
dt-bindings: clock: Add reg-clock-controller
clk: Add basic register clock controller

 .../bindings/clock/reg-clock-controller.yaml  | 245 +++++++
 drivers/clk/Makefile                          |   1 +
 drivers/clk/clk-reg.c                         | 638 ++++++++++++++++++
 3 files changed, 884 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
 create mode 100644 drivers/clk/clk-reg.c

base-commit: 7a934f4bd7d6f9da84c8812da3ba42ee10f5778e

Signature · 1 line
2.39.2
author
#1 lore raw

PATCH 1/2 dt-bindings: clock: Add reg-clock-controller

Add DT bindings documentation for reg-clock-controller, collection of basic clocks common to many platforms.

Signed-off-by David Yang <[email protected]>
---
 .../bindings/clock/reg-clock-controller.yaml  | 245 ++++++++++++++++++
 1 file changed, 245 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +245 -0
new file mode 100644
index 000000000000..a6a7e0b05821
@@ -0,0 +1,245 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/reg-clock-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Simple straight-forward register-based clocks
+
+maintainers:
+  - David Yang <[email protected]>
+
+description: |
+  Basic clocks common to many platforms.
+
+  If your clocks don't fit into these catagories, simply create your clock
+  controller. This driver normally work well with other controllers as long as
+  they operate on different registers.
+
+  See linux/clk-provider.h for details about properties for each type of clock.
+
+properties:
+  compatible:
+    enum:
+      - reg-clock-controller
+
+  ranges: true
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+required:
+  - compatible
+  - ranges
+  - '#address-cells'
+  - '#size-cells'
+
+patternProperties:
+  ".*gate-clock@.*":
+    type: object
+
+    description: |
+      Clock which can gate its output.
+
+    properties:
+      compatible:
+        const: gate-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        maxItems: 1
+        description:
+          Parent clock.
+
+      clock-output-name:
+        maxItems: 1
+
+      bit-index:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Bit index which controls the output.
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - bit-index
+
+    additionalProperties: false
+
+  ".*divider-clock@.*":
+    type: object
+
+    description: |
+      Clock with an adjustable divider affecting its output frequency.
+
+    properties:
+      compatible:
+        const: divider-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        description:
+          Parent clocks.
+
+      clock-output-name:
+        maxItems: 1
+
+      shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to the divider bit field.
+
+      width:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Width of the divider bit field.
+
+      dividers:
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+        description:
+          Array of value/divider pairs.
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - shift
+      - width
+
+    additionalProperties: false
+
+  ".*mux-clock@.*":
+    type: object
+
+    description: |
+      Clock with multiple selectable parents.
+
+    properties:
+      compatible:
+        const: mux-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        minItems: 1
+        description:
+          Parent clock.
+
+      clock-output-name:
+        maxItems: 1
+
+      shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to multiplexer bit field.
+
+      mask:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Mask of mutliplexer bit field.
+
+      table:
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+        description:
+          Array of register values corresponding to the parent index.
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - shift
+      - mask
+
+    additionalProperties: false
+
+  ".*fractional-divider-clock@.*":
+    type: object
+
+    description: |
+      Clock with adjustable fractional divider affecting its output frequency.
+
+    properties:
+      compatible:
+        const: fractional_divider-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        maxItems: 1
+        description:
+          Parent clock.
+
+      clock-output-name:
+        maxItems: 1
+
+      numerator-shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to the numerator bit field.
+
+      numerator-width:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Width of the numerator bit field.
+
+      denominator-shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to the denominator bit field.
+
+      denominator-width:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Width of the denominator bit field.
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - numerator-shift
+      - numerator-width
+      - denominator-shift
+      - denominator-width
+
+    additionalProperties: false
+
+additionalProperties: true
+
+examples:
+  - |
+    clks: reg-clk-ctrl@ffff0000 {
+      compatible = "reg-clock-controller";
+      #address-cells = <1>;
+      #size-cells = <1>;
+      ranges = <0 0xffff0000 0x1000>;
+
+      my_clk: gate-clock@cc-3 {
+        compatible = "gate-clock";
+        #clock-cells = <0>;
+        reg = <0xcc 4>;
+        bit-index = <3>;
+        clock-output-name = "my-clk";
+      };
+    };
Signature · 1 line
2.39.2
#2 lore raw

Re: [PATCH 1/2] dt-bindings: clock: Add reg-clock-controller

Quoted 20 lines · David Yang

Add DT bindings documentation for reg-clock-controller, collection of basic clocks common to many platforms.

Signed-off-by David Yang <[email protected]>
---
 .../bindings/clock/reg-clock-controller.yaml  | 245 ++++++++++++++++++
 1 file changed, 245 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +5 -0
new file mode 100644
index 000000000000..a6a7e0b05821
@@ -0,0 +1,245 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/reg-clock-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 15

Quoted 10 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +10 -0
+
+title: Simple straight-forward register-based clocks
+
+maintainers:
+  - David Yang <[email protected]>
+
+description: |
+  Basic clocks common to many platforms.
+
+  If your clocks don't fit into these catagories, simply create your clock

typo: categories

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 19

Quoted 4 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +4 -0
+  controller. This driver normally work well with other controllers as long as
+  they operate on different registers.
+
+  See linux/clk-provider.h for details about properties for each type of clock.

Describe here what is this device, what such simple clock controller represents.

Quoted 9 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +9 -0
+
+properties:
+  compatible:
+    enum:
+      - reg-clock-controller
+
+  ranges: true
+
+  '#address-cells':

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 38

Quoted 10 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +10 -0
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+required:
+  - compatible
+  - ranges
+  - '#address-cells'
+  - '#size-cells'

required goes after patternProperties.

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 41

Quoted 3 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +3 -0
+
+patternProperties:
+  ".*gate-clock@.*":

"gate-clock@" should be equivalent. However this should be just "clock".

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 44

Quoted 3 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +3 -0
+    type: object
+
+    description: |

Do not need '|' unless you need to preserve formatting.

Quoted 8 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +8 -0
+      Clock which can gate its output.
+
+    properties:
+      compatible:
+        const: gate-clock
+
+      reg:
+        maxItems: 1

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 62

Quoted 10 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +10 -0
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        maxItems: 1
+        description:
+          Parent clock.
+
+      clock-output-name:

names

Don't create your own properties.

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 68

Quoted 6 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +6 -0
+        maxItems: 1
+
+      bit-index:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Bit index which controls the output.

I suggest to use same property as nvme, so bits.

Quoted 36 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +36 -0
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - bit-index
+
+    additionalProperties: false
+
+  ".*divider-clock@.*":
+    type: object
+
+    description: |
+      Clock with an adjustable divider affecting its output frequency.
+
+    properties:
+      compatible:
+        const: divider-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        description:
+          Parent clocks.
+
+      clock-output-name:
+        maxItems: 1
+
+      shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to the divider bit field.

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 114

Quoted 10 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +10 -0
+
+      width:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Width of the divider bit field.
+
+      dividers:
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+        description:
+          Array of value/divider pairs.

Then it looks like matrix.

Quoted 104 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +104 -0
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - shift
+      - width
+
+    additionalProperties: false
+
+  ".*mux-clock@.*":
+    type: object
+
+    description: |
+      Clock with multiple selectable parents.
+
+    properties:
+      compatible:
+        const: mux-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        minItems: 1
+        description:
+          Parent clock.
+
+      clock-output-name:
+        maxItems: 1
+
+      shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to multiplexer bit field.
+
+      mask:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Mask of mutliplexer bit field.
+
+      table:
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+        description:
+          Array of register values corresponding to the parent index.
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - shift
+      - mask
+
+    additionalProperties: false
+
+  ".*fractional-divider-clock@.*":
+    type: object
+
+    description: |
+      Clock with adjustable fractional divider affecting its output frequency.
+
+    properties:
+      compatible:
+        const: fractional_divider-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        maxItems: 1
+        description:
+          Parent clock.
+
+      clock-output-name:
+        maxItems: 1
+
+      numerator-shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to the numerator bit field.
+
+      numerator-width:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Width of the numerator bit field.
+
+      denominator-shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to the denominator bit field.
+
+      denominator-width:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Width of the denominator bit field.
+
+    required:
+      - compatible

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 228

Quoted 10 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +10 -0
+      - reg
+      - '#clock-cells'
+      - numerator-shift
+      - numerator-width
+      - denominator-shift
+      - denominator-width
+
+    additionalProperties: false
+
+additionalProperties: true

No, come on. This must be false.

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 232

Quoted 4 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +4 -0
+
+examples:
+  - |
+    clks: reg-clk-ctrl@ffff0000 {

Names should be generic, so clock-controller

Drop the label.

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 238

Quoted 6 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +6 -0
+      compatible = "reg-clock-controller";
+      #address-cells = <1>;
+      #size-cells = <1>;
+      ranges = <0 0xffff0000 0x1000>;
+
+      my_clk: gate-clock@cc-3 {

Drop label.

That's a new unit address to me. Did I miss a change in DT spec?

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 241

Quoted 3 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +3 -0
+        compatible = "gate-clock";
+        #clock-cells = <0>;
+        reg = <0xcc 4>;

reg is after compatible.

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 243

Quoted 2 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +2 -0
+        bit-index = <3>;
+        clock-output-name = "my-clk";

Plus, test your patches. This fails testing...

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 245

Quoted 2 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +2 -0
+      };
+    };

Best regards,
Krzysztof

author
#3 lore raw

Re: [PATCH 1/2] dt-bindings: clock: Add reg-clock-controller

Quoted 26 lines · Krzysztof Kozlowski <[email protected]> 于2023年4月15日周六 05:08写道：
Quoted 24 lines · David Yang

Add DT bindings documentation for reg-clock-controller, collection of basic clocks common to many platforms.

Signed-off-by David Yang <[email protected]>
---
 .../bindings/clock/reg-clock-controller.yaml  | 245 ++++++++++++++++++
 1 file changed, 245 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +9 -0
new file mode 100644
index 000000000000..a6a7e0b05821
@@ -0,0 +1,245 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/reg-clock-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Simple straight-forward register-based clocks
+
+maintainers:
Quoted 8 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 15

Quoted 6 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +6 -0
+  - David Yang <[email protected]>
+
+description: |
+  Basic clocks common to many platforms.
+
+  If your clocks don't fit into these catagories, simply create your clock

typo: categories

Fixed in v2.

Quoted 8 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 19

Quoted 5 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +4 -0
+  controller. This driver normally work well with other controllers as long as
+  they operate on different registers.
+
+  See linux/clk-provider.h for details about properties for each type of clock.

Describe here what is this device, what such simple clock controller represents.

Description has been rewritten in v3, to describe the device.

Quoted 14 lines
Quoted 14 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +13 -0
+
+properties:
+  compatible:
+    enum:
+      - reg-clock-controller
+
+  ranges: true
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
Quoted 8 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 38

Quoted 6 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +6 -0
+
+required:
+  - compatible
+  - ranges
+  - '#address-cells'
+  - '#size-cells'

required goes after patternProperties.

Fixed in v2.

Quoted 6 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 41

Quoted 4 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +3 -0
+
+patternProperties:
+  ".*gate-clock@.*":

"gate-clock@" should be equivalent. However this should be just "clock".

Fixed in v3.

Quoted 6 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 44

Quoted 4 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +3 -0
+    type: object
+
+    description: |

Do not need '|' unless you need to preserve formatting.

Fixed in v2.

Quoted 22 lines
Quoted 9 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +8 -0
+      Clock which can gate its output.
+
+    properties:
+      compatible:
+        const: gate-clock
+
+      reg:
+        maxItems: 1

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 62

Quoted 10 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +10 -0
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        maxItems: 1
+        description:
+          Parent clock.
+
+      clock-output-name:

names

Quoted 1 line

Don't create your own properties.

Fixed in v2, "clock-output-names".

Quoted 9 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 68

Quoted 7 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +6 -0
+        maxItems: 1
+
+      bit-index:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Bit index which controls the output.

I suggest to use same property as nvme, so bits.

Replaced with "bits" in v2.

Quoted 41 lines
Quoted 41 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +40 -0
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - bit-index
+
+    additionalProperties: false
+
+  ".*divider-clock@.*":
+    type: object
+
+    description: |
+      Clock with an adjustable divider affecting its output frequency.
+
+    properties:
+      compatible:
+        const: divider-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        description:
+          Parent clocks.
+
+      clock-output-name:
+        maxItems: 1
+
+      shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to the divider bit field.
+
+      width:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
Quoted 8 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 114

Quoted 6 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +6 -0
+          Width of the divider bit field.
+
+      dividers:
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+        description:
+          Array of value/divider pairs.

Then it looks like matrix.

This part of bindings has been (temporarily) removed from this series since v2, to make it simpler.

Quoted 109 lines
Quoted 109 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +108 -0
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - shift
+      - width
+
+    additionalProperties: false
+
+  ".*mux-clock@.*":
+    type: object
+
+    description: |
+      Clock with multiple selectable parents.
+
+    properties:
+      compatible:
+        const: mux-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        minItems: 1
+        description:
+          Parent clock.
+
+      clock-output-name:
+        maxItems: 1
+
+      shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to multiplexer bit field.
+
+      mask:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Mask of mutliplexer bit field.
+
+      table:
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+        description:
+          Array of register values corresponding to the parent index.
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - shift
+      - mask
+
+    additionalProperties: false
+
+  ".*fractional-divider-clock@.*":
+    type: object
+
+    description: |
+      Clock with adjustable fractional divider affecting its output frequency.
+
+    properties:
+      compatible:
+        const: fractional_divider-clock
+
+      reg:
+        maxItems: 1
+
+      '#clock-cells':
+        const: 0
+
+      clocks:
+        maxItems: 1
+        description:
+          Parent clock.
+
+      clock-output-name:
+        maxItems: 1
+
+      numerator-shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to the numerator bit field.
+
+      numerator-width:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Width of the numerator bit field.
+
+      denominator-shift:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Shift to the denominator bit field.
+
+      denominator-width:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Width of the denominator bit field.
+
+    required:
+      - compatible
+      - reg
+      - '#clock-cells'
+      - numerator-shift
+      - numerator-width
Quoted 8 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 228

Quoted 6 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +6 -0
+      - denominator-shift
+      - denominator-width
+
+    additionalProperties: false
+
+additionalProperties: true

No, come on. This must be false.

Fixed with "false" in v2.

Quoted 9 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 232

Quoted 5 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +4 -0
+
+examples:
+  - |
+    clks: reg-clk-ctrl@ffff0000 {

Names should be generic, so clock-controller

Drop the label.

Dropped in v2.

Quoted 11 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 238

Quoted 7 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +6 -0
+      compatible = "reg-clock-controller";
+      #address-cells = <1>;
+      #size-cells = <1>;
+      ranges = <0 0xffff0000 0x1000>;
+
+      my_clk: gate-clock@cc-3 {

Drop label.

That's a new unit address to me. Did I miss a change in DT spec?

Dropped label in v2.

Quoted 11 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 241

Quoted 4 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +3 -0
+        compatible = "gate-clock";
+        #clock-cells = <0>;
+        reg = <0xcc 4>;

reg is after compatible.

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 243

Quoted 2 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +2 -0
+        bit-index = <3>;
+        clock-output-name = "my-clk";

Plus, test your patches. This fails testing...

Fix name error in v3.

Quoted 7 lines

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 245

Quoted 3 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +2 -0
+      };
+    };

Best regards,
Krzysztof

maintainer
#4 lore raw

Re: [PATCH 1/2] dt-bindings: clock: Add reg-clock-controller

In reply to David Yang
Quoted 9 lines · David Yang

Add DT bindings documentation for reg-clock-controller, collection of basic clocks common to many platforms.

Signed-off-by David Yang <[email protected]>
---
 .../bindings/clock/reg-clock-controller.yaml  | 245 ++++++++++++++++++
 1 file changed, 245 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/reg-clock-controller.yaml

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/reg-clock-controller.example.dtb: reg-clk-ctrl@ffff0000: 'gate-clock@cc-3' does not match any of the regexes: '.*-names$', '.*-supply$', '^#.*-cells$', '^#[a-zA-Z0-9,+\\-._]{0,63}$', '^[a-zA-Z0-9][a-zA-Z0-9,+\\-._]{0,63}$', '^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+(,[0-9a-fA-F]+)*$', '^__.*__$', 'pinctrl-[0-9]+'
From schema: /usr/local/lib/python3.10/dist-packages/dtschema/schemas/dt-core.yaml

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]

The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.

maintainer
#5 lore raw

Re: [PATCH 1/2] dt-bindings: clock: Add reg-clock-controller

In reply to David Yang
Quoted 15 lines · David Yang

Add DT bindings documentation for reg-clock-controller, collection of basic clocks common to many platforms.

Signed-off-by David Yang <[email protected]>
---
 .../bindings/clock/reg-clock-controller.yaml  | 245 ++++++++++++++++++
 1 file changed, 245 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +0 -0
new file mode 100644
index 000000000000..a6a7e0b05821

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 7

Quoted 7 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +7 -0
@@ -0,0 +1,245 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/reg-clock-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Simple straight-forward register-based clocks

'simple' means extended one property at a time with little foresight. In the end, 'simple' bindings are never simple. s/simple/generic/ as well.

When we first started the clock binding, we had exactly this. There's still bindings for at least some of it. It turned out to be a bad idea because it was difficult to get correct and complete. So this binding is exactly what we don't want.

Rob

author
#6 lore raw

Re: [PATCH 1/2] dt-bindings: clock: Add reg-clock-controller

Quoted 28 lines · Rob Herring <[email protected]> 于2023年4月18日周二 04:49写道：
Quoted 15 lines · David Yang

Add DT bindings documentation for reg-clock-controller, collection of basic clocks common to many platforms.

Signed-off-by David Yang <[email protected]>
---
 .../bindings/clock/reg-clock-controller.yaml  | 245 ++++++++++++++++++
 1 file changed, 245 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +0 -0
new file mode 100644
index 000000000000..a6a7e0b05821

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 7

Quoted 7 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +7 -0
@@ -0,0 +1,245 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/reg-clock-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Simple straight-forward register-based clocks

'simple' means extended one property at a time with little foresight. In the end, 'simple' bindings are never simple. s/simple/generic/ as well.

Quoted 6 lines

When we first started the clock binding, we had exactly this. There's still bindings for at least some of it. It turned out to be a bad idea because it was difficult to get correct and complete. So this binding is exactly what we don't want.

Rob

Thanks. So in the next version v2, clock-controller are made merely container of clocks. The real jobs are done by sub clock nodes, so that clocks, with or without hardware-specific clock types "compatible", can be declared independently and individually as dt nodes, instead of hardware clock "controllers" with quite arbitrary clock identifiers listed under include/dt-bindings/clock/.

maintainer
#7 lore raw

Re: [PATCH 1/2] dt-bindings: clock: Add reg-clock-controller

Quoting Yangfl (2023-04-17 14:39:23)

Quoted 34 lines
Quoted 33 lines · Rob Herring <[email protected]> 于2023年4月18日周二 04:49写道：
Quoted 15 lines · David Yang

Add DT bindings documentation for reg-clock-controller, collection of basic clocks common to many platforms.

Signed-off-by David Yang <[email protected]>
---
 .../bindings/clock/reg-clock-controller.yaml  | 245 ++++++++++++++++++
 1 file changed, 245 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +0 -0
new file mode 100644
index 000000000000..a6a7e0b05821

Documentation/devicetree/bindings/clock/reg-clock-controller.yaml line 7

Quoted 7 lines
Documentation/devicetree/bindings/clock/reg-clock-controller.yaml new file +7 -0
@@ -0,0 +1,245 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/reg-clock-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Simple straight-forward register-based clocks

'simple' means extended one property at a time with little foresight. In the end, 'simple' bindings are never simple. s/simple/generic/ as well.

When we first started the clock binding, we had exactly this. There's still bindings for at least some of it. It turned out to be a bad idea because it was difficult to get correct and complete. So this binding is exactly what we don't want.

Quoted 8 lines
Quoted 1 line

Rob

Thanks. So in the next version v2, clock-controller are made merely container of clocks. The real jobs are done by sub clock nodes, so that clocks, with or without hardware-specific clock types "compatible", can be declared independently and individually as dt nodes, instead of hardware clock "controllers" with quite arbitrary clock identifiers listed under include/dt-bindings/clock/.

No. Write actual drivers and actual bindings for real devices.

author
#8 lore raw

PATCH 2/2 clk: Add basic register clock controller

In reply to David Yang

These clocks were provided in include/linux/clk-provider.h, but lacks DT bindings. Add a clock controller to avoid operation conflict on same register.

Signed-off-by David Yang <[email protected]>
---
 drivers/clk/Makefile  |   1 +
 drivers/clk/clk-reg.c | 638 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 639 insertions(+)
 create mode 100644 drivers/clk/clk-reg.c
drivers/clk/Makefile +1 -0
index e3ca0d058a25..9468b2028a5b 100644
@@ -15,6 +15,7 @@ obj-$(CONFIG_COMMON_CLK)	+= clk-fractional-divider.o
 obj-$(CONFIG_COMMON_CLK)	+= clk-gpio.o
 ifeq ($(CONFIG_OF), y)
 obj-$(CONFIG_COMMON_CLK)	+= clk-conf.o
+obj-$(CONFIG_COMMON_CLK)	+= clk-reg.o
 endif
 
 # hardware specific clock types
drivers/clk/clk-reg.c new file +638 -0

638 lines not on this page · raw message

Signature · 1 line
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