crypto: hisilicon - Add HiSilicon ADVCA Subsystem
Subsystems (2)
v2 cover crypto: hisilicon - Add HiSilicon ADVCA Subsystem
HiSilicon ADVCA Subsystem contains various cryptographic devices, including symmetric key ciphers, hash functions, RSA algorithms, as well as key ladder and OTP memory.
This series adds symmetric key cipher and SHA algorithm family driver.
This series is based on Hi3798Mv100.
David Yang (2):
crypto: hisilicon - Add HiSilicon ADVCA Subsystem
crypto: hisilicon/advca - Add SHA support
drivers/crypto/hisilicon/Kconfig | 11 + drivers/crypto/hisilicon/Makefile | 1 + drivers/crypto/hisilicon/advca/Makefile | 2 + .../crypto/hisilicon/advca/hisi-advca-muc.c | 1527 +++++++++++++++++ .../crypto/hisilicon/advca/hisi-advca-sha.c | 644 +++++++ 5 files changed, 2185 insertions(+) create mode 100644 drivers/crypto/hisilicon/advca/Makefile create mode 100644 drivers/crypto/hisilicon/advca/hisi-advca-muc.c create mode 100644 drivers/crypto/hisilicon/advca/hisi-advca-sha.c
base-commit: 9a48d604672220545d209e9996c2a1edbb5637f6
Signature · 1 line
2.39.2
PATCH v2 1/2 crypto: hisilicon - Add HiSilicon ADVCA Subsystem
HiSilicon ADVCA Subsystem contains various cryptographic devices, including symmetric key ciphers, hash functions, RSA algorithms, as well as key ladder and OTP memory.
This patch adds symmetric key cipher driver.
--- drivers/crypto/hisilicon/Kconfig | 8 + drivers/crypto/hisilicon/Makefile | 1 + drivers/crypto/hisilicon/advca/Makefile | 1 + .../crypto/hisilicon/advca/hisi-advca-muc.c | 1527 +++++++++++++++++ 4 files changed, 1537 insertions(+) create mode 100644 drivers/crypto/hisilicon/advca/Makefile create mode 100644 drivers/crypto/hisilicon/advca/hisi-advca-muc.c
drivers/crypto/hisilicon/Kconfig +8 -0
@@ -1,5 +1,13 @@ # SPDX-License-Identifier: GPL-2.0 +config CRYPTO_DEV_HISI_ADVCA + tristate "Support for Hisilicon ADVCA Subsystem" + depends on ARCH_HISI || COMPILE_TEST + select CRYPTO_SKCIPHER + help + Support for Hisilicon ADVCA (Advanced Conditional Access) Subsystem, + which can be found on HiSilicon STB SoCs, such as Hi37xx. + config CRYPTO_DEV_HISI_SEC tristate "Support for Hisilicon SEC crypto block cipher accelerator" select CRYPTO_SKCIPHER
drivers/crypto/hisilicon/Makefile +1 -0
@@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_CRYPTO_DEV_HISI_ADVCA) += advca/ obj-$(CONFIG_CRYPTO_DEV_HISI_HPRE) += hpre/ obj-$(CONFIG_CRYPTO_DEV_HISI_SEC) += sec/ obj-$(CONFIG_CRYPTO_DEV_HISI_SEC2) += sec2/
drivers/crypto/hisilicon/advca/Makefile new file +1 -0
@@ -0,0 +1 @@ +obj-$(CONFIG_CRYPTO_DEV_HISI_ADVCA) += hisi-advca-muc.o
drivers/crypto/hisilicon/advca/hisi-advca-muc.c new file +1527 -0
1,527 lines not on this page · raw message
Signature · 1 line
2.39.2
kernel test robot
build botkernel test robot noticed the following build warnings:
Hi David,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 9a48d604672220545d209e9996c2a1edbb5637f6]
url: https://github.com/intel-lab-lkp/linux/commits/David-Yang/crypto-hisilicon-Add-HiSilicon-ADVCA-Subsystem/20230513-154545 base: 9a48d604672220545d209e9996c2a1edbb5637f6 patch link: https://lore.kernel.org/r/20230513074339.266879-2-mmyangfl%40gmail.com patch subject: [PATCH v2 1/2] crypto: hisilicon - Add HiSilicon ADVCA Subsystem config: sh-allmodconfig (https://download.01.org/0day-ci/archive/20230513/[email protected]/config) compiler: sh4-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/6f6cb7dd5da91063c560d2d252104268ffac785b
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review David-Yang/crypto-hisilicon-Add-HiSilicon-ADVCA-Subsystem/20230513-154545
git checkout 6f6cb7dd5da91063c560d2d252104268ffac785b
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=sh olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=sh SHELL=/bin/bash drivers/crypto/hisilicon/advca/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <[email protected]>
| Link: https://lore.kernel.org/oe-kbuild-all/[email protected]/
All warnings (new ones prefixed by >>):
>> drivers/crypto/hisilicon/advca/hisi-advca-muc.c:77:41: warning: unsigned conversion from 'int' to 'unsigned char:2' changes value from '4' to '0' [-Woverflow]
77 | #define MUC_MODE_CTR 4 /* not for DES */
| ^
drivers/crypto/hisilicon/advca/hisi-advca-muc.c:1283:25: note: in expansion of macro 'MUC_MODE_CTR'
1283 | .mode = MUC_MODE_##_MODE, \
| ^~~~~~~~~
drivers/crypto/hisilicon/advca/hisi-advca-muc.c:1298:9: note: in expansion of macro 'hica_muc_tmpl_define'
1298 | hica_muc_tmpl_define(AES, _MODE, aes, _mode, AES_MIN_KEY_SIZE, \
| ^~~~~~~~~~~~~~~~~~~~
drivers/crypto/hisilicon/advca/hisi-advca-muc.c:1311:9: note: in expansion of macro 'hica_muc_tmpl_define_aes'
1311 | hica_muc_tmpl_define_aes(CTR, ctr),
| ^~~~~~~~~~~~~~~~~~~~~~~~vim +77 drivers/crypto/hisilicon/advca/hisi-advca-muc.c
69
70 /* for CTRL reg */
71 #define MUC_DECRYPT BIT(0)
72 #define MUC_MODE GENMASK(3, 1) /* other: as 0 */
73 #define MUC_MODE_ECB 0
74 #define MUC_MODE_CBC 1
75 #define MUC_MODE_CFB 2
76 #define MUC_MODE_OFB 3
> 77 #define MUC_MODE_CTR 4 /* not for DES */
78 #define MUC_ALG GENMASK(5, 4) /* other: as 0 */
79 #define MUC_ALG_DES 0
80 #define MUC_ALG_DES3_EDE 1
81 #define MUC_ALG_AES 2
82 #define MUC_WIDTH GENMASK(7, 6) /* other: as 0 */
83 #define MUC_WIDTH_BLOCK 0
84 #define MUC_WIDTH_8B 1
85 #define MUC_WIDTH_1B 2
86 #define MUC_CHAN0_IV_CHANGE BIT(8)
87 #define MUC_KEY GENMASK(10, 9) /* other: as 0 */
88 #define MUC_KEY_AES_128B 0
89 #define MUC_KEY_AES_192B 1
90 #define MUC_KEY_AES_256B 2
91 #define MUC_KEY_DES 0
92 #define MUC_KEY_DES3_EDE_3KEY 0
93 #define MUC_KEY_DES3_EDE_2KEY 3
94 #define MUC_KEY_FROM_MKL BIT(13)
95 #define MUC_KEY_ID GENMASK(16, 14)
96 #define MUC_WEIGHT GENMASK(31, 22)
97 Signature · 2 lines
0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests
Hi David,
Quoted 16 lines · David Yang
HiSilicon ADVCA Subsystem contains various cryptographic devices, including symmetric key ciphers, hash functions, RSA algorithms, as well as key ladder and OTP memory.
This patch adds symmetric key cipher driver.
Signed-off-by David Yang <[email protected]>---
drivers/crypto/hisilicon/Kconfig | 8 + drivers/crypto/hisilicon/Makefile | 1 + drivers/crypto/hisilicon/advca/Makefile | 1 + .../crypto/hisilicon/advca/hisi-advca-muc.c | 1527 +++++++++++++++++ 4 files changed, 1537 insertions(+)create mode 100644
drivers/crypto/hisilicon/advca/Makefilecreate mode 100644drivers/crypto/hisilicon/advca/hisi-advca-muc.c
[...]
Quoted 6 lines
drivers/crypto/hisilicon/advca/hisi-advca-muc.c new file +0
-0@@ -0,0 +1,1527 @@
[...]
Quoted 2 lines
drivers/crypto/hisilicon/advca/hisi-advca-muc.c new file +2
-0+static int hica_muc_probe (struct platform_device *pdev) +{
[...]
drivers/crypto/hisilicon/advca/hisi-advca-muc.c line 1365
Quoted 1 line
drivers/crypto/hisilicon/advca/hisi-advca-muc.c new file +1
-0+ priv->rst =devm_reset_control_get_optional (dev,NULL );
Please use devm_reset_control_get_optional_exclusive() directly.
Since priv->rst is only ever used in hica_muc_probe(), it could be stored in a local variable instead.
Quoted 15 lines
drivers/crypto/hisilicon/advca/hisi-advca-muc.c new file +15
-0+if (IS_ERR (priv->rst)) +return PTR_ERR (priv->rst); + + ret =platform_get_irq (pdev,0 ); +if (ret <0 ) +return ret; + priv->irqs[0 ] = ret; + priv->irqs[1 ] =platform_get_irq_optional (pdev,1 ); + + priv->algs_num =ARRAY_SIZE (hica_muc_tmpls); + priv->algs =devm_kmalloc_array (dev, priv->algs_num, +sizeof (priv->algs[0 ]),GFP_KERNEL ); +if (!priv->algs) +return -ENOMEM ; +
drivers/crypto/hisilicon/advca/hisi-advca-muc.c line 1390
Quoted 10 lines
drivers/crypto/hisilicon/advca/hisi-advca-muc.c new file +10
-0+init_completion (&priv->cond); + + priv->dev = dev; +platform_set_drvdata (pdev, priv); +dev_set_drvdata (dev, priv); + +/* bring up device */ + ret =reset_control_assert (priv->rst) ?: +clk_bulk_prepare_enable (priv->clks_num, priv->clks) ?: +reset_control_deassert (priv->rst);
Using the ternary operator like this is a bit unconventional. Here, the clocks are kept enabled if the reset_control_deassert() fails.
It would be good to add an error path that disables the clocks.
drivers/crypto/hisilicon/advca/hisi-advca-muc.c line 1398
Quoted 8 lines
drivers/crypto/hisilicon/advca/hisi-advca-muc.c new file +8
-0+if (ret) +return ret; + +if (!(readl (priv->base +MUC_RST_STATUS ) &MUC_STATE_VALID )) { +msleep (20 ); +if (!(readl (priv->base +MUC_RST_STATUS ) &MUC_STATE_VALID )) { +dev_err (dev,"cannot bring up device\n" ); +return -ENODEV ;
This also leaves the clocks enabled. There are some more return statements with the same issue below.
regards
Philipp
PATCH v2 2/2 crypto: hisilicon/advca - Add SHA support
In reply to David YangAdd driver for SHA algorithm family.
Support for state injection was not tested due to lack of such device.
--- drivers/crypto/hisilicon/Kconfig | 3 + drivers/crypto/hisilicon/advca/Makefile | 1 + .../crypto/hisilicon/advca/hisi-advca-sha.c | 644 ++++++++++++++++++ 3 files changed, 648 insertions(+) create mode 100644 drivers/crypto/hisilicon/advca/hisi-advca-sha.c
drivers/crypto/hisilicon/Kconfig +3 -0
@@ -4,6 +4,9 @@ config CRYPTO_DEV_HISI_ADVCA tristate "Support for Hisilicon ADVCA Subsystem" depends on ARCH_HISI || COMPILE_TEST select CRYPTO_SKCIPHER + select CRYPTO_HASH + select CRYPTO_SHA1 + select CRYPTO_SHA256 help Support for Hisilicon ADVCA (Advanced Conditional Access) Subsystem, which can be found on HiSilicon STB SoCs, such as Hi37xx.
drivers/crypto/hisilicon/advca/Makefile +1 -0
@@ -1 +1,2 @@ obj-$(CONFIG_CRYPTO_DEV_HISI_ADVCA) += hisi-advca-muc.o +obj-$(CONFIG_CRYPTO_DEV_HISI_ADVCA) += hisi-advca-sha.o
drivers/crypto/hisilicon/advca/hisi-advca-sha.c new file +644 -0
644 lines not on this page · raw message
Signature · 1 line
2.39.2
kernel test robot
build botRe: [PATCH v2 2/2] crypto: hisilicon/advca - Add SHA support
kernel test robot noticed the following build warnings:
Hi David,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 9a48d604672220545d209e9996c2a1edbb5637f6]
url: https://github.com/intel-lab-lkp/linux/commits/David-Yang/crypto-hisilicon-Add-HiSilicon-ADVCA-Subsystem/20230513-154545 base: 9a48d604672220545d209e9996c2a1edbb5637f6 patch link: https://lore.kernel.org/r/20230513074339.266879-3-mmyangfl%40gmail.com patch subject: [PATCH v2 2/2] crypto: hisilicon/advca - Add SHA support config: loongarch-allmodconfig (https://download.01.org/0day-ci/archive/20230513/[email protected]/config) compiler: loongarch64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/57ff91a10a13d90fadb0567f9245d9040ce9659e
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review David-Yang/crypto-hisilicon-Add-HiSilicon-ADVCA-Subsystem/20230513-154545
git checkout 57ff91a10a13d90fadb0567f9245d9040ce9659e
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=loongarch olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=loongarch SHELL=/bin/bash drivers/crypto/hisilicon/advca/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <[email protected]>
| Link: https://lore.kernel.org/oe-kbuild-all/[email protected]/
All warnings (new ones prefixed by >>):
drivers/crypto/hisilicon/advca/hisi-advca-sha.c: In function 'hica_sha_update':
>> drivers/crypto/hisilicon/advca/hisi-advca-sha.c:216:26: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
216 | bool inplace = !((unsigned int) data & 3);
| ^vim +216 drivers/crypto/hisilicon/advca/hisi-advca-sha.c
211
212 static int hica_sha_update(const struct hica_sha_priv *priv, const void *data,
213 unsigned int len, bool may_sleep)
214 {
215 struct device *dev = priv->dev;
> 216 bool inplace = !((unsigned int) data & 3);
217 u8 *buf = NULL;
218 dma_addr_t addr;
219 int ret;
220
221 if (!len)
222 return 0;
223
224 if (WARN_ON(len % SHA_BLOCK_SIZE))
225 return -EINVAL;
226
227 if (inplace) {
228 addr = dma_map_single(dev, (void *) data, len, DMA_TO_DEVICE);
229 if (dma_mapping_error(dev, addr)) {
230 dev_err(dev, "error mapping src\n");
231 return -EIO;
232 }
233
234 inplace = !(addr & 3);
235 if (!inplace)
236 dma_unmap_single(dev, addr, len, DMA_TO_DEVICE);
237 }
238
239 if (!inplace) {
240 buf = dma_alloc_attrs(dev, len, &addr,
241 may_sleep ? GFP_KERNEL : GFP_ATOMIC, 0);
242 if (!buf)
243 return -ENOMEM;
244 memcpy(buf, data, len);
245 }
246
247 dma_sync_single_for_device(dev, addr, len, DMA_TO_DEVICE);
248 ret = hica_sha_record(priv, addr, len) ?:
249 hica_sha_wait(priv, SHA_RECORD_READY);
250
251 if (!buf)
252 dma_unmap_single(dev, addr, len, DMA_TO_DEVICE);
253 else {
254 memzero_explicit(buf, len);
255 dma_free_attrs(dev, len, buf, addr, 0);
256 }
257
258 pr_debug("%s: read %u\n", __func__, len);
259 return ret;
260 }
261
Signature · 2 lines
0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests
Herbert Xu
maintainerRe: [PATCH v2 2/2] crypto: hisilicon/advca - Add SHA support
In reply to David Yangdrivers/crypto/hisilicon/advca/hisi-advca-sha.c line 273
Quoted 13 lines · David Yang
drivers/crypto/hisilicon/advca/hisi-advca-sha.c new file +12
-0+static int hica_sha_export (const struct hica_sha_priv *priv,void *out, +unsigned int digestsize) +{ +if (hica_sha_wait (priv,SHA_RECORD_READY )) +return -ETIMEDOUT ; + +for (unsigned int i =0 ; i < digestsize; i +=sizeof (u32)) + *(u32 *) (out + i) = +be32_to_cpu (readl_relaxed (priv->base +SHA_OUT0 + i)); + +return 0 ; +}
Can you please explain what this is doing? Is this exporting the finalized hash, or the intermediate state?
If it's exporting the intermediate state, why aren't you implementing an import function?
Thanks,
Signature · 3 lines
Email: Herbert Xu <[email protected]> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Re: [PATCH v2 2/2] crypto: hisilicon/advca - Add SHA support
Quoted 19 lines · Herbert Xu <[email protected]> 于2023年5月19日周五 16:43写道：
drivers/crypto/hisilicon/advca/hisi-advca-sha.c line 273
Quoted 13 lines · David Yang
drivers/crypto/hisilicon/advca/hisi-advca-sha.c new file +12
-0+static int hica_sha_export (const struct hica_sha_priv *priv,void *out, +unsigned int digestsize) +{ +if (hica_sha_wait (priv,SHA_RECORD_READY )) +return -ETIMEDOUT ; + +for (unsigned int i =0 ; i < digestsize; i +=sizeof (u32)) + *(u32 *) (out + i) = +be32_to_cpu (readl_relaxed (priv->base +SHA_OUT0 + i)); + +return 0 ; +}Can you please explain what this is doing? Is this exporting the finalized hash, or the intermediate state?
Quoted 8 lines
If it's exporting the intermediate state, why aren't you implementing an import function?
Thanks,
--
Email: Herbert Xu <[email protected]> Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
The intermediate state. Importing is done by hica_sha_init, since if I got it right, crypto hash api are required to handle multiple requests simultaneously, thus there will be no sense to set ctrl and state separately.
Herbert Xu
maintainerRe: [PATCH v2 2/2] crypto: hisilicon/advca - Add SHA support
Quoted 9 lines · Yangfl
Quoted 3 lines · Herbert Xu <[email protected]> 于2023年5月19日周五 16:43写道：
If it's exporting the intermediate state, why aren't you implementing an import function?
The intermediate state. Importing is done by
hica_sha_init, since if I got it right, crypto hash api are required to handle multiple requests simultaneously, thus there will be no sense to set ctrl and state separately.
So can you please implement a proper import function without a fallback?
Thanks,
Signature · 3 lines
Email: Herbert Xu <[email protected]> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt