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tests/i915_pm_rps: Exercise sysfs thresholds

PATCH In review Tvrtko Ursulin 3 participants 5 messages May 23, 2023 – Jul 3, 2023

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PATCH 1/1 tests/i915_pm_rps: Exercise sysfs thresholds

From: Tvrtko Ursulin <[email protected]>

Exercise a bunch of up and down rps thresholds to verify hardware is happy with them all.

To limit the overall runtime relies on probability and number of runs to approach complete coverage.

---
 tests/i915/i915_pm_rps.c | 232 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 232 insertions(+)
tests/i915/i915_pm_rps.c +232 -0
index 050d68a16559..acff59207311 100644
@@ -39,8 +39,10 @@
 #include "i915/gem.h"
 #include "i915/gem_create.h"
 #include "igt.h"
+#include "igt_aux.h"
 #include "igt_dummyload.h"
 #include "igt_perf.h"
+#include "igt_rand.h"
 #include "igt_sysfs.h"
 /**
  * TEST: i915 pm rps
@@ -914,6 +916,200 @@ static void pm_rps_exit_handler(int sig)
 	close(drm_fd);
 }
 
+static igt_spin_t *__spin_poll(int fd, uint64_t ahnd, const intel_ctx_t *ctx,
+			       const struct intel_execution_engine2 *e)
+{
+	struct igt_spin_factory opts = {
+		.ahnd = ahnd,
+		.ctx = ctx,
+		.engine = e->flags,
+	};
+
+	if (gem_class_can_store_dword(fd, e->class))
+		opts.flags |= IGT_SPIN_POLL_RUN;
+
+	return __igt_spin_factory(fd, &opts);
+}
+
+static unsigned long __spin_wait(int fd, igt_spin_t *spin)
+{
+	struct timespec start = { };
+
+	igt_nsec_elapsed(&start);
+
+	if (igt_spin_has_poll(spin)) {
+		unsigned long timeout = 0;
+
+		while (!igt_spin_has_started(spin)) {
+			unsigned long t = igt_nsec_elapsed(&start);
+
+			igt_assert(gem_bo_busy(fd, spin->handle));
+			if ((t - timeout) > 250e6) {
+				timeout = t;
+				igt_warn("Spinner not running after %.2fms\n",
+					 (double)t / 1e6);
+				igt_assert(t < 2e9);
+			}
+		}
+	} else {
+		igt_debug("__spin_wait - usleep mode\n");
+		usleep(500e3); /* Better than nothing! */
+	}
+
+	igt_assert(gem_bo_busy(fd, spin->handle));
+	return igt_nsec_elapsed(&start);
+}
+
+static igt_spin_t *__spin_sync(int fd, uint64_t ahnd, const intel_ctx_t *ctx,
+			       const struct intel_execution_engine2 *e)
+{
+	igt_spin_t *spin = __spin_poll(fd, ahnd, ctx, e);
+
+	__spin_wait(fd, spin);
+
+	return spin;
+}
+
+static struct i915_engine_class_instance
+find_dword_engine(int i915, const unsigned int gt)
+{
+	struct i915_engine_class_instance *engines, ci = { -1, -1 };
+	unsigned int i, count;
+
+	engines = gem_list_engines(i915, 1u << gt, ~0u, &count);
+	igt_assert(engines);
+
+	for (i = 0; i < count; i++) {
+		if (!gem_class_can_store_dword(i915, engines[i].engine_class))
+			continue;
+
+		ci = engines[i];
+		break;
+	}
+
+	free(engines);
+
+	return ci;
+}
+
+static igt_spin_t *spin_sync_gt(int i915, uint64_t ahnd, unsigned int gt,
+				const intel_ctx_t **ctx)
+{
+	struct i915_engine_class_instance ci = { -1, -1 };
+	struct intel_execution_engine2 e = { };
+
+	ci = find_dword_engine(i915, gt);
+
+	igt_require(ci.engine_class != (uint16_t)I915_ENGINE_CLASS_INVALID);
+
+	if (gem_has_contexts(i915)) {
+		e.class = ci.engine_class;
+		e.instance = ci.engine_instance;
+		e.flags = 0;
+		*ctx = intel_ctx_create_for_engine(i915, e.class, e.instance);
+	} else {
+		igt_require(gt == 0); /* Impossible anyway. */
+		e.class = gem_execbuf_flags_to_engine_class(I915_EXEC_DEFAULT);
+		e.instance = 0;
+		e.flags = I915_EXEC_DEFAULT;
+		*ctx = intel_ctx_0(i915);
+	}
+
+	igt_debug("Using engine %u:%u\n", e.class, e.instance);
+
+	return __spin_sync(i915, ahnd, *ctx, &e);
+}
+
+#define TEST_IDLE 0x1
+#define TEST_PARK 0x2
+static void test_thresholds(int i915, unsigned int gt, unsigned int flags)
+{
+	uint64_t ahnd = get_reloc_ahnd(i915, 0);
+	const unsigned int points = 10;
+	unsigned int def_up, def_down;
+	igt_spin_t *spin = NULL;
+	const intel_ctx_t *ctx;
+	unsigned int *ta, *tb;
+	unsigned int i;
+	int sysfs;
+
+	sysfs = igt_sysfs_gt_open(i915, gt);
+	igt_require(sysfs >= 0);
+
+	/* Feature test */
+	def_up = igt_sysfs_get_u32(sysfs, "rps_up_threshold_pct");
+	def_down = igt_sysfs_get_u32(sysfs, "rps_down_threshold_pct");
+	igt_require(def_up && def_down);
+
+	/* Check invalid percentages are rejected */
+	igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_up_threshold_pct", 101), false);
+	igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_down_threshold_pct", 101), false);
+
+	/*
+	 * Invent some random up-down thresholds, but always include 0 and 100
+	 * just to have some wild edge cases.
+	 */
+	ta = calloc(points, sizeof(unsigned int));
+	tb = calloc(points, sizeof(unsigned int));
+	igt_require(ta && tb);
+
+	ta[0] = tb[0] = 0;
+	ta[1] = tb[1] = 100;
+	hars_petruska_f54_1_random_seed(time(NULL));
+	for (i = 2; i < points; i++) {
+		ta[i] = hars_petruska_f54_1_random_unsafe_max(100);
+		tb[i] = hars_petruska_f54_1_random_unsafe_max(100);
+	}
+	igt_permute_array(ta, points, igt_exchange_int);
+	igt_permute_array(tb, points, igt_exchange_int);
+
+	/* Exercise the thresholds with a GPU load to trigger park/unpark etc */
+	for (i = 0; i < points; i++) {
+		igt_info("Testing thresholds up %u%% and down %u%%...\n", ta[i], tb[i]);
+		igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_up_threshold_pct", ta[i]), true);
+		igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_down_threshold_pct", tb[i]), true);
+
+		if (flags & TEST_IDLE) {
+			gem_quiescent_gpu(i915);
+		} else if (spin) {
+			intel_ctx_destroy(i915, ctx);
+			igt_spin_free(i915, spin);
+			spin = NULL;
+			if (flags & TEST_PARK) {
+				gem_quiescent_gpu(i915);
+				usleep(500000);
+			}
+		}
+		spin = spin_sync_gt(i915, ahnd, gt, &ctx);
+		usleep(1000000);
+		if (flags & TEST_IDLE) {
+			intel_ctx_destroy(i915, ctx);
+			igt_spin_free(i915, spin);
+			if (flags & TEST_PARK) {
+				gem_quiescent_gpu(i915);
+				usleep(500000);
+			}
+			spin = NULL;
+		}
+	}
+
+	if (spin) {
+		intel_ctx_destroy(i915, ctx);
+		igt_spin_free(i915, spin);
+	}
+
+	gem_quiescent_gpu(i915);
+
+	/* Restore defaults */
+	igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_up_threshold_pct", def_up), true);
+	igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_down_threshold_pct", def_down), true);
+
+	free(ta);
+	free(tb);
+	close(sysfs);
+	put_ahnd(ahnd);
+}
+
 igt_main
 {
 	igt_fixture {
@@ -993,4 +1189,40 @@ igt_main
 		waitboost(drm_fd, true);
 		igt_disallow_hang(drm_fd, hang);
 	}
+
+	igt_subtest_with_dynamic("thresholds-idle") {
+		int tmp, gt;
+
+		i915_for_each_gt(drm_fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_thresholds(drm_fd, gt, TEST_IDLE);
+		}
+	}
+
+	igt_subtest_with_dynamic("thresholds") {
+		int tmp, gt;
+
+		i915_for_each_gt(drm_fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_thresholds(drm_fd, gt, 0);
+		}
+	}
+
+	igt_subtest_with_dynamic("thresholds-park") {
+		int tmp, gt;
+
+		i915_for_each_gt(drm_fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_thresholds(drm_fd, gt, TEST_PARK);
+		}
+	}
+
+	igt_subtest_with_dynamic("thresholds-idle-park") {
+		int tmp, gt;
+
+		i915_for_each_gt(drm_fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_thresholds(drm_fd, gt, TEST_IDLE | TEST_PARK);
+		}
+	}
 }
Signature · 1 line
2.39.2
#1 lore raw

[igt-dev] ✓ Fi.CI.BAT: success for tests/i915_pm_rps: Exercise sysfs thresholds

== Series Details ==

== Series Details ==

Series: tests/i915_pm_rps: Exercise sysfs thresholds
URL : https://patchwork.freedesktop.org/series/118207/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13176 -> IGTPW_9022
====================================================

Summary
-------

**SUCCESS**

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/index.html

Participating hosts (37 -> 38)
------------------------------

Additional (2): bat-rpls-2 bat-mtlp-6
Missing (1): fi-snb-2520m

Known issues
------------

Here are the changes found in IGTPW_9022 that come from known issues:

### IGT changes ###

#### Issues hit ####

* igt@debugfs_test@basic-hwmon:
- bat-rpls-2: NOTRUN -> [SKIP][1] ([i915#7456])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@fbdev@read:
- bat-rpls-2: NOTRUN -> [SKIP][2] ([i915#2582]) +4 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@gem_lmem_swapping@verify-random:
- bat-rpls-2: NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@gem_tiled_pread_basic:
- bat-rpls-2: NOTRUN -> [SKIP][4] ([i915#3282])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@gem_tiled_pread_basic.html

* igt@i915_pm_backlight@basic-brightness:
- bat-rpls-2: NOTRUN -> [SKIP][5] ([i915#7561])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@i915_pm_rps@basic-api:
- bat-rpls-2: NOTRUN -> [SKIP][6] ([i915#6621])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@i915_selftest@live@gt_pm:
- bat-rpls-2: NOTRUN -> [DMESG-FAIL][7] ([i915#4258] / [i915#7913])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@i915_selftest@live@gt_pm.html

* igt@i915_selftest@live@slpc:
- bat-rpls-2: NOTRUN -> [DMESG-WARN][8] ([i915#6367])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@i915_selftest@[email protected]

* igt@i915_suspend@basic-s2idle-without-i915:
- bat-rpls-2: NOTRUN -> [ABORT][9] ([i915#6687])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@kms_busy@basic:
- bat-rpls-2: NOTRUN -> [SKIP][10] ([i915#1845]) +14 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@kms_chamelium_edid@hdmi-edid-read:
- bat-rpls-2: NOTRUN -> [SKIP][11] ([i915#7828]) +7 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@kms_flip@basic-flip-vs-dpms:
- bat-rpls-2: NOTRUN -> [SKIP][12] ([i915#3637]) +3 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@kms_force_connector_basic@force-load-detect:
- bat-rpls-2: NOTRUN -> [SKIP][13] ([fdo#109285])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@kms_frontbuffer_tracking@basic:
- bat-rpls-2: NOTRUN -> [SKIP][14] ([i915#1849])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][15] ([i915#1845] / [i915#5354]) +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-dg2-11/igt@[email protected]

* igt@kms_psr@sprite_plane_onoff:
- bat-rpls-2: NOTRUN -> [SKIP][16] ([i915#1072]) +3 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@kms_psr@sprite_plane_onoff.html

* igt@kms_setmode@basic-clone-single-crtc:
- bat-rpls-2: NOTRUN -> [SKIP][17] ([i915#3555] / [i915#4579])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@prime_vgem@basic-fence-flip:
- bat-rpls-2: NOTRUN -> [SKIP][18] ([fdo#109295] / [i915#1845] / [i915#3708])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

* igt@prime_vgem@basic-fence-read:
- bat-rpls-2: NOTRUN -> [SKIP][19] ([fdo#109295] / [i915#3708]) +2 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-2/igt@[email protected]

#### Possible fixes ####

* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
- bat-dg2-8: [FAIL][20] ([i915#7932]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/bat-dg2-8/igt@kms_pipe_crc_basic@[email protected]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-dg2-8/igt@kms_pipe_crc_basic@[email protected]

#### Warnings ####

* igt@i915_selftest@live@reset:
- bat-rpls-1: [ABORT][22] ([i915#4983] / [i915#7461] / [i915#7981] / [i915#8347] / [i915#8384]) -> [ABORT][23] ([i915#4983] / [i915#7461] / [i915#8347] / [i915#8384])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/bat-rpls-1/igt@i915_selftest@[email protected]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rpls-1/igt@i915_selftest@[email protected]

* igt@kms_setmode@basic-clone-single-crtc:
- bat-rplp-1: [SKIP][24] ([i915#3555] / [i915#4579]) -> [ABORT][25] ([i915#4579] / [i915#8260])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/bat-rplp-1/igt@[email protected]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/bat-rplp-1/igt@[email protected]

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

[IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
[i915#8260]: https://gitlab.freedesktop.org/drm/intel/issues/8260
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
[i915#8384]: https://gitlab.freedesktop.org/drm/intel/issues/8384

Build changes
-------------

* CI: CI-20190529 -> None
* IGT: IGT_7300 -> IGTPW_9022

CI-20190529: 20190529
CI_DRM_13176: 216281f91018b24567e59ae46ce7e96fb92063cf @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9022: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/index.html
IGT_7300: da81a90afee713460d783164f2456524623d3016 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

Testlist changes
----------------

+igt@i915_pm_rps@thresholds
+igt@i915_pm_rps@thresholds-idle
+igt@i915_pm_rps@thresholds-idle-park
+igt@i915_pm_rps@thresholds-park

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/index.html

#2 lore raw

[igt-dev] ✓ Fi.CI.IGT: success for tests/i915_pm_rps: Exercise sysfs thresholds

In reply to Tvrtko Ursulin
== Series Details ==

== Series Details ==

Series: tests/i915_pm_rps: Exercise sysfs thresholds
URL : https://patchwork.freedesktop.org/series/118207/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13176_full -> IGTPW_9022_full
====================================================

Summary
-------

**SUCCESS**

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/index.html

Participating hosts (7 -> 7)
------------------------------

No changes in participating hosts

Possible new issues
-------------------

Here are the unknown changes that may have been introduced in IGTPW_9022_full:

### IGT changes ###

#### Suppressed ####

The following results come from untrusted machines, tests, or statuses. They do not affect the overall result.

* igt@gem_ctx_param@vm:
- {shard-dg1}: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-dg1-17/igt@[email protected]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-dg1-15/igt@[email protected]

New tests
---------

New tests have been introduced between CI_DRM_13176_full and IGTPW_9022_full:

### New IGT tests (8) ###

* igt@i915_pm_rps@thresholds:
- Statuses :
- Exec time: [None] s

* igt@i915_pm_rps@thresholds-idle:
- Statuses :
- Exec time: [None] s

* igt@i915_pm_rps@thresholds-idle-park:
- Statuses :
- Exec time: [None] s

* igt@i915_pm_rps@thresholds-idle-park@gt0:
- Statuses : 6 skip(s)
- Exec time: [0.0] s

* igt@i915_pm_rps@thresholds-idle@gt0:
- Statuses : 4 skip(s)
- Exec time: [0.0] s

* igt@i915_pm_rps@thresholds-park:
- Statuses :
- Exec time: [None] s

* igt@i915_pm_rps@thresholds-park@gt0:
- Statuses : 5 skip(s)
- Exec time: [0.0] s

* igt@i915_pm_rps@thresholds@gt0:
- Statuses : 6 skip(s)
- Exec time: [0.0] s

Known issues
------------

Here are the changes found in IGTPW_9022_full that come from known issues:

### IGT changes ###

#### Issues hit ####

* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [PASS][3] -> [FAIL][4] ([i915#2842])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-apl3/igt@gem_exec_fair@[email protected]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-apl6/igt@gem_exec_fair@[email protected]

* igt@i915_pm_dc@dc9-dpms:
- shard-apl: [PASS][5] -> [SKIP][6] ([fdo#109271])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-apl3/igt@[email protected]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-apl4/igt@[email protected]

* {igt@i915_pm_rps@thresholds-idle-park@gt0} (NEW):
- {shard-tglu}: NOTRUN -> [SKIP][7] ([i915#4579]) +3 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-tglu-2/igt@i915_pm_rps@[email protected]
- shard-glk: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4579]) +3 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-glk2/igt@i915_pm_rps@[email protected]

* {igt@i915_pm_rps@thresholds-idle@gt0} (NEW):
- shard-apl: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#4579]) +3 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-apl3/igt@i915_pm_rps@[email protected]

* {igt@i915_pm_rps@thresholds-park@gt0} (NEW):
- {shard-dg1}: NOTRUN -> [SKIP][10] ([i915#4579]) +2 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-dg1-17/igt@i915_pm_rps@[email protected]

* {igt@i915_pm_rps@thresholds@gt0} (NEW):
- {shard-rkl}: NOTRUN -> [SKIP][11] ([i915#4579]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-rkl-6/igt@i915_pm_rps@[email protected]

* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [PASS][12] -> [FAIL][13] ([IGT#6] / [i915#2346]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-glk9/igt@[email protected]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-glk7/igt@[email protected]

* igt@kms_flip@flip-vs-expired-vblank@b-dp1:
- shard-apl: [PASS][14] -> [FAIL][15] ([i915#79])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-apl1/igt@kms_flip@[email protected]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-apl3/igt@kms_flip@[email protected]

* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-apl: [PASS][16] -> [ABORT][17] ([i915#180]) +1 similar issue
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-apl2/igt@kms_flip@[email protected]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-apl6/igt@kms_flip@[email protected]

* igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-vga-1:
- shard-snb: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4579]) +19 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-snb4/igt@kms_plane_scaling@[email protected]

* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-hdmi-a-1:
- shard-snb: NOTRUN -> [SKIP][19] ([fdo#109271]) +39 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-snb1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-hdmi-a-1.html

* igt@kms_setmode@basic@pipe-a-vga-1:
- shard-snb: NOTRUN -> [FAIL][20] ([i915#5465]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-snb2/igt@kms_setmode@[email protected]

#### Possible fixes ####

* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- {shard-rkl}: [FAIL][21] ([i915#7742]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-rkl-1/igt@drm_fdinfo@[email protected]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-rkl-2/igt@drm_fdinfo@[email protected]

* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-tglu}: [FAIL][23] ([i915#6268]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-tglu-2/igt@[email protected]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-tglu-5/igt@[email protected]

* igt@gem_exec_fair@basic-deadline:
- shard-apl: [FAIL][25] ([i915#2846]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-apl4/igt@[email protected]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-apl2/igt@[email protected]

* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk: [FAIL][27] ([i915#2842]) -> [PASS][28] +3 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-glk7/igt@gem_exec_fair@[email protected]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-glk5/igt@gem_exec_fair@[email protected]

* igt@gem_exec_fair@basic-pace-share@rcs0:
- {shard-tglu}: [FAIL][29] ([i915#2842]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-tglu-8/igt@gem_exec_fair@[email protected]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-tglu-2/igt@gem_exec_fair@[email protected]

* igt@gem_exec_fair@basic-pace@rcs0:
- {shard-rkl}: [FAIL][31] ([i915#2842]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-rkl-7/igt@gem_exec_fair@[email protected]
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-rkl-1/igt@gem_exec_fair@[email protected]

* igt@gem_exec_whisper@basic-fds-priority-all:
- {shard-tglu}: [INCOMPLETE][33] ([i915#6755] / [i915#7392]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-tglu-5/igt@[email protected]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-tglu-7/igt@[email protected]

* igt@gem_mmap_gtt@fault-concurrent-y:
- shard-snb: [ABORT][35] ([i915#5161]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-snb6/igt@[email protected]
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-snb6/igt@[email protected]

* igt@i915_pm_rc6_residency@rc6-idle@bcs0:
- {shard-dg1}: [FAIL][37] ([i915#3591]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-dg1-12/igt@i915_pm_rc6_residency@[email protected]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-dg1-18/igt@i915_pm_rc6_residency@[email protected]

* igt@i915_pm_rpm@dpms-non-lpsp:
- {shard-rkl}: [SKIP][39] ([i915#1397]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-rkl-7/igt@[email protected]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-rkl-1/igt@[email protected]

* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-apl: [FAIL][41] ([IGT#6] / [i915#2346]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-apl6/igt@[email protected]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-apl4/igt@[email protected]

* igt@kms_flip@2x-plain-flip-fb-recreate@bc-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][43] ([i915#2122]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-glk2/igt@kms_flip@[email protected]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-glk8/igt@kms_flip@[email protected]

* igt@kms_flip@flip-vs-suspend@d-hdmi-a4:
- {shard-dg1}: [INCOMPLETE][45] -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13176/shard-dg1-14/igt@kms_flip@[email protected]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/shard-dg1-12/igt@kms_flip@[email protected]

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

[IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#5161]: https://gitlab.freedesktop.org/drm/intel/issues/5161
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6755]: https://gitlab.freedesktop.org/drm/intel/issues/6755
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6786]: https://gitlab.freedesktop.org/drm/intel/issues/6786
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292

Build changes
-------------

* CI: CI-20190529 -> None
* IGT: IGT_7300 -> IGTPW_9022
* Piglit: piglit_4509 -> None

CI-20190529: 20190529
CI_DRM_13176: 216281f91018b24567e59ae46ce7e96fb92063cf @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9022: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/index.html
IGT_7300: da81a90afee713460d783164f2456524623d3016 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9022/index.html

#3 lore raw
In reply to Tvrtko Ursulin
Quoted 76 lines · Tvrtko Ursulin

From: Tvrtko Ursulin <[email protected]>

Exercise a bunch of up and down rps thresholds to verify hardware is happy with them all.

To limit the overall runtime relies on probability and number of runs to approach complete coverage.

---
  tests/i915/i915_pm_rps.c | 232 +++++++++++++++++++++++++++++++++++++++
  1 file changed, 232 insertions(+)
tests/i915/i915_pm_rps.c +45 -0
index 050d68a16559..acff59207311 100644
@@ -39,8 +39,10 @@
  #include "i915/gem.h"
  #include "i915/gem_create.h"
  #include "igt.h"
+#include "igt_aux.h"
  #include "igt_dummyload.h"
  #include "igt_perf.h"
+#include "igt_rand.h"
  #include "igt_sysfs.h"
  /**
   * TEST: i915 pm rps
@@ -914,6 +916,200 @@ static void pm_rps_exit_handler(int sig)
  	close(drm_fd);
  }
 
+static igt_spin_t *__spin_poll(int fd, uint64_t ahnd, const intel_ctx_t *ctx,
+			       const struct intel_execution_engine2 *e)
+{
+	struct igt_spin_factory opts = {
+		.ahnd = ahnd,
+		.ctx = ctx,
+		.engine = e->flags,
+	};
+
+	if (gem_class_can_store_dword(fd, e->class))
+		opts.flags |= IGT_SPIN_POLL_RUN;
+
+	return __igt_spin_factory(fd, &opts);
+}
+
+static unsigned long __spin_wait(int fd, igt_spin_t *spin)
+{
+	struct timespec start = { };
+
+	igt_nsec_elapsed(&start);
+
+	if (igt_spin_has_poll(spin)) {
+		unsigned long timeout = 0;
+
+		while (!igt_spin_has_started(spin)) {
+			unsigned long t = igt_nsec_elapsed(&start);
+
+			igt_assert(gem_bo_busy(fd, spin->handle));
+			if ((t - timeout) > 250e6) {
+				timeout = t;
+				igt_warn("Spinner not running after %.2fms\n",
+					 (double)t / 1e6);
+				igt_assert(t < 2e9);
+			}
+		}
+	} else {
+		igt_debug("__spin_wait - usleep mode\n");
+		usleep(500e3); /* Better than nothing! */
+	}
+
+	igt_assert(gem_bo_busy(fd, spin->handle));
+	return igt_nsec_elapsed(&start);
+}

tests/i915/i915_pm_rps.c static void pm_rps_exit_handler(int sig) · line 971

Quoted 10 lines
tests/i915/i915_pm_rps.c +10 -0
+
+static igt_spin_t *__spin_sync(int fd, uint64_t ahnd, const intel_ctx_t *ctx,
+			       const struct intel_execution_engine2 *e)
+{
+	igt_spin_t *spin = __spin_poll(fd, ahnd, ctx, e);
+
+	__spin_wait(fd, spin);
+
+	return spin;
+}

All the above spin functions have been duplicated across 2-3 tests, time to create a lib for them?

Quoted 89 lines
tests/i915/i915_pm_rps.c +89 -0
+
+static struct i915_engine_class_instance
+find_dword_engine(int i915, const unsigned int gt)
+{
+	struct i915_engine_class_instance *engines, ci = { -1, -1 };
+	unsigned int i, count;
+
+	engines = gem_list_engines(i915, 1u << gt, ~0u, &count);
+	igt_assert(engines);
+
+	for (i = 0; i < count; i++) {
+		if (!gem_class_can_store_dword(i915, engines[i].engine_class))
+			continue;
+
+		ci = engines[i];
+		break;
+	}
+
+	free(engines);
+
+	return ci;
+}
+
+static igt_spin_t *spin_sync_gt(int i915, uint64_t ahnd, unsigned int gt,
+				const intel_ctx_t **ctx)
+{
+	struct i915_engine_class_instance ci = { -1, -1 };
+	struct intel_execution_engine2 e = { };
+
+	ci = find_dword_engine(i915, gt);
+
+	igt_require(ci.engine_class != (uint16_t)I915_ENGINE_CLASS_INVALID);
+
+	if (gem_has_contexts(i915)) {
+		e.class = ci.engine_class;
+		e.instance = ci.engine_instance;
+		e.flags = 0;
+		*ctx = intel_ctx_create_for_engine(i915, e.class, e.instance);
+	} else {
+		igt_require(gt == 0); /* Impossible anyway. */
+		e.class = gem_execbuf_flags_to_engine_class(I915_EXEC_DEFAULT);
+		e.instance = 0;
+		e.flags = I915_EXEC_DEFAULT;
+		*ctx = intel_ctx_0(i915);
+	}
+
+	igt_debug("Using engine %u:%u\n", e.class, e.instance);
+
+	return __spin_sync(i915, ahnd, *ctx, &e);
+}
+
+#define TEST_IDLE 0x1
+#define TEST_PARK 0x2
+static void test_thresholds(int i915, unsigned int gt, unsigned int flags)
+{
+	uint64_t ahnd = get_reloc_ahnd(i915, 0);
+	const unsigned int points = 10;
+	unsigned int def_up, def_down;
+	igt_spin_t *spin = NULL;
+	const intel_ctx_t *ctx;
+	unsigned int *ta, *tb;
+	unsigned int i;
+	int sysfs;
+
+	sysfs = igt_sysfs_gt_open(i915, gt);
+	igt_require(sysfs >= 0);
+
+	/* Feature test */
+	def_up = igt_sysfs_get_u32(sysfs, "rps_up_threshold_pct");
+	def_down = igt_sysfs_get_u32(sysfs, "rps_down_threshold_pct");
+	igt_require(def_up && def_down);
+
+	/* Check invalid percentages are rejected */
+	igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_up_threshold_pct", 101), false);
+	igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_down_threshold_pct", 101), false);
+
+	/*
+	 * Invent some random up-down thresholds, but always include 0 and 100
+	 * just to have some wild edge cases.
+	 */
+	ta = calloc(points, sizeof(unsigned int));
+	tb = calloc(points, sizeof(unsigned int));
+	igt_require(ta && tb);
+
+	ta[0] = tb[0] = 0;
+	ta[1] = tb[1] = 100;
+	hars_petruska_f54_1_random_seed(time(NULL));
+	for (i = 2; i < points; i++) {
+		ta[i] = hars_petruska_f54_1_random_unsafe_max(100);

tests/i915/i915_pm_rps.c static void pm_rps_exit_handler(int sig) · line 1070

Quoted 10 lines
tests/i915/i915_pm_rps.c +10 -0
+		tb[i] = hars_petruska_f54_1_random_unsafe_max(100);
+	}
+	igt_permute_array(ta, points, igt_exchange_int);
+	igt_permute_array(tb, points, igt_exchange_int);
+
+	/* Exercise the thresholds with a GPU load to trigger park/unpark etc */
+	for (i = 0; i < points; i++) {
+		igt_info("Testing thresholds up %u%% and down %u%%...\n", ta[i], tb[i]);
+		igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_up_threshold_pct", ta[i]), true);
+		igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_down_threshold_pct", tb[i]), true);

Do we care if threshold_down > threshold_up?

Thanks,

Vinay.

Quoted 86 lines
tests/i915/i915_pm_rps.c +78 -0
+
+		if (flags & TEST_IDLE) {
+			gem_quiescent_gpu(i915);
+		} else if (spin) {
+			intel_ctx_destroy(i915, ctx);
+			igt_spin_free(i915, spin);
+			spin = NULL;
+			if (flags & TEST_PARK) {
+				gem_quiescent_gpu(i915);
+				usleep(500000);
+			}
+		}
+		spin = spin_sync_gt(i915, ahnd, gt, &ctx);
+		usleep(1000000);
+		if (flags & TEST_IDLE) {
+			intel_ctx_destroy(i915, ctx);
+			igt_spin_free(i915, spin);
+			if (flags & TEST_PARK) {
+				gem_quiescent_gpu(i915);
+				usleep(500000);
+			}
+			spin = NULL;
+		}
+	}
+
+	if (spin) {
+		intel_ctx_destroy(i915, ctx);
+		igt_spin_free(i915, spin);
+	}
+
+	gem_quiescent_gpu(i915);
+
+	/* Restore defaults */
+	igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_up_threshold_pct", def_up), true);
+	igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_down_threshold_pct", def_down), true);
+
+	free(ta);
+	free(tb);
+	close(sysfs);
+	put_ahnd(ahnd);
+}
+
  igt_main
  {
  	igt_fixture {
@@ -993,4 +1189,40 @@ igt_main
  		waitboost(drm_fd, true);
  		igt_disallow_hang(drm_fd, hang);
  	}
+
+	igt_subtest_with_dynamic("thresholds-idle") {
+		int tmp, gt;
+
+		i915_for_each_gt(drm_fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_thresholds(drm_fd, gt, TEST_IDLE);
+		}
+	}
+
+	igt_subtest_with_dynamic("thresholds") {
+		int tmp, gt;
+
+		i915_for_each_gt(drm_fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_thresholds(drm_fd, gt, 0);
+		}
+	}
+
+	igt_subtest_with_dynamic("thresholds-park") {
+		int tmp, gt;
+
+		i915_for_each_gt(drm_fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_thresholds(drm_fd, gt, TEST_PARK);
+		}
+	}
+
+	igt_subtest_with_dynamic("thresholds-idle-park") {
+		int tmp, gt;
+
+		i915_for_each_gt(drm_fd, tmp, gt) {
+			igt_dynamic_f("gt%u", gt)
+				test_thresholds(drm_fd, gt, TEST_IDLE | TEST_PARK);
+		}
+	}
  }
#4 lore raw
Quoted 82 lines · Vinay
Quoted 80 lines · Tvrtko Ursulin

From: Tvrtko Ursulin <[email protected]>

Exercise a bunch of up and down rps thresholds to verify hardware is happy with them all.

To limit the overall runtime relies on probability and number of runs to approach complete coverage.

---
  tests/i915/i915_pm_rps.c | 232 +++++++++++++++++++++++++++++++++++++++

  1 file changed, 232 insertions(+)
tests/i915/i915_pm_rps.c +48 -0
index 050d68a16559..acff59207311 100644
@@ -39,8 +39,10 @@
   #include "i915/gem.h"
   #include "i915/gem_create.h"
   #include "igt.h"
+#include "igt_aux.h"
   #include "igt_dummyload.h"
   #include "igt_perf.h"
+#include "igt_rand.h"
   #include "igt_sysfs.h"
   /**
    * TEST: i915 pm rps
@@ -914,6 +916,200 @@ static void pm_rps_exit_handler(int sig)
       close(drm_fd);
   }
+static igt_spin_t *__spin_poll(int fd, uint64_t ahnd, const 
 intel_ctx_t *ctx,
+                   const struct intel_execution_engine2 *e)
+{
+    struct igt_spin_factory opts = {
+        .ahnd = ahnd,
+        .ctx = ctx,
+        .engine = e->flags,
+    };
+
+    if (gem_class_can_store_dword(fd, e->class))
+        opts.flags |= IGT_SPIN_POLL_RUN;
+
+    return __igt_spin_factory(fd, &opts);
+}
+
+static unsigned long __spin_wait(int fd, igt_spin_t *spin)
+{
+    struct timespec start = { };
+
+    igt_nsec_elapsed(&start);
+
+    if (igt_spin_has_poll(spin)) {
+        unsigned long timeout = 0;
+
+        while (!igt_spin_has_started(spin)) {
+            unsigned long t = igt_nsec_elapsed(&start);
+
+            igt_assert(gem_bo_busy(fd, spin->handle));
+            if ((t - timeout) > 250e6) {
+                timeout = t;
+                igt_warn("Spinner not running after %.2fms\n",
+                     (double)t / 1e6);
+                igt_assert(t < 2e9);
+            }
+        }
+    } else {
+        igt_debug("__spin_wait - usleep mode\n");
+        usleep(500e3); /* Better than nothing! */
+    }
+
+    igt_assert(gem_bo_busy(fd, spin->handle));
+    return igt_nsec_elapsed(&start);
+}
+
+static igt_spin_t *__spin_sync(int fd, uint64_t ahnd, const 
 intel_ctx_t *ctx,
+                   const struct intel_execution_engine2 *e)
Quoted 8 lines

tests/i915/i915_pm_rps.c static void pm_rps_exit_handler(int sig) · line 971

Quoted 7 lines
tests/i915/i915_pm_rps.c +7 -0
+{
+    igt_spin_t *spin = __spin_poll(fd, ahnd, ctx, e);
+
+    __spin_wait(fd, spin);
+
+    return spin;
+}

All the above spin functions have been duplicated across 2-3 tests, time to create a lib for them?

Three is the magic number so yes, a reasonable ask - done locally. Holding off the re-send though until the 2nd point below is discussed.

Quoted 102 lines
Quoted 102 lines
tests/i915/i915_pm_rps.c +74 -0
+
+static struct i915_engine_class_instance
+find_dword_engine(int i915, const unsigned int gt)
+{
+    struct i915_engine_class_instance *engines, ci = { -1, -1 };
+    unsigned int i, count;
+
+    engines = gem_list_engines(i915, 1u << gt, ~0u, &count);
+    igt_assert(engines);
+
+    for (i = 0; i < count; i++) {
+        if (!gem_class_can_store_dword(i915, engines[i].engine_class))
+            continue;
+
+        ci = engines[i];
+        break;
+    }
+
+    free(engines);
+
+    return ci;
+}
+
+static igt_spin_t *spin_sync_gt(int i915, uint64_t ahnd, unsigned int 
 gt,
+                const intel_ctx_t **ctx)
+{
+    struct i915_engine_class_instance ci = { -1, -1 };
+    struct intel_execution_engine2 e = { };
+
+    ci = find_dword_engine(i915, gt);
+
+    igt_require(ci.engine_class != (uint16_t)I915_ENGINE_CLASS_INVALID);
+
+    if (gem_has_contexts(i915)) {
+        e.class = ci.engine_class;
+        e.instance = ci.engine_instance;
+        e.flags = 0;
+        *ctx = intel_ctx_create_for_engine(i915, e.class, e.instance);
+    } else {
+        igt_require(gt == 0); /* Impossible anyway. */
+        e.class = gem_execbuf_flags_to_engine_class(I915_EXEC_DEFAULT);
+        e.instance = 0;
+        e.flags = I915_EXEC_DEFAULT;
+        *ctx = intel_ctx_0(i915);
+    }
+
+    igt_debug("Using engine %u:%u\n", e.class, e.instance);
+
+    return __spin_sync(i915, ahnd, *ctx, &e);
+}
+
+#define TEST_IDLE 0x1
+#define TEST_PARK 0x2
+static void test_thresholds(int i915, unsigned int gt, unsigned int 
 flags)
+{
+    uint64_t ahnd = get_reloc_ahnd(i915, 0);
+    const unsigned int points = 10;
+    unsigned int def_up, def_down;
+    igt_spin_t *spin = NULL;
+    const intel_ctx_t *ctx;
+    unsigned int *ta, *tb;
+    unsigned int i;
+    int sysfs;
+
+    sysfs = igt_sysfs_gt_open(i915, gt);
+    igt_require(sysfs >= 0);
+
+    /* Feature test */
+    def_up = igt_sysfs_get_u32(sysfs, "rps_up_threshold_pct");
+    def_down = igt_sysfs_get_u32(sysfs, "rps_down_threshold_pct");
+    igt_require(def_up && def_down);
+
+    /* Check invalid percentages are rejected */
+    igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_up_threshold_pct", 

101), false);
+    igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_down_threshold_pct", 101), false);
+
+    /*
+     * Invent some random up-down thresholds, but always include 0 and 100
+     * just to have some wild edge cases.
+     */
+    ta = calloc(points, sizeof(unsigned int));
+    tb = calloc(points, sizeof(unsigned int));
+    igt_require(ta && tb);

tests/i915/i915_pm_rps.c +12 -0
+
+    ta[0] = tb[0] = 0;
+    ta[1] = tb[1] = 100;
+    hars_petruska_f54_1_random_seed(time(NULL));
+    for (i = 2; i < points; i++) {
+        ta[i] = hars_petruska_f54_1_random_unsafe_max(100);
+        tb[i] = hars_petruska_f54_1_random_unsafe_max(100);
+    }
+    igt_permute_array(ta, points, igt_exchange_int);
+    igt_permute_array(tb, points, igt_exchange_int);
+
+    /* Exercise the thresholds with a GPU load to trigger park/unpark 

etc */
+    for (i = 0; i < points; i++) {

Quoted 8 lines
Quoted 6 lines

+        igt_info("Testing thresholds up %u%% and down %u%%...\n", ta[i], tb[i]);
+        igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_up_threshold_pct", ta[i]), true);
+        igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_down_threshold_pct", tb[i]), true);

Do we care if threshold_down > threshold_up?

We should avoid creating a policy unless there is no other choice. I don't know - can we categorically say it never make sense to have down greater than up? For any GPU, number of discrete frequencies, workload, use case? You are more at home in this area.

Regards,

Tvrtko

Quoted 93 lines

Thanks,

Vinay.

Quoted 88 lines
tests/i915/i915_pm_rps.c +34 -0
+
+        if (flags & TEST_IDLE) {
+            gem_quiescent_gpu(i915);
+        } else if (spin) {
+            intel_ctx_destroy(i915, ctx);
+            igt_spin_free(i915, spin);
+            spin = NULL;
+            if (flags & TEST_PARK) {
+                gem_quiescent_gpu(i915);
+                usleep(500000);
+            }
+        }
+        spin = spin_sync_gt(i915, ahnd, gt, &ctx);
+        usleep(1000000);
+        if (flags & TEST_IDLE) {
+            intel_ctx_destroy(i915, ctx);
+            igt_spin_free(i915, spin);
+            if (flags & TEST_PARK) {
+                gem_quiescent_gpu(i915);
+                usleep(500000);
+            }
+            spin = NULL;
+        }
+    }
+
+    if (spin) {
+        intel_ctx_destroy(i915, ctx);
+        igt_spin_free(i915, spin);
+    }
+
+    gem_quiescent_gpu(i915);
+
+    /* Restore defaults */
+    igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_up_threshold_pct", 

def_up), true);
+    igt_assert_eq(igt_sysfs_set_u32(sysfs, "rps_down_threshold_pct", def_down), true);

tests/i915/i915_pm_rps.c +7 -0
+
+    free(ta);
+    free(tb);
+    close(sysfs);
+    put_ahnd(ahnd);
+}
+

  igt_main
  {
      igt_fixture {

tests/i915/i915_pm_rps.c +36 -0
@@ -993,4 +1189,40 @@ igt_main
           waitboost(drm_fd, true);
           igt_disallow_hang(drm_fd, hang);
       }
+
+    igt_subtest_with_dynamic("thresholds-idle") {
+        int tmp, gt;
+
+        i915_for_each_gt(drm_fd, tmp, gt) {
+            igt_dynamic_f("gt%u", gt)
+                test_thresholds(drm_fd, gt, TEST_IDLE);
+        }
+    }
+
+    igt_subtest_with_dynamic("thresholds") {
+        int tmp, gt;
+
+        i915_for_each_gt(drm_fd, tmp, gt) {
+            igt_dynamic_f("gt%u", gt)
+                test_thresholds(drm_fd, gt, 0);
+        }
+    }
+
+    igt_subtest_with_dynamic("thresholds-park") {
+        int tmp, gt;
+
+        i915_for_each_gt(drm_fd, tmp, gt) {
+            igt_dynamic_f("gt%u", gt)
+                test_thresholds(drm_fd, gt, TEST_PARK);
+        }
+    }
+
+    igt_subtest_with_dynamic("thresholds-idle-park") {
+        int tmp, gt;
+
+        i915_for_each_gt(drm_fd, tmp, gt) {
+            igt_dynamic_f("gt%u", gt)
+                test_thresholds(drm_fd, gt, TEST_IDLE | TEST_PARK);
+        }
+    }
   }