Add pinctrl driver support for Realtek DHC SoCs
Subsystems (4)
cover Add pinctrl driver support for Realtek DHC SoCs
These patches add the bindings and the pinctrl drivers for Realtek DHC(Digital Home Center) RTD SoCs(RTD1619B, RTD1319D and RTD1315E).
TY Chang (7):
pinctrl: realtek: Add common pinctrl driver for Realtek DHC RTD SoCs
pinctrl: realtek: Add pinctrl driver for RTD1315E
pinctrl: realtek: Add pinctrl driver for RTD1319D
pinctrl: realtek: Add pinctrl driver for RTD1619B
dt-bindings: pinctrl: realtek: add RTD1315E pinctrl binding
dt-bindings: pinctrl: realtek: add RTD1319D pinctrl binding
dt-bindings: pinctrl: realtek: add RTD1619B pinctrl binding
.../pinctrl/realtek,rtd1315e-pinctrl.yaml | 165 ++ .../pinctrl/realtek,rtd1319d-pinctrl.yaml | 163 ++ .../pinctrl/realtek,rtd1619b-pinctrl.yaml | 162 ++ drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/realtek/Kconfig | 23 + drivers/pinctrl/realtek/Makefile | 6 + drivers/pinctrl/realtek/pinctrl-rtd.c | 568 ++++++ drivers/pinctrl/realtek/pinctrl-rtd.h | 124 ++ drivers/pinctrl/realtek/pinctrl-rtd1315e.c | 1439 +++++++++++++++ drivers/pinctrl/realtek/pinctrl-rtd1319d.c | 1609 +++++++++++++++++ drivers/pinctrl/realtek/pinctrl-rtd1619b.c | 1601 ++++++++++++++++ 12 files changed, 5862 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/realtek,rtd1319d-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml create mode 100644 drivers/pinctrl/realtek/Kconfig create mode 100644 drivers/pinctrl/realtek/Makefile create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd.c create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd.h create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd1315e.c create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd1319d.c create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd1619b.c
Signature · 1 line
2.41.0
PATCH 1/7 pinctrl: realtek: Add common pinctrl driver for Realtek DHC RTD SoCs
The RTD SoCs share a similar design for pinmux and pinconfig. This common pinctrl driver supports different variants within the RTD SoCs.
--- drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/realtek/Kconfig | 8 + drivers/pinctrl/realtek/Makefile | 3 + drivers/pinctrl/realtek/pinctrl-rtd.c | 568 ++++++++++++++++++++++++++ drivers/pinctrl/realtek/pinctrl-rtd.h | 124 ++++++ 6 files changed, 705 insertions(+) create mode 100644 drivers/pinctrl/realtek/Kconfig create mode 100644 drivers/pinctrl/realtek/Makefile create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd.c create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd.h
drivers/pinctrl/Kconfig +1 -0
@@ -531,6 +531,7 @@ source "drivers/pinctrl/nuvoton/Kconfig" source "drivers/pinctrl/nxp/Kconfig" source "drivers/pinctrl/pxa/Kconfig" source "drivers/pinctrl/qcom/Kconfig" +source "drivers/pinctrl/realtek/Kconfig" source "drivers/pinctrl/renesas/Kconfig" source "drivers/pinctrl/samsung/Kconfig" source "drivers/pinctrl/spear/Kconfig"
drivers/pinctrl/Makefile +1 -0
@@ -67,6 +67,7 @@ obj-y += nuvoton/ obj-y += nxp/ obj-$(CONFIG_PINCTRL_PXA) += pxa/ obj-y += qcom/ +obj-$(CONFIG_ARCH_REALTEK) += realtek/ obj-$(CONFIG_PINCTRL_RENESAS) += renesas/ obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/ obj-$(CONFIG_PINCTRL_SPEAR) += spear/
drivers/pinctrl/realtek/Kconfig new file +8 -0
@@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +config PINCTRL_RTD + tristate "Realtek DHC core pin controller driver" + depends on ARCH_REALTEK + default y + select PINMUX + select GENERIC_PINCONF
drivers/pinctrl/realtek/Makefile new file +3 -0
@@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# Realtek DHC pin control drivers +obj-$(CONFIG_PINCTRL_RTD) += pinctrl-rtd.o
drivers/pinctrl/realtek/pinctrl-rtd.c new file +568 -0
568 lines not on this page · raw message
drivers/pinctrl/realtek/pinctrl-rtd.h new file +124 -0
124 lines not on this page · raw message
Signature · 1 line
2.41.0
Re: [PATCH 1/7] pinctrl: realtek: Add common pinctrl driver for Realtek DHC RTD SoCs
Wed, Jul 26, 2023 at 05:04:03PM +0800, TY Chang kirjoitti:
drivers/pinctrl/realtek/Kconfig line 4
Quoted 6 lines
The RTD SoCs share a similar design for pinmux and pinconfig. This common pinctrl driver supports different variants within the RTD SoCs.
drivers/pinctrl/realtek/Kconfig new file +2
-0+config PINCTRL_RTD + tristate "Realtek DHC core pin controller driver"
Why is it user-visible?
drivers/pinctrl/realtek/Kconfig line 6
Quoted 3 lines
drivers/pinctrl/realtek/Kconfig new file +2
-0+ depends on ARCH_REALTEK + default y
Why?
Quoted 2 lines
drivers/pinctrl/realtek/Kconfig new file +2
-0+ select PINMUX + select GENERIC_PINCONF
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 12
Quoted 6 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +5
-0+#include <linux/bitops.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_address.h>
Not used or not needed, use proper platform driver APIs
drivers/pinctrl/realtek/pinctrl-rtd.c line 17
Quoted 5 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +5
-0+#include <linux/pinctrl/machine.h> +#include <linux/pinctrl/pinconf.h> +#include <linux/pinctrl/pinconf-generic.h> +#include <linux/pinctrl/pinctrl.h> +#include <linux/pinctrl/pinmux.h>
Move this group outside generic headers...
drivers/pinctrl/realtek/pinctrl-rtd.c line 20
Quoted 3 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +3
-0+#include <linux/platform_device.h> +#include <linux/seq_file.h> +#include <linux/slab.h>
+ Blank line. You have missing headers (like types.h)/
...here.
drivers/pinctrl/realtek/pinctrl-rtd.c line 22
Quoted 2 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +2
-0+#include "../core.h" +#include "../pinctrl-utils.h"
+ Blank line.
Quoted 1 line
+#include "
pinctrl-rtd.h"
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 41
Quoted 4 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +4
-0+static const struct pinconf_generic_params rtd_custom_bindings[] = { + {"realtek,pdrive" ,RTD_P_DRIVE ,0 }, + {"realtek,ndrive" ,RTD_N_DRIVE ,0 }, + {"realtek,dcycle" ,RTD_D_CYCLE ,0 },
Use C99 initializers.
Quoted 1 line
+};
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 82
Quoted 12 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +11
-0+static void rtd_pinctrl_dbg_show (struct pinctrl_dev *pcdev, +struct seq_file *s, +unsigned int offset) +{ +struct rtd_pinctrl *data =pinctrl_dev_get_drvdata (pcdev); +const struct rtd_pin_desc *mux = &data->info->muxes[offset]; +const struct rtd_pin_mux_desc *func; +u32 val; +u32 mask; +u32 pin_val; +int is_map;
Actually it's boolean. Why int?
Quoted 11 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +11
-0+if (!mux->name) { +seq_puts (s,"[not defined]" ); +return ; + } + val =readl_relaxed (data->base + mux->mux_offset); + mask = mux->mux_mask; + pin_val = val & mask; + + is_map =0 ; + func = &mux->functions[0 ]; +seq_puts (s,"function: " );
drivers/pinctrl/realtek/pinctrl-rtd.c line 103
Quoted 10 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +9
-0+while (func->name) { +if (func->mux_value == pin_val) { + is_map =1 ; +seq_printf (s,"[%s] " , func->name); + }else { +seq_printf (s,"%s " , func->name); + } + func++; + }
This can be a long list, why not simply print only mapped function?
Quoted 3 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +3
-0+if (!is_map) +seq_puts (s,"[not defined]" ); +}
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 150
Quoted 6 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +6
-0+static const struct rtd_pin_desc *rtd_pinctrl_find_mux (struct rtd_pinctrl *data,unsigned int pin) +{ +if (!data->info->muxes[pin].name) +return &data->info->muxes[pin]; + +return NULL ;
Can the error (?) case be handled first?
if (data->info->muxes[pin].name) return NULL;
Quoted 1 line
+}
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 159
Quoted 7 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +6
-0+static void rtd_pinctrl_update_bits (struct rtd_pinctrl *data,unsigned int offset, +unsigned int mask,unsigned int val) +{ +unsigned int reg =readl_relaxed (data->base + offset); + reg &= ~mask; + reg |= (mask & val);
Please, use idiomatic one liner:
reg = (reg & ~mask) | (val & mask);
Quoted 2 lines
(quoted diff) +2
-0+ writel_relaxed(reg, data->base + offset); +}
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 235
Quoted 2 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +2
-0+static const struct pinctrl_pin_desc + *rtd_pinctrl_get_pin_by_number (struct rtd_pinctrl *data,int number)
Weird indentation.
Quoted 10 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +10
-0+{ +int i; + +for (i =0 ; i < data->info->num_pins; i++) { +if (data->info->pins[i].number == number) +return &data->info->pins[i]; + } + +return NULL ; +}
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 253
Quoted 7 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +7
-0+static const struct rtd_pin_config_desc + *rtd_pinctrl_find_config (struct rtd_pinctrl *data,unsigned int pin) +{ +if (!data->info->configs[pin].name) +return &data->info->configs[pin]; + +return NULL ;
if (...) return NULL;
Quoted 1 line
+}
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 296
Quoted 1 line
drivers/pinctrl/realtek/pinctrl-rtd.c new file +1
-0+switch ((u32 )param) {
Why casting?!
drivers/pinctrl/realtek/pinctrl-rtd.c line 300
Quoted 5 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +4
-0+case PIN_CONFIG_INPUT_SCHMITT : +case PIN_CONFIG_INPUT_SCHMITT_ENABLE : +if (config_desc->smt_offset ==NA ) { +dev_err (data->dev,"Not support input schmitt for pin: %s\n" , name);
In all cases like this, why do you need the message to be printed?
Quoted 9 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +9
-0+return -ENOTSUPP ; + } + smt_off = config_desc->base_bit + config_desc->smt_offset; + set_val = arg; + + mask =BIT (smt_off); + val = set_val ?BIT (smt_off) :0 ; +rtd_pinctrl_update_bits (data, config_desc->reg_offset, mask, val); +break ;
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 364
Quoted 5 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +4
-0+case PIN_CONFIG_DRIVE_STRENGTH : + curr_off = config_desc->base_bit + config_desc->curr_offset; + strength = arg; + val =0 ;
How is this assignment being used?
drivers/pinctrl/realtek/pinctrl-rtd.c line 367
Quoted 3 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +3
-0+switch (config_desc->curr_type) { +case PADDRI_4_8 : +if (strength ==4 )
BIT() ?
Review
Quoted 2 lines
(quoted diff) +2
-0+ val = 0; + else if (strength == 8)
Ditto.
drivers/pinctrl/realtek/pinctrl-rtd.c line 375
Quoted 6 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +6
-0+ val =BIT (curr_off); + else + return -EINVAL; +break ; +case PADDRI_2_4 : +if (strength ==2 )
Ditto.
Review
Quoted 2 lines
(quoted diff) +2
-0+ val = 0; + else if (strength == 4)
Ditto.
Quoted 15 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +15
-0+ val =BIT (curr_off); + else + return -EINVAL; +break ; +case NA : +dev_err (data->dev,"Not support drive strength for pin: %s\n" , name); +return -ENOTSUPP ; +default : +return -EINVAL ; + } + mask =BIT (curr_off); +rtd_pinctrl_update_bits (data, config_desc->reg_offset, mask, val); +break ; + +case PIN_CONFIG_POWER_SOURCE :
drivers/pinctrl/realtek/pinctrl-rtd.c line 402
Quoted 10 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +10
-0+if (config_desc->power_offset ==NA ) { +dev_err (data->dev,"Not support power source for pin: %s\n" , name); +return -ENOTSUPP ; + } + reg_off = config_desc->reg_offset; + pow_off = config_desc->base_bit + config_desc->power_offset; +if (pow_off >=32 ) { + reg_off +=0x4 ; + pow_off -=32 ; + }
Less error prone is to use division and multiplication. Something like
pow_bit = config_desc->base_bit + config_desc->power_offset; reg_off = config_desc->reg_offset + 4 * (pow_bit / 32); pow_off = pow_bit % 32;
Quoted 9 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +9
-0+ set_val = arg; + mask =BIT (pow_off); + val = set_val ? mask :0 ; +rtd_pinctrl_update_bits (data, reg_off, mask, val); +break ; + +case RTD_P_DRIVE : + sconfig_desc =rtd_pinctrl_find_sconfig (data, pinnr); +if (!sconfig_desc) {
drivers/pinctrl/realtek/pinctrl-rtd.c line 421
Quoted 10 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +10
-0+dev_err (data->dev,"Not support P driving for pin: %s\n" , name); +return -ENOTSUPP ; + } + set_val = arg; + reg_off = sconfig_desc->reg_offset; + p_off = sconfig_desc->pdrive_offset; +if (p_off >=32 ) { + reg_off +=0x4 ; + p_off -=32 ; + }
Ditto.
drivers/pinctrl/realtek/pinctrl-rtd.c line 422
Quoted 1 line
drivers/pinctrl/realtek/pinctrl-rtd.c new file +1
-0+ mask =GENMASK (p_off + sconfig_desc->pdrive_maskbits -1 , p_off);
No, this is suboptimal, better
mask = GENMASK(sconfig_desc->pdrive_maskbits - 1, 0) << p_off;
Quoted 7 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +7
-0+ val = set_val << p_off; +rtd_pinctrl_update_bits (data, reg_off, mask, val); +break ; + +case RTD_N_DRIVE : + sconfig_desc =rtd_pinctrl_find_sconfig (data, pinnr); +if (!sconfig_desc) {
drivers/pinctrl/realtek/pinctrl-rtd.c line 439
Quoted 10 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +10
-0+dev_err (data->dev,"Not support N driving for pin: %s\n" , name); +return -ENOTSUPP ; + } + set_val = arg; + reg_off = sconfig_desc->reg_offset; + n_off = sconfig_desc->ndrive_offset; +if (n_off >=32 ) { + reg_off +=0x4 ; + n_off -=32 ; + }
As per above.
drivers/pinctrl/realtek/pinctrl-rtd.c line 440
Quoted 1 line
drivers/pinctrl/realtek/pinctrl-rtd.c new file +1
-0+ mask =GENMASK (n_off + sconfig_desc->ndrive_maskbits -1 , n_off);
As per above.
drivers/pinctrl/realtek/pinctrl-rtd.c line 453
Quoted 13 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +12
-0+ val = set_val << n_off; +rtd_pinctrl_update_bits (data, reg_off, mask, val); +break ; +case RTD_D_CYCLE : + sconfig_desc =rtd_pinctrl_find_sconfig (data, pinnr); +if (!sconfig_desc || sconfig_desc->dcycle_offset ==NA ) { +dev_err (data->dev,"Not support duty cycle for pin: %s\n" , name); +return -ENOTSUPP ; + } + set_val = arg; + mask =GENMASK (sconfig_desc->dcycle_offset + + sconfig_desc->dcycle_maskbits -1 , sconfig_desc->dcycle_offset);
Broken indentation and see above.
Quoted 10 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +10
-0+ val = set_val << sconfig_desc->dcycle_offset; +rtd_pinctrl_update_bits (data, sconfig_desc->reg_offset, mask, val); +break ; + +default : +break ; + } + +return 0 ; +}
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 469
Quoted 6 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +5
-0+static int rtd_pin_config_get (struct pinctrl_dev *pcdev,unsigned int pinnr, +unsigned long *config) +{ +unsigned int param =pinconf_to_config_param (*config); +unsigned int arg =0 ;
How is this assignment being used?
drivers/pinctrl/realtek/pinctrl-rtd.c line 477
Quoted 8 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +7
-0+ +switch (param) { +default : +return -ENOTSUPP ; + } + *config =pinconf_to_config_packed (param, arg); +return 0 ;
This is a dead code, why?!
Quoted 1 line
+}
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 485
Quoted 7 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +6
-0+static int rtd_pin_config_set (struct pinctrl_dev *pcdev,unsigned int pinnr, +unsigned long *configs,unsigned int num_configs) +{ +struct rtd_pinctrl *data =pinctrl_dev_get_drvdata (pcdev); +int i; +int ret =0 ;
How is this assignment being used?
Quoted 10 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +10
-0+for (i =0 ; i < num_configs; i++) { + ret =rtd_pconf_parse_conf (data, pinnr, +pinconf_to_config_param (configs[i]), +pinconf_to_config_argument (configs[i])); +if (ret <0 ) +return ret; + } + +return 0 ; +}
...
drivers/pinctrl/realtek/pinctrl-rtd.c line 539
Quoted 9 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +9
-0+int rtd_pinctrl_probe (struct platform_device *pdev,const struct rtd_pinctrl_desc *desc) +{ +struct rtd_pinctrl *data; + + data =devm_kzalloc (&pdev->dev,sizeof (*data),GFP_KERNEL ); +if (!data) +return -ENOMEM ; + + data->base =of_iomap (pdev->dev.of_node,0 );
Use proper platform driver API.
Also, why not devm_*()?
Quoted 6 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +6
-0+if (IS_ERR (data->base)) +return PTR_ERR (data->base); + + data->dev = &pdev->dev; + data->info = desc; + data->desc.name =dev_name (&pdev->dev);
drivers/pinctrl/realtek/pinctrl-rtd.c line 555
Quoted 10 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +10
-0+ data->desc.pins = data->info->pins; + data->desc.npins = data->info->num_pins; + data->desc.pctlops = &rtd_pinctrl_ops; + data->desc.pmxops = &rtd_pinmux_ops; + data->desc.confops = &rtd_pinconf_ops; + data->desc.custom_params = rtd_custom_bindings; + data->desc.num_custom_params =ARRAY_SIZE (rtd_custom_bindings); + data->desc.owner =THIS_MODULE ; + + data->pcdev =pinctrl_register (&data->desc, &pdev->dev, data);
Why not devm_*()?
drivers/pinctrl/realtek/pinctrl-rtd.c line 559
Quoted 4 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +3
-0+if (!data->pcdev) +return -ENOMEM ; +platform_set_drvdata (pdev, data);
Is this used anyhow?
Quoted 4 lines
drivers/pinctrl/realtek/pinctrl-rtd.c new file +4
-0+dev_dbg (&pdev->dev,"probed\n" ); + +return 0 ; +}
...
Quoted 1 line
+EXPORT_SYMBOL(rtd_pinctrl_probe);
Use namespace.
...
Quoted 3 lines
+/*
+ * Copyright (c) 2023 Realtek Semiconductor Corp.
+ */
One line.
...
No ifdeffery guard?
...
Quoted 1 line
+#define NA
0xffffffff
What is this? Bit mask? U32_MAX? -1?
Quoted 2 lines
drivers/pinctrl/realtek/pinctrl-rtd.h new file +2
-0+#define PADDRI_4_8 1 +#define PADDRI_2_4 0
...
drivers/pinctrl/realtek/pinctrl-rtd.h line 20
Quoted 11 lines
drivers/pinctrl/realtek/pinctrl-rtd.h new file +11
-0+struct rtd_pin_group_desc { +const char *name; +const unsigned int *pins; +unsigned int num_pins; +}; + +struct rtd_pin_func_desc { +const char *name; +const char *const *groups; +unsigned int num_groups; +};
NIH struct pingroup, struct pinfunction.
Signature · 2 lines
With Best Regards, Andy Shevchenko
PATCH 2/7 pinctrl: realtek: Add pinctrl driver for RTD1315E
In reply to TY ChangAdd RTD1315E support using realtek common pinctrl driver.
--- drivers/pinctrl/realtek/Kconfig | 5 + drivers/pinctrl/realtek/Makefile | 1 + drivers/pinctrl/realtek/pinctrl-rtd1315e.c | 1439 ++++++++++++++++++++ 3 files changed, 1445 insertions(+) create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd1315e.c
drivers/pinctrl/realtek/Kconfig +5 -0
@@ -6,3 +6,8 @@ config PINCTRL_RTD default y select PINMUX select GENERIC_PINCONF + +config PINCTRL_RTD1315E + tristate "Realtek DHC 1315E pin controller driver" + depends on PINCTRL_RTD + default y
drivers/pinctrl/realtek/Makefile +1 -0
@@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-or-later # Realtek DHC pin control drivers obj-$(CONFIG_PINCTRL_RTD) += pinctrl-rtd.o +obj-$(CONFIG_PINCTRL_RTD1315E) += pinctrl-rtd1315e.o
drivers/pinctrl/realtek/pinctrl-rtd1315e.c new file +1439 -0
1,439 lines not on this page · raw message
Signature · 1 line
2.41.0
Re: [PATCH 2/7] pinctrl: realtek: Add pinctrl driver for RTD1315E
Wed, Jul 26, 2023 at 05:04:04PM +0800, TY Chang kirjoitti:
Quoted 1 line
Add RTD1315E support using realtek common pinctrl driver.
...
drivers/pinctrl/realtek/Kconfig config PINCTRL_RTD · line 12
Quoted 4 lines
drivers/pinctrl/realtek/Kconfig +3
-0+config PINCTRL_RTD1315E + tristate "Realtek DHC 1315E pin controller driver" + depends on PINCTRL_RTD
Why not select and the above be hidden symbol?
...
drivers/pinctrl/realtek/pinctrl-rtd1315e.c line 10
Quoted 3 lines
drivers/pinctrl/realtek/pinctrl-rtd1315e.c new file +2
-0+#include <linux/module.h> +#include <linux/of.h>
Not used. Use correct headers
Quoted 1 line
+#include <
linux/platform_device.h>
+ Blank line
Quoted 1 line
+#include <
linux/pinctrl/pinctrl.h>
Make use of struct pinconfig, struct pinfunction and respective PINCTRL_PIN*() macros.
...
drivers/pinctrl/realtek/pinctrl-rtd1315e.c line 343
Quoted 6 lines
drivers/pinctrl/realtek/pinctrl-rtd1315e.c new file +6
-0+#define RTD1315E_GROUP (_name) \ + { \ + .name = # _name, \ + .pins = rtd1315e_ ## _name ## _pins, \ + .num_pins = ARRAY_SIZE(rtd1315e_ ## _name ## _pins), \ + }
NIH PINCTRL_PINGROUP().
...
drivers/pinctrl/realtek/pinctrl-rtd1315e.c line 649
Quoted 6 lines
drivers/pinctrl/realtek/pinctrl-rtd1315e.c new file +6
-0+#define RTD1315E_FUNC (_name) \ + { \ + .name = # _name, \ + .groups = rtd1315e_ ## _name ## _groups, \ + .num_groups = ARRAY_SIZE(rtd1315e_ ## _name ## _groups), \ + }
NIH PINCTRL_PINFUNCTION().
...
drivers/pinctrl/realtek/pinctrl-rtd1315e.c line 1414
Quoted 4 lines
drivers/pinctrl/realtek/pinctrl-rtd1315e.c new file +3
-0+static const struct of_device_id rtd1315e_pinctrl_of_match[] = { + { .compatible ="realtek,rtd13xxe-pinctrl" , }, + {},
No comma for the terminator entry.
Quoted 1 line
+};
...
Same comments for all new drivers in the series.
Signature · 2 lines
With Best Regards, Andy Shevchenko
PATCH 3/7 pinctrl: realtek: Add pinctrl driver for RTD1319D
In reply to TY ChangAdd RTD1319D support using realtek common pinctrl driver.
--- drivers/pinctrl/realtek/Kconfig | 5 + drivers/pinctrl/realtek/Makefile | 1 + drivers/pinctrl/realtek/pinctrl-rtd1319d.c | 1609 ++++++++++++++++++++ 3 files changed, 1615 insertions(+) create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd1319d.c
drivers/pinctrl/realtek/Kconfig +5 -0
@@ -7,6 +7,11 @@ config PINCTRL_RTD select PINMUX select GENERIC_PINCONF +config PINCTRL_RTD1319D + tristate "Realtek DHC 1319D pin controller driver" + depends on PINCTRL_RTD + default y + config PINCTRL_RTD1315E tristate "Realtek DHC 1315E pin controller driver" depends on PINCTRL_RTD
drivers/pinctrl/realtek/Makefile +1 -0
@@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-or-later # Realtek DHC pin control drivers obj-$(CONFIG_PINCTRL_RTD) += pinctrl-rtd.o +obj-$(CONFIG_PINCTRL_RTD1319D) += pinctrl-rtd1319d.o obj-$(CONFIG_PINCTRL_RTD1315E) += pinctrl-rtd1315e.o
drivers/pinctrl/realtek/pinctrl-rtd1319d.c new file +1609 -0
1,609 lines not on this page · raw message
Signature · 1 line
2.41.0
PATCH 4/7 pinctrl: realtek: Add pinctrl driver for RTD1619B
In reply to TY ChangAdd RTD1619B support using realtek common pinctrl driver.
--- drivers/pinctrl/realtek/Kconfig | 5 + drivers/pinctrl/realtek/Makefile | 1 + drivers/pinctrl/realtek/pinctrl-rtd1619b.c | 1601 ++++++++++++++++++++ 3 files changed, 1607 insertions(+) create mode 100644 drivers/pinctrl/realtek/pinctrl-rtd1619b.c
drivers/pinctrl/realtek/Kconfig +5 -0
@@ -7,6 +7,11 @@ config PINCTRL_RTD select PINMUX select GENERIC_PINCONF +config PINCTRL_RTD1619B + tristate "Realtek DHC 1619B pin controller driver" + depends on PINCTRL_RTD + default y + config PINCTRL_RTD1319D tristate "Realtek DHC 1319D pin controller driver" depends on PINCTRL_RTD
drivers/pinctrl/realtek/Makefile +1 -0
@@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-or-later # Realtek DHC pin control drivers obj-$(CONFIG_PINCTRL_RTD) += pinctrl-rtd.o +obj-$(CONFIG_PINCTRL_RTD1619B) += pinctrl-rtd1619b.o obj-$(CONFIG_PINCTRL_RTD1319D) += pinctrl-rtd1319d.o obj-$(CONFIG_PINCTRL_RTD1315E) += pinctrl-rtd1315e.o
drivers/pinctrl/realtek/pinctrl-rtd1619b.c new file +1601 -0
1,601 lines not on this page · raw message
Signature · 1 line
2.41.0
PATCH 5/7 dt-bindings: pinctrl: realtek: add RTD1315E pinctrl binding
In reply to TY ChangAdd device tree bindings for RTD1315E.
--- .../pinctrl/realtek,rtd1315e-pinctrl.yaml | 165 ++++++++++++++++++ 1 file changed, 165 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +165 -0
@@ -0,0 +1,165 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1315e-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC RTD1315E Pin Controller + +maintainers: + - TY Chang <[email protected]> + +description: | + Binding for Realtek DHC RTD1315E SoC pin control. + +properties: + compatible: + const: realtek,rtd13xxe-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^.*$': + if: + type: object + then: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + pins: + items: + enum: [ gpio_0, gpio_1, emmc_rst_n, emmc_dd_sb, emmc_clk, emmc_cmd, + gpio_6, gpio_7, gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, + gpio_13, gpio_14, gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, + gpio_20, emmc_data_0, emmc_data_1, emmc_data_2, usb_cc2, gpio_25, + gpio_26, gpio_27, gpio_28, gpio_29, gpio_30, gpio_31, gpio_32, + gpio_33, gpio_34, gpio_35, hif_data, hif_en, hif_rdy, hif_clk, + gpio_dummy_40, gpio_dummy_41, gpio_dummy_42, gpio_dummy_43, + gpio_dummy_44, gpio_dummy_45, gpio_46, gpio_47, gpio_48, gpio_49, + gpio_50, usb_cc1, emmc_data_3, emmc_data_4, ir_rx, ur0_rx, ur0_tx, + gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_dummy_63, + gpio_dummy_64, gpio_dummy_65, gpio_66, gpio_67, gpio_68, gpio_69, + gpio_70, gpio_71, gpio_72, gpio_dummy_73, emmc_data_5, emmc_data_6, + emmc_data_7, gpio_dummy_77, gpio_78, gpio_79, gpio_80, gpio_81, + ur2_loc, gspi_loc, hi_width, sf_en, arm_trace_dbg_en, + ejtag_aucpu_loc, ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc, + dmic_loc, vtc_dmic_loc, vtc_tdm_loc, vtc_i2si_loc, tdm_ai_loc, + ai_loc, spdif_loc, hif_en_loc, scan_switch, wd_rset, boot_sel, + reset_n, testmode ] + + function: + enum: [ gpio, nf, emmc, ao, gspi_loc0, gspi_loc1, uart0, uart1, + uart2_loc0, uart2_loc1, i2c0, i2c1, i2c4, i2c5, pcie1, + etn_led, etn_phy, spi, pwm0_loc0, pwm0_loc1, pwm1_loc0, + pwm1_loc1, pwm2_loc0, pwm2_loc1, pwm3_loc0, pwm3_loc1, + spdif_optical_loc0, spdif_optical_loc1, usb_cc1, usb_cc2, + sd, dmic_loc0, dmic_loc1, ai_loc0, ai_loc1, tdm_ai_loc0, + tdm_ai_loc1, hi_loc0, hi_m, vtc_i2so, vtc_i2si_loc0, + vtc_i2si_loc1, vtc_dmic_loc0, vtc_dmic_loc1, vtc_tdm_loc0, + vtc_tdm_loc1, dc_fan, pll_test_loc0, pll_test_loc1, + ir_rx, uart2_disable, gspi_disable, hi_width_disable, + hi_width_1bit, sf_disable, sf_enable, scpu_ejtag_loc0, + scpu_ejtag_loc1, scpu_ejtag_loc2, scpu_ejtag_loc3, + acpu_ejtag_loc0, acpu_ejtag_loc1, acpu_ejtag_loc2, + vcpu_ejtag_loc0, vcpu_ejtag_loc1, vcpu_ejtag_loc2, + aucpu_ejtag_loc0, aucpu_ejtag_loc1, aucpu_ejtag_loc2, + gpu_ejtag, iso_tristate, dbg_out0, dbg_out1, standby_dbg, + spdif, arm_trace_debug_disable, arm_trace_debug_enable, + aucpu_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable, + scpu_ejtag_disable, vtc_dmic_loc_disable, vtc_tdm_disable, + vtc_i2si_disable, tdm_ai_disable, ai_disable, spdif_disable, + hif_disable, hif_enable, test_loop, pmic_pwrup ] + + + drive-strength: + enum: [4, 8] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + drive-push-pull: true + + power-source: + description: | + Valid arguments are described as below: + 0: power supply of 1.8V + 1: power supply of 3.3V + enum: [0, 1] + + realtek,pdrive: + description: | + An integer describing the level to adjust PMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,ndrive: + description: | + An integer describing the level to adjust NMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,dcycle: + description: | + An integer describing the level to adjust output duty cycle. + Valid arguments are described as below: + 0: 0ns + 2: + 0.25ns + 3: + 0.5ns + 4: -0.25ns + 5: -0.5ns + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 2, 3, 4, 5 ] + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@4e000 { + compatible = "realtek,rtd13xxe-pinctrl"; + reg = <0x4e000 0x130>; + + emmc_pins_hs200 { + pins = "emmc_clk", + "emmc_cmd", + "emmc_data_0", + "emmc_data_1", + "emmc_data_2", + "emmc_data_3", + "emmc_data_4", + "emmc_data_5", + "emmc_data_6", + "emmc_data_7"; + function = "emmc"; + realtek,pdrive = <0x2>; + realtek,ndrive = <0x2>; + }; + + i2c_pins_0 { + pins = "gpio_12", + "gpio_13"; + function = "i2c0"; + drive-strength = <4>; + }; + };
Signature · 1 line
2.41.0
Rob Herring
maintainerRe: [PATCH 5/7] dt-bindings: pinctrl: realtek: add RTD1315E pinctrl binding
Quoted 22 lines · TY Chang
Add device tree bindings for RTD1315E.
Signed-off-by TY Chang <[email protected]>--- .../pinctrl/realtek,rtd1315e-pinctrl.yaml | 165 ++++++++++++++++++ 1 file changed, 165 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yamlDocumentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +8
-0@@ -0,0 +1,165 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1315e-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC RTD1315E Pin Controller
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml line 18
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +10
-0+ +maintainers: + - TY Chang <[email protected]> + +description: | + Binding for Realtek DHC RTD1315E SoC pin control. + +properties: + compatible: + const: realtek,rtd13xxe-pinctrl
Don't use wildcards in compatible strings.
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml line 26
Quoted 8 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +8
-0+ + reg: + maxItems: 1 + +patternProperties: + '^.*$': + if: + type: object
For new bindings, define a suffix (e.g. "-pins") for the node name.
Quoted 107 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +107
-0+ then: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + pins: + items: + enum: [ gpio_0, gpio_1, emmc_rst_n, emmc_dd_sb, emmc_clk, emmc_cmd, + gpio_6, gpio_7, gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, + gpio_13, gpio_14, gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, + gpio_20, emmc_data_0, emmc_data_1, emmc_data_2, usb_cc2, gpio_25, + gpio_26, gpio_27, gpio_28, gpio_29, gpio_30, gpio_31, gpio_32, + gpio_33, gpio_34, gpio_35, hif_data, hif_en, hif_rdy, hif_clk, + gpio_dummy_40, gpio_dummy_41, gpio_dummy_42, gpio_dummy_43, + gpio_dummy_44, gpio_dummy_45, gpio_46, gpio_47, gpio_48, gpio_49, + gpio_50, usb_cc1, emmc_data_3, emmc_data_4, ir_rx, ur0_rx, ur0_tx, + gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_dummy_63, + gpio_dummy_64, gpio_dummy_65, gpio_66, gpio_67, gpio_68, gpio_69, + gpio_70, gpio_71, gpio_72, gpio_dummy_73, emmc_data_5, emmc_data_6, + emmc_data_7, gpio_dummy_77, gpio_78, gpio_79, gpio_80, gpio_81, + ur2_loc, gspi_loc, hi_width, sf_en, arm_trace_dbg_en, + ejtag_aucpu_loc, ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc, + dmic_loc, vtc_dmic_loc, vtc_tdm_loc, vtc_i2si_loc, tdm_ai_loc, + ai_loc, spdif_loc, hif_en_loc, scan_switch, wd_rset, boot_sel, + reset_n, testmode ] + + function: + enum: [ gpio, nf, emmc, ao, gspi_loc0, gspi_loc1, uart0, uart1, + uart2_loc0, uart2_loc1, i2c0, i2c1, i2c4, i2c5, pcie1, + etn_led, etn_phy, spi, pwm0_loc0, pwm0_loc1, pwm1_loc0, + pwm1_loc1, pwm2_loc0, pwm2_loc1, pwm3_loc0, pwm3_loc1, + spdif_optical_loc0, spdif_optical_loc1, usb_cc1, usb_cc2, + sd, dmic_loc0, dmic_loc1, ai_loc0, ai_loc1, tdm_ai_loc0, + tdm_ai_loc1, hi_loc0, hi_m, vtc_i2so, vtc_i2si_loc0, + vtc_i2si_loc1, vtc_dmic_loc0, vtc_dmic_loc1, vtc_tdm_loc0, + vtc_tdm_loc1, dc_fan, pll_test_loc0, pll_test_loc1, + ir_rx, uart2_disable, gspi_disable, hi_width_disable, + hi_width_1bit, sf_disable, sf_enable, scpu_ejtag_loc0, + scpu_ejtag_loc1, scpu_ejtag_loc2, scpu_ejtag_loc3, + acpu_ejtag_loc0, acpu_ejtag_loc1, acpu_ejtag_loc2, + vcpu_ejtag_loc0, vcpu_ejtag_loc1, vcpu_ejtag_loc2, + aucpu_ejtag_loc0, aucpu_ejtag_loc1, aucpu_ejtag_loc2, + gpu_ejtag, iso_tristate, dbg_out0, dbg_out1, standby_dbg, + spdif, arm_trace_debug_disable, arm_trace_debug_enable, + aucpu_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable, + scpu_ejtag_disable, vtc_dmic_loc_disable, vtc_tdm_disable, + vtc_i2si_disable, tdm_ai_disable, ai_disable, spdif_disable, + hif_disable, hif_enable, test_loop, pmic_pwrup ] + + + drive-strength: + enum: [4, 8] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + drive-push-pull: true + + power-source: + description: | + Valid arguments are described as below: + 0: power supply of 1.8V + 1: power supply of 3.3V + enum: [0, 1] + + realtek,pdrive: + description: | + An integer describing the level to adjust PMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,ndrive: + description: | + An integer describing the level to adjust NMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,dcycle: + description: | + An integer describing the level to adjust output duty cycle. + Valid arguments are described as below: + 0: 0ns + 2: + 0.25ns + 3: + 0.5ns + 4: -0.25ns + 5: -0.5ns + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 2, 3, 4, 5 ] + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml line 143
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +10
-0+ +additionalProperties: false + +examples: + - | + pinctrl@4e000 { + compatible = "realtek,rtd13xxe-pinctrl"; + reg = <0x4e000 0x130>; + + emmc_pins_hs200 {
Don't use '_' in node names.
Quoted 25 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +22
-0+ pins = "emmc_clk", + "emmc_cmd", + "emmc_data_0", + "emmc_data_1", + "emmc_data_2", + "emmc_data_3", + "emmc_data_4", + "emmc_data_5", + "emmc_data_6", + "emmc_data_7"; + function = "emmc"; + realtek,pdrive = <0x2>; + realtek,ndrive = <0x2>; + }; + + i2c_pins_0 { + pins = "gpio_12", + "gpio_13"; + function = "i2c0"; + drive-strength = <4>; + }; + };Signature · 1 line
2.41.0
RE: [PATCH 5/7] dt-bindings: pinctrl: realtek: add RTD1315E pinctrl binding
Hi Rob,
Quoted 34 lines · TY Chang
Quoted 33 lines
Add device tree bindings for RTD1315E.
Signed-off-by TY Chang <[email protected]>--- .../pinctrl/realtek,rtd1315e-pinctrl.yaml | 165 ++++++++++++++++++ 1 file changed, 165 insertions(+) create mode 100644
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yamldiff --git a/Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.y aml b/Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.y aml
new file mode 100644
index 000000000000..b8fb6335ed65Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +13
-0+++ rl.yaml@@ -0,0 +1,165 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2023 +Realtek Semiconductor Corporation %YAML 1.2 +--- +$id: +http://devicetree.org/schemas/pinctrl/realtek,rtd1315e-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC RTD1315E Pin Controller + +maintainers: + - TY Chang <[email protected]> +
Quoted 8 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 18
Quoted 6 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +6
-0+description: | + Binding for Realtek DHC RTD1315E SoC pin control. + +properties: + compatible: + const: realtek,rtd13xxe-pinctrlDon't use wildcards in compatible strings.
I will fix it in the next version.
Quoted 11 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 26
Quoted 9 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +8
-0+ + reg: + maxItems: 1 + +patternProperties: + '^.*$': + if: + type: objectFor new bindings, define a suffix (e.g. "-pins") for the node name.
I will fix it.
Quoted 137 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 35
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +9
-0+ then: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + pins: + items: + enum: [ gpio_0, gpio_1, emmc_rst_n, emmc_dd_sb, emmc_clk,
emmc_cmd,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 36
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_6, gpio_7, gpio_8, gpio_9, gpio_10, gpio_11,
gpio_12,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 37
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_13, gpio_14, gpio_15, gpio_16, gpio_17, gpio_18,
gpio_19,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 38
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_20, emmc_data_0, emmc_data_1, emmc_data_2,
usb_cc2,gpio_25,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 39
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_26, gpio_27, gpio_28, gpio_29, gpio_30, gpio_31,
gpio_32,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 40
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_33, gpio_34, gpio_35, hif_data, hif_en, hif_rdy,
hif_clk,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 41
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_dummy_40, gpio_dummy_41, gpio_dummy_42,
gpio_dummy_43,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 42
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_dummy_44, gpio_dummy_45, gpio_46, gpio_47,
gpio_48,gpio_49,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 43
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_50, usb_cc1, emmc_data_3, emmc_data_4, ir_rx,
ur0_rx,ur0_tx,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 44
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62,
gpio_dummy_63,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 45
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_dummy_64, gpio_dummy_65, gpio_66, gpio_67,
gpio_68,gpio_69,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 46
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ gpio_70, gpio_71, gpio_72, gpio_dummy_73,
emmc_data_5,emmc_data_6,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 47
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ emmc_data_7, gpio_dummy_77, gpio_78, gpio_79,
gpio_80,gpio_81,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 49
Quoted 2 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +2
-0+ ur2_loc, gspi_loc, hi_width, sf_en, arm_trace_dbg_en, + ejtag_aucpu_loc, ejtag_acpu_loc, ejtag_vcpu_loc,
ejtag_scpu_loc,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 50
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ dmic_loc, vtc_dmic_loc, vtc_tdm_loc, vtc_i2si_loc,
tdm_ai_loc,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 51
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ ai_loc, spdif_loc, hif_en_loc, scan_switch, wd_rset,
boot_sel,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 57
Quoted 6 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +6
-0+ reset_n, testmode ] + + function: + enum: [ gpio, nf, emmc, ao, gspi_loc0, gspi_loc1, uart0, uart1, + uart2_loc0, uart2_loc1, i2c0, i2c1, i2c4, i2c5, pcie1, + etn_led, etn_phy, spi, pwm0_loc0, pwm0_loc1,
pwm1_loc0,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 58
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ pwm1_loc1, pwm2_loc0, pwm2_loc1, pwm3_loc0,
pwm3_loc1,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 62
Quoted 4 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +4
-0+ spdif_optical_loc0, spdif_optical_loc1, usb_cc1, usb_cc2, + sd, dmic_loc0, dmic_loc1, ai_loc0, ai_loc1, tdm_ai_loc0, + tdm_ai_loc1, hi_loc0, hi_m, vtc_i2so, vtc_i2si_loc0, + vtc_i2si_loc1, vtc_dmic_loc0, vtc_dmic_loc1,
vtc_tdm_loc0,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 70
Quoted 8 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +8
-0+ vtc_tdm_loc1, dc_fan, pll_test_loc0, pll_test_loc1, + ir_rx, uart2_disable, gspi_disable, hi_width_disable, + hi_width_1bit, sf_disable, sf_enable, scpu_ejtag_loc0, + scpu_ejtag_loc1, scpu_ejtag_loc2, scpu_ejtag_loc3, + acpu_ejtag_loc0, acpu_ejtag_loc1, acpu_ejtag_loc2, + vcpu_ejtag_loc0, vcpu_ejtag_loc1, vcpu_ejtag_loc2, + aucpu_ejtag_loc0, aucpu_ejtag_loc1, aucpu_ejtag_loc2, + gpu_ejtag, iso_tristate, dbg_out0, dbg_out1,
standby_dbg,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 71
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ spdif, arm_trace_debug_disable,
arm_trace_debug_enable,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 72
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ aucpu_ejtag_disable, acpu_ejtag_disable,
vcpu_ejtag_disable,Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 73
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +1
-0+ scpu_ejtag_disable, vtc_dmic_loc_disable,
vtc_tdm_disable,Quoted 19 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +19
-0+ vtc_i2si_disable, tdm_ai_disable, ai_disable, spdif_disable, + hif_disable, hif_enable, test_loop, pmic_pwrup ] + + + drive-strength: + enum: [4, 8] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + drive-push-pull: true +Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 102
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +10
-0+ power-source: + description: | + Valid arguments are described as below: + 0: power supply of 1.8V + 1: power supply of 3.3V + enum: [0, 1] + + realtek,pdrive: + description: | + An integer describing the level to adjust PMOS output drivingcapability.
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 109
Quoted 7 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +7
-0+ $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,ndrive: + description: | + An integer describing the level to adjust NMOS output drivingcapability.
Quoted 28 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +28
-0+ $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,dcycle: + description: | + An integer describing the level to adjust output duty cycle. + Valid arguments are described as below: + 0: 0ns + 2: + 0.25ns + 3: + 0.5ns + 4: -0.25ns + 5: -0.5ns + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 2, 3, 4, 5 ] + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples:
Quoted 8 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct line 143
Quoted 6 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +6
-0+ - | + pinctrl@4e000 { + compatible = "realtek,rtd13xxe-pinctrl"; + reg = <0x4e000 0x130>; + + emmc_pins_hs200 {Don't use '_' in node names.
I will fix it.
Quoted 18 lines
Quoted 18 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +17
-0+ pins = "emmc_clk", + "emmc_cmd", + "emmc_data_0", + "emmc_data_1", + "emmc_data_2", + "emmc_data_3", + "emmc_data_4", + "emmc_data_5", + "emmc_data_6", + "emmc_data_7"; + function = "emmc"; + realtek,pdrive = <0x2>; + realtek,ndrive = <0x2>; + }; + + i2c_pins_0 { + pins = "gpio_12",
Quoted 9 lines
Quoted 8 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinct new file +5
-1+ "gpio_13"; + function = "i2c0"; + drive-strength = <4>; + }; + }; --2.41.0
Thanks,
TY Chang
Re: [PATCH 5/7] dt-bindings: pinctrl: realtek: add RTD1315E pinctrl binding
In reply to TY ChangHi TY Chang,
thanks for your patch!
Quoted 3 lines · TY Chang
Add device tree bindings for RTD1315E.
Signed-off-by TY Chang <[email protected]>
Maybe you could write a short paragraph about the RTD1315E so we know what this is? I guess it is some SoC with some intended use case?
(...)
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml line 14
Quoted 2 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +2
-0+description: | + Binding for Realtek DHC RTD1315E SoC pin control.
Same text should go here in that case.
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml line 112
Quoted 13 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +13
-0+ realtek,pdrive: + description: | + An integer describing the level to adjust PMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,ndrive: + description: | + An integer describing the level to adjust NMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7
I would rename these realtek,drive-strength-p and realtek,drive-strength-n.
You need to explain what is meant with PMOS and NMOS here. If it is what I think it is, I think some ASCII art would be handy!
You can reuse my ASCII art from Documentation/driver-api/gpio/driver.rst:
VDD
|
OD ||--+
+--/ ---o|| P-MOS-FET
| ||--+
IN --+ +----- out
| ||--+
+--/ ----|| N-MOS-FET
OS ||--+
|
GNDMaybe you wanna delete the OD switch if these drivers don't support that.
What does the values 0..7 actually correspond to? Is it the number of transistors/driver stages simply? Then write that.
We need to think whether this is so generically useful that it should simply be drive-strength-pmos and drive-strength-nmos, simply put, as other SoCs may implement the same. What do people think?
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml line 124
Quoted 11 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +11
-0+ realtek,dcycle: + description: | + An integer describing the level to adjust output duty cycle. + Valid arguments are described as below: + 0: 0ns + 2: + 0.25ns + 3: + 0.5ns + 4: -0.25ns + 5: -0.5ns + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 2, 3, 4, 5 ]
This does not explain the duty cycle of *what*?
It looks really useful so please explain thoroughly what it does.
I guess this is not PWM because then you could use PIN_CONFIG_MODE_PWM.
Yours,
Linus Walleij
RE: [PATCH 5/7] dt-bindings: pinctrl: realtek: add RTD1315E pinctrl binding
Hi Linus,
Thanks for your review.
Quoted 5 lines
Hi TY Chang,
thanks for your patch!
Quoted 9 lines
Quoted 3 lines · TY Chang
Add device tree bindings for RTD1315E.
Signed-off-by TY Chang <[email protected]>Maybe you could write a short paragraph about the RTD1315E so we know what this is? I guess it is some SoC with some intended use case?
I will add it in the next version.
Quoted 17 lines
(...)
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml line 14
Quoted 2 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +2
-0+description: | + Binding for Realtek DHC RTD1315E SoC pin control.Same text should go here in that case.
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml
Quoted 3 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +3
-0+ realtek,pdrive: + description: | + An integer describing the level to adjust PMOS output drivingcapability.
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml
Quoted 7 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +7
-0+ $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,ndrive: + description: | + An integer describing the level to adjust NMOS output driving
Quoted 6 lines
capability.
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml line 105
Quoted 3 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +3
-0+ $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7I would rename these realtek,drive-strength-p and realtek,drive-strength-n.
Sure, I think naming them like that makes it clearer.
Quoted 18 lines
You need to explain what is meant with PMOS and NMOS here. If it is what I think it is, I think some ASCII art would be handy!
You can reuse my ASCII art from
Documentation/driver-api/gpio/driver.rst:VDD | OD ||--+ +--/ ---o|| P-MOS-FET | ||--+ IN --+ +----- out | ||--+ +--/ ----|| N-MOS-FET OS ||--+ |GND
Quoted 9 lines
Maybe you wanna delete the OD switch if these drivers don't support that.
What does the values 0..7 actually correspond to? Is it the number of transistors/driver stages simply? Then write that.
We need to think whether this is so generically useful that it should simply be drive-strength-pmos and drive-strength-nmos, simply put, as other SoCs may implement the same. What do people think?
I will add these in the next version. The values 0..7 is the level of the driving strength. These leves can impact the rising/falling time of the waveform, assisting in achieving the desired transfer speed.
Quoted 12 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml line 124
Quoted 11 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1315e-pinctrl.yaml new file +11
-0+ realtek,dcycle: + description: | + An integer describing the level to adjust output duty cycle. + Valid arguments are described as below: + 0: 0ns + 2: + 0.25ns + 3: + 0.5ns + 4: -0.25ns + 5: -0.5ns + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 2, 3, 4, 5 ]
Quoted 6 lines
This does not explain the duty cycle of *what*?
It looks really useful so please explain thoroughly what it does.
I guess this is not PWM because then you could use
PIN_CONFIG_MODE_PWM.
This is not PWM. The duty cycle here is to adjust the proportion of positive and negative waveforms, and is adjusted in nanosecond(ns).
Quoted 3 lines
Yours,
Linus Walleij
Thanks,
TY Chang
PATCH 6/7 dt-bindings: pinctrl: realtek: add RTD1319D pinctrl binding
In reply to TY ChangAdd device tree bindings for RTD1319D.
--- .../pinctrl/realtek,rtd1319d-pinctrl.yaml | 163 ++++++++++++++++++ 1 file changed, 163 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/realtek,rtd1319d-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/realtek,rtd1319d-pinctrl.yaml new file +163 -0
@@ -0,0 +1,163 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1319d-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC RTD1319D Pin Controller + +maintainers: + - TY Chang <[email protected]> + +description: | + Binding for Realtek DHC RTD1319D SoC pin control. + +properties: + compatible: + const: realtek,rtd13xxd-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^.*$': + if: + type: object + then: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + pins: + items: + enum: [ gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6, gpio_7, + gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13, gpio_14, + gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20, gpio_21, + gpio_22, gpio_23, usb_cc2, gpio_25, gpio_26, gpio_27, gpio_28, + gpio_29, gpio_30, gpio_31, gpio_32, gpio_33, gpio_34, gpio_35, + hif_data, hif_en, hif_rdy, hif_clk, gpio_40, gpio_41, gpio_42, + gpio_43, gpio_44, gpio_45, gpio_46, gpio_47, gpio_48, gpio_49, + gpio_50, usb_cc1, gpio_52, gpio_53, ir_rx, ur0_rx, ur0_tx, + gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_63, + gpio_64, emmc_rst_n, emmc_dd_sb, emmc_clk, emmc_cmd, emmc_data_0, + emmc_data_1, emmc_data_2, emmc_data_3, emmc_data_4, emmc_data_5, + emmc_data_6, emmc_data_7, dummy, gpio_78, gpio_79, gpio_80, + gpio_81, ur2_loc, gspi_loc, hi_width, sf_en, arm_trace_dbg_en, + ejtag_aucpu_loc, ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc, + dmic_loc, ejtag_secpu_loc, vtc_dmic_loc, vtc_tdm_loc, vtc_i2si_loc, + tdm_ai_loc, ai_loc, spdif_loc, hif_en_loc, sc0_loc, sc1_loc, + scan_switch, wd_rset, boot_sel, reset_n, testmode ] + + function: + enum: [ gpio, nf, emmc, tp0, tp1, sc0, sc0_data0, sc0_data1, sc0_data2, + sc1, sc1_data0, sc1_data1, sc1_data2, ao, gspi_loc0, gspi_loc1, + uart0, uart1, uart2_loc0, uart2_loc1, i2c0, i2c1, i2c3, i2c4, + i2c5, pcie1, sdio, etn_led, etn_phy, spi, pwm0_loc0, pwm0_loc1, + pwm1_loc0, pwm1_loc1, pwm2_loc0, pwm2_loc1, pwm3_loc0, pwm3_loc1, + qam_agc_if0, qam_agc_if1, spdif_optical_loc0, spdif_optical_loc1, + usb_cc1, usb_cc2, vfd, sd, dmic_loc0, dmic_loc1, ai_loc0, ai_loc1, + tdm_ai_loc0, tdm_ai_loc1, hi_loc0, hi_m, vtc_i2so, vtc_i2si_loc0, + vtc_i2si_loc1, vtc_dmic_loc0, vtc_dmic_loc1, vtc_tdm_loc0, + vtc_tdm_loc1, dc_fan, pll_test_loc0, pll_test_loc1, ir_rx, + uart2_disable, gspi_disable, hi_width_disable, hi_width_1bit, + sf_disable, sf_enable, scpu_ejtag_loc0, scpu_ejtag_loc1, + scpu_ejtag_loc2, acpu_ejtag_loc0, acpu_ejtag_loc1, acpu_ejtag_loc2, + vcpu_ejtag_loc0, vcpu_ejtag_loc1, vcpu_ejtag_loc2, secpu_ejtag_loc0, + secpu_ejtag_loc1, secpu_ejtag_loc2, aucpu_ejtag_loc0, aucpu_ejtag_loc1, + aucpu_ejtag_loc2, iso_tristate, dbg_out0, dbg_out1, standby_dbg, + spdif, arm_trace_debug_disable, arm_trace_debug_enable, + aucpu_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable, + scpu_ejtag_disable, secpu_ejtag_disable, vtc_dmic_loc_disable, + vtc_tdm_disable, vtc_i2si_disable, tdm_ai_disable, ai_disable, + spdif_disable, hif_disable, hif_enable, test_loop, pmic_pwrup ] + + drive-strength: + enum: [4, 8] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + drive-push-pull: true + + power-source: + description: | + Valid arguments are described as below: + 0: power supply of 1.8V + 1: power supply of 3.3V + enum: [0, 1] + + realtek,pdrive: + description: | + An integer describing the level to adjust PMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,ndrive: + description: | + An integer describing the level to adjust NMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,dcycle: + description: | + An integer describing the level to adjust output duty cycle. + Valid arguments are described as below: + 0: 0ns + 2: + 0.25ns + 3: + 0.5ns + 4: -0.25ns + 5: -0.5ns + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 2, 3, 4, 5 ] + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@4e000 { + compatible = "realtek,rtd13xxd-pinctrl"; + reg = <0x4e000 0x130>; + + emmc_pins_hs200: emmc_pins_hs200 { + pins = "emmc_clk", + "emmc_cmd", + "emmc_data_0", + "emmc_data_1", + "emmc_data_2", + "emmc_data_3", + "emmc_data_4", + "emmc_data_5", + "emmc_data_6", + "emmc_data_7"; + function = "emmc"; + realtek,pdrive = <0x2>; + realtek,ndrive = <0x2>; + }; + + i2c_pins_0: i2c_pins_0 { + pins = "gpio_12", + "gpio_13"; + function = "i2c0"; + drive-strength = <4>; + }; + };
Signature · 1 line
2.41.0
PATCH 7/7 dt-bindings: pinctrl: realtek: add RTD1619B pinctrl binding
In reply to TY ChangAdd device tree bindings for RTD1619B.
--- .../pinctrl/realtek,rtd1619b-pinctrl.yaml | 162 ++++++++++++++++++ 1 file changed, 162 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml new file +162 -0
@@ -0,0 +1,162 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1619b-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC RTD1619B Pin Controller + +maintainers: + - TY Chang <[email protected]> + +description: | + Binding for Realtek DHC RTD1619B SoC pin control. + +properties: + compatible: + const: realtek,rtd1619b-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^.*$': + if: + type: object + then: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + pins: + items: + enum: [ gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6, gpio_7, + gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13, gpio_14, + gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20, gpio_21, + gpio_22, gpio_23, usb_cc2, gpio_25, gpio_26, gpio_27, gpio_28, + gpio_29, gpio_30, gpio_31, gpio_32, gpio_33, gpio_34, gpio_35, + hif_data, hif_en, hif_rdy, hif_clk, gpio_40, gpio_41, gpio_42, + gpio_43, gpio_44, gpio_45, gpio_46, gpio_47, gpio_48, gpio_49, + gpio_50, usb_cc1, gpio_52, gpio_53, ir_rx, ur0_rx, ur0_tx, + gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_63, + gpio_64, gpio_65, gpio_66, gpio_67, gpio_68, gpio_69, gpio_70, + gpio_71, gpio_72, gpio_73, gpio_74, gpio_75, gpio_76, emmc_cmd, + spi_ce_n, spi_sck, spi_so, spi_si, emmc_rst_n, emmc_dd_sb, + emmc_clk, emmc_data_0, emmc_data_1, emmc_data_2, emmc_data_3, + emmc_data_4, emmc_data_5, emmc_data_6, emmc_data_7, ur2_loc, + gspi_loc, sdio_loc, hi_loc, hi_width, sf_en, arm_trace_dbg_en, + pwm_01_open_drain_en_loc0, pwm_23_open_drain_en_loc0, + pwm_01_open_drain_en_loc1, pwm_23_open_drain_en_loc1, + ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc, dmic_loc, + iso_gspi_loc, ejtag_ve3_loc, ejtag_aucpu0_loc, ejtag_aucpu1_loc ] + + function: + enum: [ gpio, nf, nf_spi, spi, pmic, spdif, spdif_coaxial, spdif_optical_loc0, + spdif_optical_loc1, emmc_spi, emmc, sc1, uart0, uart1, uart2_loc0, uart2_loc1, + gspi_loc1, iso_gspi_loc1, i2c0, i2c1, i2c3, i2c4, i2c5, pwm0, pwm1, pwm2, + pwm3, etn_led, etn_phy, etn_clk, sc0, vfd, gspi_loc0, iso_gspi_loc0, pcie1, + pcie2, sd, sdio_loc0, sdio_loc1, hi, hi_m, dc_fan, pll_test_loc0, pll_test_loc1, + usb_cc1, usb_cc2, ir_rx, tdm_ai_loc0, tdm_ai_loc1, dmic_loc0, dmic_loc1, + ai_loc0, ai_loc1, tp0, tp1, ao, uart2_disable, gspi_disable, sdio_disable, + hi_loc_disable, hi_loc0, hi_width_disable, hi_width_1bit, vtc_i2si_loc0, + vtc_tdm_loc0, vtc_dmic_loc0, vtc_i2si_loc1, vtc_tdm_loc1, vtc_dmic_loc1, + vtc_i2so, ve3_ejtag_loc0, aucpu0_ejtag_loc0, aucpu1_ejtag_loc0, ve3_ejtag_loc1, + aucpu0_ejtag_loc1, aucpu1_ejtag_loc1, ve3_ejtag_loc2, aucpu0_ejtag_loc2, + aucpu1_ejtag_loc2, scpu_ejtag_loc0, acpu_ejtag_loc0, vcpu_ejtag_loc0, + scpu_ejtag_loc1, acpu_ejtag_loc1, vcpu_ejtag_loc1, scpu_ejtag_loc2, + acpu_ejtag_loc2, vcpu_ejtag_loc2, ve3_ejtag_disable, aucpu0_ejtag_disable, + aucpu1_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable, + scpu_ejtag_disable, iso_gspi_disable, sf_disable, sf_enable, + arm_trace_debug_disable, arm_trace_debug_enable, pwm_normal, pwm_open_drain, + standby_dbg, test_loop_dis ] + + drive-strength: + enum: [4, 8] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + drive-push-pull: true + + power-source: + description: | + Valid arguments are described as below: + 0: power supply of 1.8V + 1: power supply of 3.3V + enum: [0, 1] + + realtek,pdrive: + description: | + An integer describing the level to adjust PMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,ndrive: + description: | + An integer describing the level to adjust NMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,dcycle: + description: | + An integer describing the level to adjust output duty cycle. + Valid arguments are described as below: + 0: 0ns + 2: + 0.25ns + 3: + 0.5ns + 4: -0.25ns + 5: -0.5ns + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 2, 3, 4, 5 ] + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@4e000 { + compatible = "realtek,rtd16xxb-pinctrl"; + reg = <0x4e000 0x130>; + + emmc_pins_hs200: emmc_pins_hs200 { + pins = "emmc_clk", + "emmc_cmd", + "emmc_data_0", + "emmc_data_1", + "emmc_data_2", + "emmc_data_3", + "emmc_data_4", + "emmc_data_5", + "emmc_data_6", + "emmc_data_7"; + function = "emmc"; + realtek,pdrive = <0x2>; + realtek,ndrive = <0x2>; + }; + + i2c_pins_0: i2c_pins_0 { + pins = "gpio_12", + "gpio_13"; + function = "i2c0"; + drive-strength = <4>; + }; + };
Signature · 1 line
2.41.0
Rob Herring
maintainerRe: [PATCH 7/7] dt-bindings: pinctrl: realtek: add RTD1619B pinctrl binding
Quoted 8 lines · TY Chang
Add device tree bindings for RTD1619B.
Signed-off-by TY Chang <[email protected]>--- .../pinctrl/realtek,rtd1619b-pinctrl.yaml | 162 ++++++++++++++++++ 1 file changed, 162 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.example.dtb: /example-0/pinctrl@4e000: failed to match any schema with compatible: ['realtek,rtd16xxb-pinctrl']
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]
The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
RE: [PATCH 7/7] dt-bindings: pinctrl: realtek: add RTD1619B pinctrl binding
Hi Rob,
Quoted 49 lines
From: Rob Herring <[email protected]>
Sent: Wednesday, July 26, 2023 7:53 PM
To: TY_Chang[張子逸] <[email protected]>
Cc: Krzysztof Kozlowski <[email protected]>; Rob Herring <[email protected]>; Conor Dooley <[email protected]>; [email protected]; [email protected]; [email protected]; Linus Walleij <[email protected]>
Subject: Re: [PATCH 7/7] dt-bindings: pinctrl: realtek: add RTD1619B pinctrl bindingExternal mail.
Quoted 10 lines · TY Chang
Add device tree bindings for RTD1619B.
Signed-off-by TY Chang <[email protected]>--- .../pinctrl/realtek,rtd1619b-pinctrl.yaml | 162 ++++++++++++++++++ 1 file changed, 162 insertions(+) create mode 100644
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yamlMy bot found errors running 'make DT_CHECKER_FLAGS=-m
dt_binding_check' on your patch (DT_CHECKER_FLAGSis new in v5.13):yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.example.dtb:
/example-0/pinctrl@4e000: failed to match any schema with compatible:
['realtek,rtd16xxb-pinctrl']doc reference errors (make refcheckdocs):
See
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230726090409
[email protected]The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch.
If you already ran 'make
dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
Quoted 6 lines
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note that
DT_SCHEMA_FILEScan be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
I will fix it in the next version.
Thanks,
TY Chang
Rob Herring
maintainerRe: [PATCH 7/7] dt-bindings: pinctrl: realtek: add RTD1619B pinctrl binding
In reply to TY ChangQuoted 17 lines · TY Chang
Add device tree bindings for RTD1619B.
Signed-off-by TY Chang <[email protected]>--- .../pinctrl/realtek,rtd1619b-pinctrl.yaml | 162 ++++++++++++++++++ 1 file changed, 162 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yamlDocumentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml new file +3
-0@@ -0,0 +1,162 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml line 13
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml new file +10
-0+--- +$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1619b-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC RTD1619B Pin Controller + +maintainers: + - TY Chang <[email protected]> + +description: |
Don't need '|' if no formatting to preserve.
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml line 14
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml new file +1
-0+ Binding for Realtek DHC RTD1619B SoC pin control.
Drop 'Binding for'. Every schema is.
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml line 24
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml new file +10
-0+ +properties: + compatible: + const: realtek,rtd1619b-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^.*$':
For new bindings, define a node name pattern you can match on. '-pins$' is commmon.
Quoted 141 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yaml new file +138
-0+ if: + type: object + then: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + pins: + items: + enum: [ gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6, gpio_7, + gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13, gpio_14, + gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20, gpio_21, + gpio_22, gpio_23, usb_cc2, gpio_25, gpio_26, gpio_27, gpio_28, + gpio_29, gpio_30, gpio_31, gpio_32, gpio_33, gpio_34, gpio_35, + hif_data, hif_en, hif_rdy, hif_clk, gpio_40, gpio_41, gpio_42, + gpio_43, gpio_44, gpio_45, gpio_46, gpio_47, gpio_48, gpio_49, + gpio_50, usb_cc1, gpio_52, gpio_53, ir_rx, ur0_rx, ur0_tx, + gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62, gpio_63, + gpio_64, gpio_65, gpio_66, gpio_67, gpio_68, gpio_69, gpio_70, + gpio_71, gpio_72, gpio_73, gpio_74, gpio_75, gpio_76, emmc_cmd, + spi_ce_n, spi_sck, spi_so, spi_si, emmc_rst_n, emmc_dd_sb, + emmc_clk, emmc_data_0, emmc_data_1, emmc_data_2, emmc_data_3, + emmc_data_4, emmc_data_5, emmc_data_6, emmc_data_7, ur2_loc, + gspi_loc, sdio_loc, hi_loc, hi_width, sf_en, arm_trace_dbg_en, + pwm_01_open_drain_en_loc0, pwm_23_open_drain_en_loc0, + pwm_01_open_drain_en_loc1, pwm_23_open_drain_en_loc1, + ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc, dmic_loc, + iso_gspi_loc, ejtag_ve3_loc, ejtag_aucpu0_loc, ejtag_aucpu1_loc ] + + function: + enum: [ gpio, nf, nf_spi, spi, pmic, spdif, spdif_coaxial, spdif_optical_loc0, + spdif_optical_loc1, emmc_spi, emmc, sc1, uart0, uart1, uart2_loc0, uart2_loc1, + gspi_loc1, iso_gspi_loc1, i2c0, i2c1, i2c3, i2c4, i2c5, pwm0, pwm1, pwm2, + pwm3, etn_led, etn_phy, etn_clk, sc0, vfd, gspi_loc0, iso_gspi_loc0, pcie1, + pcie2, sd, sdio_loc0, sdio_loc1, hi, hi_m, dc_fan, pll_test_loc0, pll_test_loc1, + usb_cc1, usb_cc2, ir_rx, tdm_ai_loc0, tdm_ai_loc1, dmic_loc0, dmic_loc1, + ai_loc0, ai_loc1, tp0, tp1, ao, uart2_disable, gspi_disable, sdio_disable, + hi_loc_disable, hi_loc0, hi_width_disable, hi_width_1bit, vtc_i2si_loc0, + vtc_tdm_loc0, vtc_dmic_loc0, vtc_i2si_loc1, vtc_tdm_loc1, vtc_dmic_loc1, + vtc_i2so, ve3_ejtag_loc0, aucpu0_ejtag_loc0, aucpu1_ejtag_loc0, ve3_ejtag_loc1, + aucpu0_ejtag_loc1, aucpu1_ejtag_loc1, ve3_ejtag_loc2, aucpu0_ejtag_loc2, + aucpu1_ejtag_loc2, scpu_ejtag_loc0, acpu_ejtag_loc0, vcpu_ejtag_loc0, + scpu_ejtag_loc1, acpu_ejtag_loc1, vcpu_ejtag_loc1, scpu_ejtag_loc2, + acpu_ejtag_loc2, vcpu_ejtag_loc2, ve3_ejtag_disable, aucpu0_ejtag_disable, + aucpu1_ejtag_disable, acpu_ejtag_disable, vcpu_ejtag_disable, + scpu_ejtag_disable, iso_gspi_disable, sf_disable, sf_enable, + arm_trace_debug_disable, arm_trace_debug_enable, pwm_normal, pwm_open_drain, + standby_dbg, test_loop_dis ] + + drive-strength: + enum: [4, 8] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + drive-push-pull: true + + power-source: + description: | + Valid arguments are described as below: + 0: power supply of 1.8V + 1: power supply of 3.3V + enum: [0, 1] + + realtek,pdrive: + description: | + An integer describing the level to adjust PMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,ndrive: + description: | + An integer describing the level to adjust NMOS output driving capability. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,dcycle: + description: | + An integer describing the level to adjust output duty cycle. + Valid arguments are described as below: + 0: 0ns + 2: + 0.25ns + 3: + 0.5ns + 4: -0.25ns + 5: -0.5ns + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 2, 3, 4, 5 ] + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@4e000 { + compatible = "realtek,rtd16xxb-pinctrl"; + reg = <0x4e000 0x130>; + + emmc_pins_hs200: emmc_pins_hs200 { + pins = "emmc_clk", + "emmc_cmd", + "emmc_data_0", + "emmc_data_1", + "emmc_data_2", + "emmc_data_3", + "emmc_data_4", + "emmc_data_5", + "emmc_data_6", + "emmc_data_7"; + function = "emmc"; + realtek,pdrive = <0x2>; + realtek,ndrive = <0x2>; + }; + + i2c_pins_0: i2c_pins_0 { + pins = "gpio_12", + "gpio_13"; + function = "i2c0"; + drive-strength = <4>; + }; + };Signature · 1 line
2.41.0
RE: [PATCH 7/7] dt-bindings: pinctrl: realtek: add RTD1619B pinctrl binding
Hi Rob,
Quoted 28 lines · TY Chang
Quoted 28 lines
Add device tree bindings for RTD1619B.
Signed-off-by TY Chang <[email protected]>--- .../pinctrl/realtek,rtd1619b-pinctrl.yaml | 162 ++++++++++++++++++ 1 file changed, 162 insertions(+) create mode 100644
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.yamldiff --git a/Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.y aml b/Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinctrl.y aml
new file mode 100644
index 000000000000..8efd33c59ed8Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +8
-0+++ rl.yaml@@ -0,0 +1,162 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2023 +Realtek Semiconductor Corporation %YAML 1.2 +--- +$id: +http://devicetree.org/schemas/pinctrl/realtek,rtd1619b-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# +
Quoted 8 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 13
Quoted 6 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +6
-0+title: Realtek DHC RTD1619B Pin Controller + +maintainers: + - TY Chang <[email protected]> + +description: |Don't need '|' if no formatting to preserve.
I will remove it.
Quoted 4 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 14
Quoted 2 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ Binding for Realtek DHC RTD1619B SoC pin control.Drop 'Binding for'. Every schema is.
I will remove it.
Quoted 14 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 24
Quoted 11 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +10
-0+ +properties: + compatible: + const: realtek,rtd1619b-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^.*$':For new bindings, define a node name pattern you can match on. '-pins$' is commmon.
I will use '-pins$' to be node name pattern and also fix this in the example.
Quoted 172 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 35
Quoted 12 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +11
-0+ if: + type: object + then: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + properties: + pins: + items: + enum: [ gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6,
gpio_7,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 36
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13,
gpio_14,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 37
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20,
gpio_21,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 38
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gpio_22, gpio_23, usb_cc2, gpio_25, gpio_26, gpio_27,
gpio_28,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 39
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gpio_29, gpio_30, gpio_31, gpio_32, gpio_33, gpio_34,
gpio_35,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 40
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ hif_data, hif_en, hif_rdy, hif_clk, gpio_40, gpio_41,
gpio_42,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 41
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gpio_43, gpio_44, gpio_45, gpio_46, gpio_47, gpio_48,
gpio_49,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 42
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gpio_50, usb_cc1, gpio_52, gpio_53, ir_rx, ur0_rx,
ur0_tx,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 43
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gpio_57, gpio_58, gpio_59, gpio_60, gpio_61, gpio_62,
gpio_63,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 44
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gpio_64, gpio_65, gpio_66, gpio_67, gpio_68, gpio_69,
gpio_70,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 45
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gpio_71, gpio_72, gpio_73, gpio_74, gpio_75, gpio_76,
emmc_cmd,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 46
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ spi_ce_n, spi_sck, spi_so, spi_si, emmc_rst_n,
emmc_dd_sb,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 47
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ emmc_clk, emmc_data_0, emmc_data_1,
emmc_data_2,emmc_data_3,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 48
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ emmc_data_4, emmc_data_5, emmc_data_6,
emmc_data_7,ur2_loc,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 49
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gspi_loc, sdio_loc, hi_loc, hi_width, sf_en,
arm_trace_dbg_en,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 50
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ pwm_01_open_drain_en_loc0,
pwm_23_open_drain_en_loc0,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 51
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ pwm_01_open_drain_en_loc1,
pwm_23_open_drain_en_loc1,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 52
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ ejtag_acpu_loc, ejtag_vcpu_loc, ejtag_scpu_loc,
dmic_loc,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 57
Quoted 5 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +5
-0+ iso_gspi_loc, ejtag_ve3_loc, ejtag_aucpu0_loc, + ejtag_aucpu1_loc ] + + function: + enum: [ gpio, nf, nf_spi, spi, pmic, spdif, spdif_coaxial,
spdif_optical_loc0,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 58
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ spdif_optical_loc1, emmc_spi, emmc, sc1, uart0, uart1,
uart2_loc0,uart2_loc1,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 59
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ gspi_loc1, iso_gspi_loc1, i2c0, i2c1, i2c3, i2c4, i2c5, pwm0,pwm1, pwm2,
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 60
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ pwm3, etn_led, etn_phy, etn_clk, sc0, vfd, gspi_loc0,
iso_gspi_loc0, pcie1,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 61
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ pcie2, sd, sdio_loc0, sdio_loc1, hi, hi_m, dc_fan,
pll_test_loc0,pll_test_loc1,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 62
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ usb_cc1, usb_cc2, ir_rx, tdm_ai_loc0, tdm_ai_loc1,
dmic_loc0,dmic_loc1,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 63
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ ai_loc0, ai_loc1, tp0, tp1, ao, uart2_disable, gspi_disable,
sdio_disable,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 64
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ hi_loc_disable, hi_loc0, hi_width_disable, hi_width_1bit,
vtc_i2si_loc0,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 65
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ vtc_tdm_loc0, vtc_dmic_loc0, vtc_i2si_loc1,
vtc_tdm_loc1,vtc_dmic_loc1,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 66
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ vtc_i2so, ve3_ejtag_loc0, aucpu0_ejtag_loc0,
aucpu1_ejtag_loc0,ve3_ejtag_loc1,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 67
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ aucpu0_ejtag_loc1, aucpu1_ejtag_loc1, ve3_ejtag_loc2,
aucpu0_ejtag_loc2,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 68
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ aucpu1_ejtag_loc2, scpu_ejtag_loc0, acpu_ejtag_loc0,
vcpu_ejtag_loc0,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 69
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ scpu_ejtag_loc1, acpu_ejtag_loc1, vcpu_ejtag_loc1,
scpu_ejtag_loc2,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 70
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ acpu_ejtag_loc2, vcpu_ejtag_loc2, ve3_ejtag_disable,
aucpu0_ejtag_disable,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 71
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ aucpu1_ejtag_disable, acpu_ejtag_disable,
vcpu_ejtag_disable,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 72
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ scpu_ejtag_disable, iso_gspi_disable, sf_disable,
sf_enable,Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 73
Quoted 1 line
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +1
-0+ arm_trace_debug_disable, arm_trace_debug_enable,
pwm_normal,pwm_open_drain,Quoted 17 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +17
-0+ standby_dbg, test_loop_dis ] + + drive-strength: + enum: [4, 8] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + drive-push-pull: true +Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 100
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +10
-0+ power-source: + description: | + Valid arguments are described as below: + 0: power supply of 1.8V + 1: power supply of 3.3V + enum: [0, 1] + + realtek,pdrive: + description: | + An integer describing the level to adjust PMOS output drivingcapability.
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct line 107
Quoted 7 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +7
-0+ $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,ndrive: + description: | + An integer describing the level to adjust NMOS output drivingcapability.
Quoted 51 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +51
-0+ $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + + realtek,dcycle: + description: | + An integer describing the level to adjust output duty cycle. + Valid arguments are described as below: + 0: 0ns + 2: + 0.25ns + 3: + 0.5ns + 4: -0.25ns + 5: -0.5ns + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 2, 3, 4, 5 ] + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@4e000 { + compatible = "realtek,rtd16xxb-pinctrl"; + reg = <0x4e000 0x130>; + + emmc_pins_hs200: emmc_pins_hs200 { + pins = "emmc_clk", + "emmc_cmd", + "emmc_data_0", + "emmc_data_1", + "emmc_data_2", + "emmc_data_3", + "emmc_data_4", + "emmc_data_5", + "emmc_data_6", + "emmc_data_7"; + function = "emmc"; + realtek,pdrive = <0x2>; + realtek,ndrive = <0x2>; + }; + + i2c_pins_0: i2c_pins_0 { + pins = "gpio_12",
Quoted 9 lines
Quoted 8 lines
Documentation/devicetree/bindings/pinctrl/realtek,rtd1619b-pinct new file +5
-1+ "gpio_13"; + function = "i2c0"; + drive-strength = <4>; + }; + }; --2.41.0
Thanks,
TY Chang
Hi TY Chang,
thanks for the patches!
Quoted 2 lines · TY Chang
These patches add the bindings and the pinctrl drivers for Realtek DHC(Digital Home Center) RTD
SoCs(RTD1619B, RTD1319D and RTD1315E).
I really like the architecture with a central driver an modules for each SoC that makes this nicely maintainable in the future.
There are some questions around the NMOS/PMOS totempole config (I guess that is what it is) so we need to hash that out into the documentation, then I think the rest falls into place pretty naturally.
Yours,
Linus Walleij