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ARM: dts: qcom: ipq4019-ap.dk01.1: use existing labels for nodes

PATCH Applied Robert Marko 3 participants 15 messages Aug 11, 2023 – Jan 28, 2024

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#0 lore raw

PATCH 1/2 ARM: dts: qcom: ipq4019-ap.dk01.1: use existing labels for nodes

All of the nodes under soc already have existing labels so use those instead.

---
 .../boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi | 140 +++++++++---------
 1 file changed, 69 insertions(+), 71 deletions(-)
arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi +69 -71
index 0505270cf508..0714616c9e45 100644
@@ -27,87 +27,85 @@ aliases {
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+};
 
-	soc {
-		rng@22000 {
-			status = "okay";
-		};
+&prng {
+	status = "okay";
+};
 
-		pinctrl@1000000 {
-			serial_pins: serial_pinmux {
-				mux {
-					pins = "gpio60", "gpio61";
-					function = "blsp_uart0";
-					bias-disable;
-				};
-			};
-
-			spi_0_pins: spi_0_pinmux {
-				pinmux {
-					function = "blsp_spi0";
-					pins = "gpio55", "gpio56", "gpio57";
-				};
-				pinmux_cs {
-					function = "gpio";
-					pins = "gpio54";
-				};
-				pinconf {
-					pins = "gpio55", "gpio56", "gpio57";
-					drive-strength = <12>;
-					bias-disable;
-				};
-				pinconf_cs {
-					pins = "gpio54";
-					drive-strength = <2>;
-					bias-disable;
-					output-high;
-				};
-			};
+&tlmm {
+	serial_pins: serial_pinmux {
+		mux {
+			pins = "gpio60", "gpio61";
+			function = "blsp_uart0";
+			bias-disable;
 		};
+	};
 
-		blsp_dma: dma-controller@7884000 {
-			status = "okay";
+	spi_0_pins: spi_0_pinmux {
+		pinmux {
+			function = "blsp_spi0";
+			pins = "gpio55", "gpio56", "gpio57";
 		};
-
-		spi@78b5000 {
-			pinctrl-0 = <&spi_0_pins>;
-			pinctrl-names = "default";
-			status = "okay";
-			cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
-
-			mx25l25635e@0 {
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0>;
-				compatible = "mx25l25635e";
-				spi-max-frequency = <24000000>;
-			};
+		pinmux_cs {
+			function = "gpio";
+			pins = "gpio54";
 		};
-
-		serial@78af000 {
-			pinctrl-0 = <&serial_pins>;
-			pinctrl-names = "default";
-			status = "okay";
+		pinconf {
+			pins = "gpio55", "gpio56", "gpio57";
+			drive-strength = <12>;
+			bias-disable;
 		};
-
-		cryptobam: dma-controller@8e04000 {
-			status = "okay";
+		pinconf_cs {
+			pins = "gpio54";
+			drive-strength = <2>;
+			bias-disable;
+			output-high;
 		};
+	};
+};
 
-		crypto@8e3a000 {
-			status = "okay";
-		};
+&blsp_dma {
+	status = "okay";
+};
 
-		watchdog@b017000 {
-			status = "okay";
-		};
+&blsp1_spi1 {
+	pinctrl-0 = <&spi_0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+
+	mx25l25635e@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+		compatible = "mx25l25635e";
+		spi-max-frequency = <24000000>;
+	};
+};
 
-		wifi@a000000 {
-			status = "okay";
-		};
+&blsp1_uart1 {
+	pinctrl-0 = <&serial_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
 
-		wifi@a800000 {
-			status = "okay";
-		};
-	};
+&cryptobam {
+	status = "okay";
+};
+
+&crypto {
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&wifi0 {
+	status = "okay";
+};
+
+&wifi1 {
+	status = "okay";
 };
Signature · 1 line
2.41.0
#1 lore raw

PATCH 2/2 ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---
 arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)
arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi +2 -4
index 0714616c9e45..f7ac8f9d0b6f 100644
@@ -75,11 +75,9 @@ &blsp1_spi1 {
 	status = "okay";
 	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 
-	mx25l25635e@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
+	flash@0 {
 		reg = <0>;
-		compatible = "mx25l25635e";
+		compatible = "jedec,spi-nor";
 		spi-max-frequency = <24000000>;
 	};
 };
Signature · 1 line
2.41.0
#2 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Konrad

Quoted 21 lines
 arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)
arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi +2 -4
index 0714616c9e45..f7ac8f9d0b6f 100644
@@ -75,11 +75,9 @@ &blsp1_spi1 {
 	status = "okay";
 	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 
-	mx25l25635e@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
+	flash@0 {
 		reg = <0>;
-		compatible = "mx25l25635e";
+		compatible = "jedec,spi-nor";
 		spi-max-frequency = <24000000>;
 	};
 };
#3 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 9 lines · Konrad Dybcio
Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Hi,
I grepped the vendor U-Boot to make sure it's not being triggered off the mx25l25635e
compatible but the only hit is the IC support itself. MX25L25635 was just the original NOR IC Qualcomm used on the board so to me it made
most sense to just use the JEDEC compatible as NOR itself is JEDEC NOR compatible.

Regards,
Robert

Quoted 24 lines

Konrad

Quoted 21 lines
 arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)
arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi +2 -4
index 0714616c9e45..f7ac8f9d0b6f 100644
@@ -75,11 +75,9 @@ &blsp1_spi1 {
      status = "okay";
      cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 
-     mx25l25635e@0 {
-             #address-cells = <1>;
-             #size-cells = <1>;
+     flash@0 {
              reg = <0>;
-             compatible = "mx25l25635e";
+             compatible = "jedec,spi-nor";
              spi-max-frequency = <24000000>;
      };
 };
Reviewed-by
#4 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 11 lines · Robert Marko
Quoted 9 lines · Konrad Dybcio
Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Quoted 8 lines

Hi,
I grepped the vendor U-Boot to make sure it's not being triggered off the mx25l25635e
compatible but the only hit is the IC support itself. MX25L25635 was just the original NOR IC Qualcomm used on the board so to me it made
most sense to just use the JEDEC compatible as NOR itself is JEDEC NOR compatible.

OK if dynamic identification works fine

Konrad

#5 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 21 lines · Konrad Dybcio
Quoted 11 lines · Robert Marko
Quoted 9 lines · Konrad Dybcio
Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Quoted 8 lines

Hi,
I grepped the vendor U-Boot to make sure it's not being triggered off the mx25l25635e
compatible but the only hit is the IC support itself. MX25L25635 was just the original NOR IC Qualcomm used on the board so to me it made
most sense to just use the JEDEC compatible as NOR itself is JEDEC NOR compatible.

Quoted 1 line

OK if dynamic identification works fine

It should work fine, datasheet is clear that its JEDEC compatible. That being said, I dont actually have the board, just figured it was time for a cleanup as
OpenWrt has been patching DK01 and DK04 for ages.

Regards,
Robert

Quoted 4 lines

Konrad

#6 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 22 lines · Robert Marko
Quoted 21 lines · Konrad Dybcio
Quoted 19 lines · Robert Marko
Quoted 9 lines · Konrad Dybcio
Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Hi,
I grepped the vendor U-Boot to make sure it's not being triggered off the mx25l25635e
compatible but the only hit is the IC support itself. MX25L25635 was just the original NOR IC Qualcomm used on the board so to me it made
most sense to just use the JEDEC compatible as NOR itself is JEDEC NOR compatible.

Quoted 6 lines
Quoted 1 line

OK if dynamic identification works fine

It should work fine, datasheet is clear that its JEDEC compatible. That being said, I dont actually have the board, just figured it was time for a cleanup as
OpenWrt has been patching DK01 and DK04 for ages.

Hm. Do we know whether there are still users of this boards?

Konrad

#7 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 24 lines · Konrad Dybcio
Quoted 22 lines · Robert Marko
Quoted 21 lines · Konrad Dybcio
Quoted 19 lines · Robert Marko
Quoted 9 lines · Konrad Dybcio
Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Hi,
I grepped the vendor U-Boot to make sure it's not being triggered off the mx25l25635e
compatible but the only hit is the IC support itself. MX25L25635 was just the original NOR IC Qualcomm used on the board so to me it made
most sense to just use the JEDEC compatible as NOR itself is JEDEC NOR compatible.

Quoted 7 lines
Quoted 6 lines
Quoted 1 line

OK if dynamic identification works fine

It should work fine, datasheet is clear that its JEDEC compatible. That being said, I dont actually have the board, just figured it was time for a cleanup as
OpenWrt has been patching DK01 and DK04 for ages.

Hm. Do we know whether there are still users of this boards?

I honestly doubt it as they have been broken in OpenWrt for years and nobody complained.
So we are currently removing support for them, but I still wanted to at least fixup the DTS state
upstream.
These boards are not obtainable anymore.

Regards,
Robert

Quoted 2 lines

Konrad

#8 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 31 lines · Robert Marko
Quoted 30 lines · Konrad Dybcio
Quoted 28 lines · Robert Marko
Quoted 21 lines · Konrad Dybcio
Quoted 11 lines · Robert Marko
Quoted 9 lines · Konrad Dybcio
Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Quoted 8 lines

Hi,
I grepped the vendor U-Boot to make sure it's not being triggered off the mx25l25635e
compatible but the only hit is the IC support itself. MX25L25635 was just the original NOR IC Qualcomm used on the board so to me it made
most sense to just use the JEDEC compatible as NOR itself is JEDEC NOR compatible.

Quoted 1 line

OK if dynamic identification works fine

It should work fine, datasheet is clear that its JEDEC compatible. That being said, I dont actually have the board, just figured it was time for a cleanup as
OpenWrt has been patching DK01 and DK04 for ages.

Quoted 8 lines
Quoted 1 line

Hm. Do we know whether there are still users of this boards?

I honestly doubt it as they have been broken in OpenWrt for years and nobody complained.
So we are currently removing support for them, but I still wanted to at least fixup the DTS state
upstream.
These boards are not obtainable anymore.

I also noticed they were detached from the other snapdragons in u-boot for no good reason (at first glance anyway).

If we don't get any hands up from users, I think deprecation is in order.

Konrad

#9 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 35 lines · Konrad Dybcio
Quoted 33 lines · Robert Marko
Quoted 31 lines · Konrad Dybcio
Quoted 22 lines · Robert Marko
Quoted 21 lines · Konrad Dybcio
Quoted 19 lines · Robert Marko
Quoted 9 lines · Konrad Dybcio
Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Hi,
I grepped the vendor U-Boot to make sure it's not being triggered off the mx25l25635e
compatible but the only hit is the IC support itself. MX25L25635 was just the original NOR IC Qualcomm used on the board so to me it made
most sense to just use the JEDEC compatible as NOR itself is JEDEC NOR compatible.

Quoted 6 lines
Quoted 1 line

OK if dynamic identification works fine

It should work fine, datasheet is clear that its JEDEC compatible. That being said, I dont actually have the board, just figured it was time for a cleanup as
OpenWrt has been patching DK01 and DK04 for ages.

Hm. Do we know whether there are still users of this boards?

Quoted 8 lines
Quoted 6 lines

I honestly doubt it as they have been broken in OpenWrt for years and nobody complained.
So we are currently removing support for them, but I still wanted to at least fixup the DTS state
upstream.
These boards are not obtainable anymore.

I also noticed they were detached from the other snapdragons in u-boot for no good reason (at first glance anyway).

If you are talking about the mainline U-Boot then yeah, my basic port was done years ago and I knew way less about the SoC then now.
Currently its on my TODO to merge them with Snapdragon and add some proper GPIO and pinctrl drivers as well as using the Linux DTS.

Quoted 4 lines

If we don't get any hands up from users, I think deprecation is in order.

Konrad

#10 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 42 lines · Robert Marko
Quoted 41 lines · Konrad Dybcio
Quoted 39 lines · Robert Marko
Quoted 24 lines · Konrad Dybcio
Quoted 22 lines · Robert Marko
Quoted 21 lines · Konrad Dybcio
Quoted 19 lines · Robert Marko
Quoted 9 lines · Konrad Dybcio
Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Hi,
I grepped the vendor U-Boot to make sure it's not being triggered off the mx25l25635e
compatible but the only hit is the IC support itself. MX25L25635 was just the original NOR IC Qualcomm used on the board so to me it made
most sense to just use the JEDEC compatible as NOR itself is JEDEC NOR compatible.

Quoted 7 lines
Quoted 6 lines
Quoted 1 line

OK if dynamic identification works fine

It should work fine, datasheet is clear that its JEDEC compatible. That being said, I dont actually have the board, just figured it was time for a cleanup as
OpenWrt has been patching DK01 and DK04 for ages.

Hm. Do we know whether there are still users of this boards?

I honestly doubt it as they have been broken in OpenWrt for years and nobody complained.
So we are currently removing support for them, but I still wanted to at least fixup the DTS state
upstream.
These boards are not obtainable anymore.

Quoted 7 lines
Quoted 2 lines

I also noticed they were detached from the other snapdragons in u-boot for no good reason (at first glance anyway).

If you are talking about the mainline U-Boot then yeah, my basic port was done years ago and I knew way less about the SoC then now.
Currently its on my TODO to merge them with Snapdragon and add some proper GPIO and pinctrl drivers as well as using the Linux DTS.

Take a look at this branch of mine [1], I already did some of that.

If you wish to upstream that, please coordinate with Caleb (+CC) who may be interested in the same in parallel.

[1] https://github.com/konradybcio/u-boot/commits/konrad/rb1_forcepushing

Konrad

#11 lore raw

Re: [PATCH 2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings

Quoted 51 lines · Konrad Dybcio
Quoted 42 lines · Robert Marko
Quoted 41 lines · Konrad Dybcio
Quoted 39 lines · Robert Marko
Quoted 24 lines · Konrad Dybcio
Quoted 22 lines · Robert Marko
Quoted 21 lines · Konrad Dybcio
Quoted 19 lines · Robert Marko
Quoted 9 lines · Konrad Dybcio
Quoted 6 lines · Robert Marko

Rename the SPI-NOR node to flash@0, remove #address-cells and #size-cells as they should be under the partitions subnode and use the generic jedec,spi-nor compatible.

---

You can also do "nandmanufacturer,mx25l25635e", "jedec,spi-nor"

Hi,
I grepped the vendor U-Boot to make sure it's not being triggered off the mx25l25635e
compatible but the only hit is the IC support itself. MX25L25635 was just the original NOR IC Qualcomm used on the board so to me it made
most sense to just use the JEDEC compatible as NOR itself is JEDEC NOR compatible.

Quoted 7 lines
Quoted 6 lines
Quoted 1 line

OK if dynamic identification works fine

It should work fine, datasheet is clear that its JEDEC compatible. That being said, I dont actually have the board, just figured it was time for a cleanup as
OpenWrt has been patching DK01 and DK04 for ages.

Hm. Do we know whether there are still users of this boards?

I honestly doubt it as they have been broken in OpenWrt for years and nobody complained.
So we are currently removing support for them, but I still wanted to at least fixup the DTS state
upstream.
These boards are not obtainable anymore.

Quoted 7 lines
Quoted 2 lines

I also noticed they were detached from the other snapdragons in u-boot for no good reason (at first glance anyway).

If you are talking about the mainline U-Boot then yeah, my basic port was done years ago and I knew way less about the SoC then now.
Currently its on my TODO to merge them with Snapdragon and add some proper GPIO and pinctrl drivers as well as using the Linux DTS.

Quoted 6 lines

Take a look at this branch of mine [1], I already did some of that.

If you wish to upstream that, please coordinate with Caleb (+CC) who may be interested in the same in parallel.

[1] https://github.com/konradybcio/u-boot/commits/konrad/rb1_forcepushing

That is great, though this is very low hanging fruit for me, I have plenty more of IPQ807x
stuff that needs to make its way upstream.

Regards,
Robert

Quoted 2 lines

Konrad

Reviewed-by on v1 1/2
#12 lore raw
In reply to Robert Marko
Quoted 5 lines · Robert Marko

All of the nodes under soc already have existing labels so use those instead.

---

dtx_diff returns an empty diff, nice

Couple further suggestions:

- wdog can probably enabled unconditionally
- same for blsp dma since there's only one host so it must be used by something
- same for crypto engine as it's a common piece of hw
- you can drop mux{}, pinmux{}, pinconf{} from pin nodes, just add the properties directly under the pin nodes
- this devicetree could use some schema warnings cleanup (make dtbs_check plus things like no underscores in node names)

Konrad

Quoted 164 lines
 .../boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi | 140 +++++++++---------
 1 file changed, 69 insertions(+), 71 deletions(-)
arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi +69 -71
index 0505270cf508..0714616c9e45 100644
@@ -27,87 +27,85 @@ aliases {
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+};
 
-	soc {
-		rng@22000 {
-			status = "okay";
-		};
+&prng {
+	status = "okay";
+};
 
-		pinctrl@1000000 {
-			serial_pins: serial_pinmux {
-				mux {
-					pins = "gpio60", "gpio61";
-					function = "blsp_uart0";
-					bias-disable;
-				};
-			};
-
-			spi_0_pins: spi_0_pinmux {
-				pinmux {
-					function = "blsp_spi0";
-					pins = "gpio55", "gpio56", "gpio57";
-				};
-				pinmux_cs {
-					function = "gpio";
-					pins = "gpio54";
-				};
-				pinconf {
-					pins = "gpio55", "gpio56", "gpio57";
-					drive-strength = <12>;
-					bias-disable;
-				};
-				pinconf_cs {
-					pins = "gpio54";
-					drive-strength = <2>;
-					bias-disable;
-					output-high;
-				};
-			};
+&tlmm {
+	serial_pins: serial_pinmux {
+		mux {
+			pins = "gpio60", "gpio61";
+			function = "blsp_uart0";
+			bias-disable;
 		};
+	};
 
-		blsp_dma: dma-controller@7884000 {
-			status = "okay";
+	spi_0_pins: spi_0_pinmux {
+		pinmux {
+			function = "blsp_spi0";
+			pins = "gpio55", "gpio56", "gpio57";
 		};
-
-		spi@78b5000 {
-			pinctrl-0 = <&spi_0_pins>;
-			pinctrl-names = "default";
-			status = "okay";
-			cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
-
-			mx25l25635e@0 {
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0>;
-				compatible = "mx25l25635e";
-				spi-max-frequency = <24000000>;
-			};
+		pinmux_cs {
+			function = "gpio";
+			pins = "gpio54";
 		};
-
-		serial@78af000 {
-			pinctrl-0 = <&serial_pins>;
-			pinctrl-names = "default";
-			status = "okay";
+		pinconf {
+			pins = "gpio55", "gpio56", "gpio57";
+			drive-strength = <12>;
+			bias-disable;
 		};
-
-		cryptobam: dma-controller@8e04000 {
-			status = "okay";
+		pinconf_cs {
+			pins = "gpio54";
+			drive-strength = <2>;
+			bias-disable;
+			output-high;
 		};
+	};
+};
 
-		crypto@8e3a000 {
-			status = "okay";
-		};
+&blsp_dma {
+	status = "okay";
+};
 
-		watchdog@b017000 {
-			status = "okay";
-		};
+&blsp1_spi1 {
+	pinctrl-0 = <&spi_0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+
+	mx25l25635e@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+		compatible = "mx25l25635e";
+		spi-max-frequency = <24000000>;
+	};
+};
 
-		wifi@a000000 {
-			status = "okay";
-		};
+&blsp1_uart1 {
+	pinctrl-0 = <&serial_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
 
-		wifi@a800000 {
-			status = "okay";
-		};
-	};
+&cryptobam {
+	status = "okay";
+};
+
+&crypto {
+	status = "okay";
+};
+
+&watchdog {
+	status = "okay";
+};
+
+&wifi0 {
+	status = "okay";
+};
+
+&wifi1 {
+	status = "okay";
 };
#13 lore raw
Quoted 13 lines · Konrad Dybcio
Quoted 5 lines · Robert Marko

All of the nodes under soc already have existing labels so use those instead.

---

dtx_diff returns an empty diff, nice

Couple further suggestions:

Quoted 8 lines

- wdog can probably enabled unconditionally
- same for blsp dma since there's only one host so it must be used by something
- same for crypto engine as it's a common piece of hw
- you can drop mux{}, pinmux{}, pinconf{} from pin nodes, just add the properties directly under the pin nodes
- this devicetree could use some schema warnings cleanup (make dtbs_check plus things like no underscores in node names)

Hi,
Yeah, I am planning a follow-up to clean up the pinctrl and most of the stuff you mentioned
for the SoC DTSI itself.
I wanted to keep the diff clean here and just use the labels.

Regards,
Robert

Quoted 166 lines

Konrad

Quoted 164 lines
 .../boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi | 140 +++++++++---------
 1 file changed, 69 insertions(+), 71 deletions(-)
arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk01.1.dtsi +69 -71
index 0505270cf508..0714616c9e45 100644
@@ -27,87 +27,85 @@ aliases {
      chosen {
              stdout-path = "serial0:115200n8";
      };
+};
 
-     soc {
-             rng@22000 {
-                     status = "okay";
-             };
+&prng {
+     status = "okay";
+};
 
-             pinctrl@1000000 {
-                     serial_pins: serial_pinmux {
-                             mux {
-                                     pins = "gpio60", "gpio61";
-                                     function = "blsp_uart0";
-                                     bias-disable;
-                             };
-                     };
-
-                     spi_0_pins: spi_0_pinmux {
-                             pinmux {
-                                     function = "blsp_spi0";
-                                     pins = "gpio55", "gpio56", "gpio57";
-                             };
-                             pinmux_cs {
-                                     function = "gpio";
-                                     pins = "gpio54";
-                             };
-                             pinconf {
-                                     pins = "gpio55", "gpio56", "gpio57";
-                                     drive-strength = <12>;
-                                     bias-disable;
-                             };
-                             pinconf_cs {
-                                     pins = "gpio54";
-                                     drive-strength = <2>;
-                                     bias-disable;
-                                     output-high;
-                             };
-                     };
+&tlmm {
+     serial_pins: serial_pinmux {
+             mux {
+                     pins = "gpio60", "gpio61";
+                     function = "blsp_uart0";
+                     bias-disable;
              };
+     };
 
-             blsp_dma: dma-controller@7884000 {
-                     status = "okay";
+     spi_0_pins: spi_0_pinmux {
+             pinmux {
+                     function = "blsp_spi0";
+                     pins = "gpio55", "gpio56", "gpio57";
              };
-
-             spi@78b5000 {
-                     pinctrl-0 = <&spi_0_pins>;
-                     pinctrl-names = "default";
-                     status = "okay";
-                     cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
-
-                     mx25l25635e@0 {
-                             #address-cells = <1>;
-                             #size-cells = <1>;
-                             reg = <0>;
-                             compatible = "mx25l25635e";
-                             spi-max-frequency = <24000000>;
-                     };
+             pinmux_cs {
+                     function = "gpio";
+                     pins = "gpio54";
              };
-
-             serial@78af000 {
-                     pinctrl-0 = <&serial_pins>;
-                     pinctrl-names = "default";
-                     status = "okay";
+             pinconf {
+                     pins = "gpio55", "gpio56", "gpio57";
+                     drive-strength = <12>;
+                     bias-disable;
              };
-
-             cryptobam: dma-controller@8e04000 {
-                     status = "okay";
+             pinconf_cs {
+                     pins = "gpio54";
+                     drive-strength = <2>;
+                     bias-disable;
+                     output-high;
              };
+     };
+};
 
-             crypto@8e3a000 {
-                     status = "okay";
-             };
+&blsp_dma {
+     status = "okay";
+};
 
-             watchdog@b017000 {
-                     status = "okay";
-             };
+&blsp1_spi1 {
+     pinctrl-0 = <&spi_0_pins>;
+     pinctrl-names = "default";
+     status = "okay";
+     cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+
+     mx25l25635e@0 {
+             #address-cells = <1>;
+             #size-cells = <1>;
+             reg = <0>;
+             compatible = "mx25l25635e";
+             spi-max-frequency = <24000000>;
+     };
+};
 
-             wifi@a000000 {
-                     status = "okay";
-             };
+&blsp1_uart1 {
+     pinctrl-0 = <&serial_pins>;
+     pinctrl-names = "default";
+     status = "okay";
+};
 
-             wifi@a800000 {
-                     status = "okay";
-             };
-     };
+&cryptobam {
+     status = "okay";
+};
+
+&crypto {
+     status = "okay";
+};
+
+&watchdog {
+     status = "okay";
+};
+
+&wifi0 {
+     status = "okay";
+};
+
+&wifi1 {
+     status = "okay";
 };
maintainer Applied
#14 lore raw

Re: (subset) [PATCH 1/2] ARM: dts: qcom: ipq4019-ap.dk01.1: use existing labels for nodes

In reply to Robert Marko
Quoted 4 lines · Robert Marko

All of the nodes under soc already have existing labels so use those instead.

Applied, thanks!

[1/2] ARM: dts: qcom: ipq4019-ap.dk01.1: use existing labels for nodes

      commit: 54850df251cb88ba9a32b6371c8cd5908efa3ec6
[2/2] ARM: dts: qcom: ipq4019-ap.dk01.1: align flash node with bindings
      commit: 111bc3710caa7e55bc0040ffa57cec83e09dac07

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>