pinctrl: sunxi: h616: add extra gpio banks

PATCH Superseded Mikhail Kalashnikov 3 participants 5 messages Sep 9, 2023

Subsystems (3)

GPIO Arm/Allwinner sunXi SoC support Pin control

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Mikhail Kalashnikov

author

2023-09-09 09:46 UTC #0 lore raw

PATCH v2 1/1 pinctrl: sunxi: h616: add extra gpio banks

From: iuncuim <[email protected]>

Some SoCs from the H616 family (such as the T507) have the same die but more output pins that are used for additional peripherals. The T507 SoC don't have a built-in multiphy like the AC200 or AC300 connected ti the bank A. With the T507 these pins can be freely used for any other application. This patch adds the missing muxes on banks A, D and E.

Signed-off-by Mikhail Kalashnikov <[email protected]>

---
 drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 380 +++++++++++++++++++-
 1 file changed, 366 insertions(+), 14 deletions(-)

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +366 ~~-14~~

index d6ca720ee..10d4e1ef1 100644
@@ -16,33 +16,81 @@
 #include "pinctrl-sunxi.h"
 
 static const struct sunxi_desc_pin h616_pins[] = {
-	/* Internal connection to the AC200 part */
+	/* Internally connected to the AC200 part in the H616 SoC */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD1 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD1 */
+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/* PA_EINT0 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD0 */
+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),	/* PA_EINT1 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ECRS_DV */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ECRS_DV */
+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),	/* PA_EINT2 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXERR */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXERR */
+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/* PA_EINT3 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD1 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD1 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),	/* PA_EINT4 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD0 */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* DOUT0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),	/* PA_EINT5 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXCK */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXCK */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* MCLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),	/* PA_EINT6 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXEN */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXEN */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* BCLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),	/* PA_EINT7 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* EMDC */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* EMDC */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* LRCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),	/* PA_EINT8 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* EMDIO */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* EMDIO */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* DIN0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),	/* PA_EINT9 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
-		  SUNXI_FUNCTION(0x2, "i2c3")),		/* SCK */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "i2c3"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),	/* PA_EINT10 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
-		  SUNXI_FUNCTION(0x2, "i2c3")),		/* SDA */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "i2c3"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),	/* PA_EINT11 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
-		  SUNXI_FUNCTION(0x2, "pwm5")),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "pwm5"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),	/* PA_EINT12 */
 	/* Hole */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),

@@ -149,6 +197,310 @@ static const struct sunxi_desc_pin h616_pins[] = {
 		  SUNXI_FUNCTION(0x4, "spi0"),		/* HOLD */
 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 16)),	/* PC_EINT16 */
 	/* Hole */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D0 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP0 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),	/* PD_EINT0 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D1 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN0 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* ERR */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),	/* PD_EINT1 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D2 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP1 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* SYNC */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),	/* PD_EINT2 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D3 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN1 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* DVLD */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),	/* PD_EINT3 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D4 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP2 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),	/* PD_EINT4 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D5 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN2 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D1 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),	/* PD_EINT5 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D6 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VPC */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D2 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)),	/* PD_EINT6 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D7 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VNC */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D3 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)),	/* PD_EINT7 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D8 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP3 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D4 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),	/* PD_EINT8 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D9 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN3 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D5 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),	/* PD_EINT9 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D10 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP0 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D6 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)),	/* PD_EINT10 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D11 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN0 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D7 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)),	/* PD_EINT11 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D12 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP1 */
+		  SUNXI_FUNCTION(0x4, "sim"), 		/* VPPEN */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)),	/* PD_EINT12 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D13 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN1 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* VPPPP */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)),	/* PD_EINT13 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D14 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP2 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* PWREN */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)),	/* PD_EINT14 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D15 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN2 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)),	/* PD_EINT15 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D16 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VPC */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* DATA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)),	/* PD_EINT16 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D17 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VNC */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* RST */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)),	/* PD_EINT17 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D18 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP3 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* DET */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)),	/* PD_EINT18 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D19 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN3 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)),	/* PD_EINT19 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D20 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 20)),	/* PD_EINT20 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D21 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 21)),	/* PD_EINT21 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D22 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 22)),	/* PD_EINT22 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D23 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 23)),	/* PD_EINT23 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 24)),	/* PD_EINT24 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* DE */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 25)),	/* PD_EINT25 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* HSYNC */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 26)),	/* PD_EINT26 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* VSYNC */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 27)),	/* PD_EINT27 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 28),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "pwm0"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 28)),	/* PD_EINT28 */
+	/* Hole */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  PCLK  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)),	/* PE_EINT0 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  MCLK  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)),	/* PE_EINT1 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  HSYNC  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)),	/* PE_EINT2 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  VSYNC  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)),	/* PE_EINT3 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D0  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)),	/* PE_EINT4 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D1  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)),	/* PE_EINT5 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D2  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)),	/* PE_EINT6 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D3  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)),	/* PE_EINT7 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D4  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)),	/* PE_EINT8 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D5  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)),	/* PE_EINT9 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D6  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)),	/* PE_EINT10 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D7  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 11)),	/* PE_EINT11 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D8  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 12)),	/* PE_EINT12 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D9  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 13)),	/* PE_EINT13 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D10  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 14)),	/* PE_EINT14 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D11  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 15)),	/* PE_EINT15 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D12  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 16)),	/* PE_EINT16 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D13  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 17)),	/* PE_EINT17 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D14  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 18)),	/* PE_EINT18 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D15  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 19)),	/* PE_EINT19 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  SCK  */
+		  SUNXI_FUNCTION(0x5, "i2c2"),		/*  SCK  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 20)),	/* PE_EINT20 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  SDA */
+		  SUNXI_FUNCTION(0x5, "i2c2"),		/*  SDA  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 21)),	/* PE_EINT21 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  FSIN0 */
+		  SUNXI_FUNCTION(0x4, "tcon0"),		/*  TRIG0  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 22)),	/* PE_EINT22 */
+	/* Hole */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),

Signature · 1 line

2.42.0

Jernej Škrabec

maintainer

2023-09-09 10:14 UTC #1 lore raw

Dne sobota, 09. september 2023 ob 11:45:29 CEST je Mikhail Kalashnikov napisal(a):

Quoted 10 lines

From: iuncuim <[email protected]>
Some SoCs from the H616 family (such as the T507) have the same die but more output pins that are used for additional peripherals. The T507 SoC don't have a built-in multiphy like the AC200 or AC300 connected ti the bank A. With the T507 these pins can be freely used for any other application. This patch adds the missing muxes on banks A, D and E.
Signed-off-by Mikhail Kalashnikov <[email protected]>
---

You missed changelog here. What are changes in regards to v1?

Best regards,
Jernej

Quoted 9 lines

 drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 380 +++++++++++++++++++-
 1 file changed, 366 insertions(+), 14 deletions(-)
(quoted diff) +0 -0
b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c index d6ca720ee..10d4e1ef1 100644

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 23

Quoted 10 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -2

@@ -16,33 +16,81 @@
 #include "pinctrl-sunxi.h"
 
 static const struct sunxi_desc_pin h616_pins[] = {
-	/* Internal connection to the AC200 part */
+	/* Internally connected to the AC200 part in the H616 SoC */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD1 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD1

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 25

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0

+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/*

PA_EINT0 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD0

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 31

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0

+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),	/*

PA_EINT1 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ECRS_DV */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ECRS_DV

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 37

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0

+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),	/*

PA_EINT2 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXERR */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXERR

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 43

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0

+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/*

PA_EINT3 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD1 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD1

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 48

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),	/* 

PA_EINT4 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD0

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 54

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0

+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* DOUT0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),	/*

PA_EINT5 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXCK */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXCK

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 60

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0

+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* MCLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),	/*

PA_EINT6 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXEN */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXEN

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 66

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0

+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* BCLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),	/*

PA_EINT7 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* EMDC */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* EMDC */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* LRCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),	/*

PA_EINT8 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* EMDIO */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* EMDIO

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 78

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0

+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* DIN0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),	/*

PA_EINT9 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 41

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +0 -1
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
-		  SUNXI_FUNCTION(0x2, "i2c3")),		/* SCK 

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "i2c3"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),	/*

PA_EINT10 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 43

Quoted 2 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +0 -1
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
-		  SUNXI_FUNCTION(0x2, "i2c3")),		/* SDA 

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "i2c3"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),	/*

PA_EINT11 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c

Quoted 6 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -1

 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
-		  SUNXI_FUNCTION(0x2, "pwm5")),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "pwm5"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),	/*

PA_EINT12 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 197

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +0 -0

 	/* Hole */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),

@@ -149,6 +197,310 @@ static const struct sunxi_desc_pin h616_pins[] = {
 		  SUNXI_FUNCTION(0x4, "spi0"),		/* HOLD

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 198

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +0 -0
 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 16)),	/* 

PC_EINT16 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 8 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

 	/* Hole */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D0 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP0 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),	/*

PD_EINT0 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D1 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN0 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* ERR */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),	/*

PD_EINT1 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 6 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D2 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP1 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* SYNC

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 220

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),	/* 

PD_EINT2 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 6 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D3 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN1 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* DVLD

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 227

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),	/* 

PD_EINT3 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D4 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP2 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),	/*

PD_EINT4 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D5 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN2 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D1 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),	/*

PD_EINT5 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D6 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VPC */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D2 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)),	/*

PD_EINT6 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D7 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VNC */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D3 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)),	/*

PD_EINT7 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D8 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP3 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D4 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),	/*

PD_EINT8 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D9 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN3 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D5 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),	/*

PD_EINT9 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D10 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP0 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D6 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)),	/*

PD_EINT10 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D11 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN0 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D7 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)),	/*

PD_EINT11 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 6 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D12 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP1 */
+		  SUNXI_FUNCTION(0x4, "sim"), 		/* VPPEN

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 290

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)),	/* 

PD_EINT12 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 6 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D13 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN1 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* VPPPP

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 297

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)),	/* 

PD_EINT13 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 6 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D14 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP2 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* PWREN

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 304

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)),	/* 

PD_EINT14 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D15 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN2 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)),	/*

PD_EINT15 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 6 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D16 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VPC */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* DATA

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 318

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)),	/* 

PD_EINT16 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D17 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VNC */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* RST */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)),	/*

PD_EINT17 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 7 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D18 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP3 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* DET */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)),	/*

PD_EINT18 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 6 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D19 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN3 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)),	/*

PD_EINT19 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D20 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 20)),	/*

PD_EINT20 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D21 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 21)),	/*

PD_EINT21 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D22 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 22)),	/*

PD_EINT22 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D23 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 23)),	/*

PD_EINT23 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 24)),	/*

PD_EINT24 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* DE */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 25)),	/*

PD_EINT25 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* HSYNC

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 373

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 26)),	/* 

PD_EINT26 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* VSYNC

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 378

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 27)),	/* 

PD_EINT27 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 28),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "pwm0"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 28)),	/*

PD_EINT28 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 5 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0

+	/* Hole */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  PCLK

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 389

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)),	/* 

PE_EINT0 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  MCLK

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 394

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)),	/* 

PE_EINT1 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*

HSYNC */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 399

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)),	/* 

PE_EINT2 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*

VSYNC */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 404

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)),	/* 

PE_EINT3 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D0

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 409

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)),	/* 

PE_EINT4 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D1

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 414

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)),	/* 

PE_EINT5 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D2

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 419

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)),	/* 

PE_EINT6 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D3

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 424

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)),	/* 

PE_EINT7 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D4

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 429

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)),	/* 

PE_EINT8 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D5

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 434

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)),	/* 

PE_EINT9 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D6

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 439

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)),	/* 

PE_EINT10 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D7

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 444

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 11)),	/* 

PE_EINT11 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D8

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 449

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 12)),	/* 

PE_EINT12 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D9

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 454

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 13)),	/* 

PE_EINT13 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D10

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 459

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 14)),	/* 

PE_EINT14 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D11

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 464

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 15)),	/* 

PE_EINT15 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D12

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 469

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 16)),	/* 

PE_EINT16 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D13

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 474

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 17)),	/* 

PE_EINT17 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D14

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 479

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 18)),	/* 

PE_EINT18 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D15

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 484

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 19)),	/* 

PE_EINT19 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  SCK

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 489

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION(0x5, "i2c2"),		/*  SCK  

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 490

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 20)),	/* 

PE_EINT20 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  SDA

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 495

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION(0x5, "i2c2"),		/*  SDA  

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 496

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 21)),	/* 

PE_EINT21 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0

+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*

FSIN0 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 501

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION(0x4, "tcon0"),		/*  TRIG0  

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 502

Quoted 1 line

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 22)),	/* 

PE_EINT22 */

Quoted 4 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0

+	/* Hole */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),

Mikhail Kalashnikov

author

2023-09-09 10:33 UTC #2 lore raw

Thank you for your comment.

I added a changelog in response to the first message/

Quoted 547 lines · Jernej Škrabec

Dne sobota, 09. september 2023 ob 11:45:29 CEST je Mikhail Kalashnikov napisal(a):
Quoted 10 lines
From: iuncuim <[email protected]>
Some SoCs from the H616 family (such as the T507) have the same die but more output pins that are used for additional peripherals. The T507 SoC don't have a built-in multiphy like the AC200 or AC300 connected ti the bank A. With the T507 these pins can be freely used for any other application. This patch adds the missing muxes on banks A, D and E.
Signed-off-by Mikhail Kalashnikov <[email protected]>
---
You missed changelog here. What are changes in regards to v1?
Best regards,
Jernej
Quoted 9 lines
  drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 380 +++++++++++++++++++-
  1 file changed, 366 insertions(+), 14 deletions(-)
(quoted diff) +0 -0
b/drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c index d6ca720ee..10d4e1ef1 100644
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 23
Quoted 10 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -2
@@ -16,33 +16,81 @@
  #include "pinctrl-sunxi.h"
 
  static const struct sunxi_desc_pin h616_pins[] = {
-	/* Internal connection to the AC200 part */
+	/* Internally connected to the AC200 part in the H616 SoC */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD1 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD1
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 25
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0
+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/*
PA_EINT0 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD0
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 31
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0
+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),	/*
PA_EINT1 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ECRS_DV */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ECRS_DV
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 37
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0
+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),	/*
PA_EINT2 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXERR */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXERR
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 43
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0
+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/*
PA_EINT3 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD1 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD1
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 48
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),	/*
PA_EINT4 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD0
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 54
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* DOUT0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),	/*
PA_EINT5 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXCK */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXCK
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 60
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* MCLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),	/*
PA_EINT6 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXEN */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXEN
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 66
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* BCLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),	/*
PA_EINT7 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* EMDC */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* EMDC */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* LRCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),	/*
PA_EINT8 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +3 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* EMDIO */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* EMDIO
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 78
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +2 -0
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* DIN0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),	/*
PA_EINT9 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 41
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +0 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
-		  SUNXI_FUNCTION(0x2, "i2c3")),		/* SCK
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "i2c3"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),	/*
PA_EINT10 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 43
Quoted 2 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +0 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
-		  SUNXI_FUNCTION(0x2, "i2c3")),		/* SDA
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "i2c3"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),	/*
PA_EINT11 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c
Quoted 6 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -1
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
-		  SUNXI_FUNCTION(0x2, "pwm5")),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "pwm5"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),	/*
PA_EINT12 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 197
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +0 -0
  	/* Hole */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
  		  SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -149,6 +197,310 @@ static const struct sunxi_desc_pin h616_pins[] = {
  		  SUNXI_FUNCTION(0x4, "spi0"),		/* HOLD
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 198
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +0 -0
  		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 16)),	/*
PC_EINT16 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 8 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
  	/* Hole */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D0 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP0 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),	/*
PD_EINT0 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D1 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN0 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* ERR */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),	/*
PD_EINT1 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 6 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D2 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP1 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* SYNC
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 220
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),	/*
PD_EINT2 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 6 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D3 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN1 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* DVLD
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 227
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),	/*
PD_EINT3 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D4 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP2 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),	/*
PD_EINT4 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D5 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN2 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D1 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),	/*
PD_EINT5 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D6 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VPC */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D2 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)),	/*
PD_EINT6 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D7 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VNC */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D3 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)),	/*
PD_EINT7 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D8 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP3 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D4 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),	/*
PD_EINT8 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D9 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN3 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D5 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),	/*
PD_EINT9 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D10 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP0 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D6 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)),	/*
PD_EINT10 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D11 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN0 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D7 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)),	/*
PD_EINT11 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 6 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D12 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP1 */
+		  SUNXI_FUNCTION(0x4, "sim"), 		/* VPPEN
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 290
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)),	/*
PD_EINT12 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 6 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D13 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN1 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* VPPPP
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 297
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)),	/*
PD_EINT13 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 6 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D14 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP2 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* PWREN
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 304
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)),	/*
PD_EINT14 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D15 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN2 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)),	/*
PD_EINT15 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 6 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D16 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VPC */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* DATA
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 318
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)),	/*
PD_EINT16 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D17 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VNC */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* RST */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)),	/*
PD_EINT17 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 7 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +7 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D18 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP3 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* DET */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)),	/*
PD_EINT18 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 6 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +6 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D19 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN3 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)),	/*
PD_EINT19 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D20 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 20)),	/*
PD_EINT20 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D21 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 21)),	/*
PD_EINT21 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D22 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 22)),	/*
PD_EINT22 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D23 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 23)),	/*
PD_EINT23 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 24)),	/*
PD_EINT24 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* DE */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 25)),	/*
PD_EINT25 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* HSYNC
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 373
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 26)),	/*
PD_EINT26 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* VSYNC
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 378
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 27)),	/*
PD_EINT27 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 28),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "pwm0"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 28)),	/*
PD_EINT28 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 5 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +5 -0
+	/* Hole */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  PCLK
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 389
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)),	/*
PE_EINT0 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  MCLK
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 394
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)),	/*
PE_EINT1 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*
HSYNC */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 399
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)),	/*
PE_EINT2 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*
VSYNC */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 404
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)),	/*
PE_EINT3 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D0
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 409
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)),	/*
PE_EINT4 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D1
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 414
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)),	/*
PE_EINT5 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D2
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 419
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)),	/*
PE_EINT6 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D3
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 424
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)),	/*
PE_EINT7 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D4
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 429
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)),	/*
PE_EINT8 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D5
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 434
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)),	/*
PE_EINT9 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D6
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 439
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)),	/*
PE_EINT10 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D7
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 444
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 11)),	/*
PE_EINT11 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D8
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 449
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 12)),	/*
PE_EINT12 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D9
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 454
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 13)),	/*
PE_EINT13 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D10
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 459
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 14)),	/*
PE_EINT14 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D11
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 464
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 15)),	/*
PE_EINT15 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D12
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 469
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 16)),	/*
PE_EINT16 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D13
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 474
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 17)),	/*
PE_EINT17 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D14
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 479
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 18)),	/*
PE_EINT18 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D15
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 484
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 19)),	/*
PE_EINT19 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  SCK
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 489
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION(0x5, "i2c2"),		/*  SCK
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 490
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 20)),	/*
PE_EINT20 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  SDA
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 495
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION(0x5, "i2c2"),		/*  SDA
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 496
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 21)),	/*
PE_EINT21 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = {
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +4 -0
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*
FSIN0 */
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 501
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION(0x4, "tcon0"),		/*  TRIG0
*/
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c static const struct sunxi_desc_pin h616_pins[] = { · line 502
Quoted 1 line
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 22)),	/*
PE_EINT22 */
Quoted 4 lines
drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +1 -0
+	/* Hole */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
  		  SUNXI_FUNCTION(0x0, "gpio_in"),
  		  SUNXI_FUNCTION(0x1, "gpio_out"),

Mikhail Kalashnikov

author

2023-09-09 10:31 UTC #3 lore raw

In reply to Mikhail Kalashnikov

Sorry, missed this part.
Changes from v1:
* replaced gpio alt functions from"csi_mclk1" and "ncsi_fsin0" to "csi"
* fix file newline
Thanks to Andre for the review.

Quoted 424 lines · Mikhail Kalashnikov

From: iuncuim <[email protected]>

Signed-off-by Mikhail Kalashnikov <[email protected]>

---
  drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 380 +++++++++++++++++++-
  1 file changed, 366 insertions(+), 14 deletions(-)

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +366 ~~-14~~

index d6ca720ee..10d4e1ef1 100644
@@ -16,33 +16,81 @@
  #include "pinctrl-sunxi.h"
 
  static const struct sunxi_desc_pin h616_pins[] = {
-	/* Internal connection to the AC200 part */
+	/* Internally connected to the AC200 part in the H616 SoC */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD1 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD1 */
+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/* PA_EINT0 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD0 */
+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),	/* PA_EINT1 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ECRS_DV */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ECRS_DV */
+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),	/* PA_EINT2 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXERR */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXERR */
+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/* PA_EINT3 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD1 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD1 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),	/* PA_EINT4 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD0 */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* DOUT0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)),	/* PA_EINT5 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXCK */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXCK */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* MCLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)),	/* PA_EINT6 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXEN */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXEN */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* BCLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)),	/* PA_EINT7 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* EMDC */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* EMDC */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* LRCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)),	/* PA_EINT8 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* EMDIO */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* EMDIO */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* DIN0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)),	/* PA_EINT9 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
-		  SUNXI_FUNCTION(0x2, "i2c3")),		/* SCK */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "i2c3"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)),	/* PA_EINT10 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
-		  SUNXI_FUNCTION(0x2, "i2c3")),		/* SDA */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "i2c3"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)),	/* PA_EINT11 */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
-		  SUNXI_FUNCTION(0x2, "pwm5")),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "pwm5"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)),	/* PA_EINT12 */
  	/* Hole */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
  		  SUNXI_FUNCTION(0x0, "gpio_in"),

@@ -149,6 +197,310 @@ static const struct sunxi_desc_pin h616_pins[] = {
  		  SUNXI_FUNCTION(0x4, "spi0"),		/* HOLD */
  		  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 16)),	/* PC_EINT16 */
  	/* Hole */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D0 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP0 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)),	/* PD_EINT0 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D1 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN0 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* ERR */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)),	/* PD_EINT1 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D2 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP1 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* SYNC */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)),	/* PD_EINT2 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D3 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN1 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* DVLD */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)),	/* PD_EINT3 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D4 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP2 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D0 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)),	/* PD_EINT4 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D5 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN2 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D1 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)),	/* PD_EINT5 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D6 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VPC */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D2 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)),	/* PD_EINT6 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D7 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VNC */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D3 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)),	/* PD_EINT7 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D8 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VP3 */
+		  SUNXI_FUNCTION(0x4, "ts0"),		/* D4 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),	/* PD_EINT8 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D9 */
+		  SUNXI_FUNCTION(0x3, "lvds0"),		/* VN3 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D5 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),	/* PD_EINT9 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D10 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP0 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D6 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)),	/* PD_EINT10 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D11 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN0 */
+		  SUNXI_FUNCTION(0x4, "ts0"), 		/* D7 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)),	/* PD_EINT11 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D12 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP1 */
+		  SUNXI_FUNCTION(0x4, "sim"), 		/* VPPEN */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)),	/* PD_EINT12 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D13 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN1 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* VPPPP */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)),	/* PD_EINT13 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D14 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP2 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* PWREN */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)),	/* PD_EINT14 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D15 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN2 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)),	/* PD_EINT15 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D16 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VPC */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* DATA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)),	/* PD_EINT16 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D17 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VNC */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* RST */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)),	/* PD_EINT17 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D18 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VP3 */
+		  SUNXI_FUNCTION(0x4, "sim"),		/* DET */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)),	/* PD_EINT18 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D19 */
+		  SUNXI_FUNCTION(0x3, "lvds1"),		/* VN3 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)),	/* PD_EINT19 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D20 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 20)),	/* PD_EINT20 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D21 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 21)),	/* PD_EINT21 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D22 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 22)),	/* PD_EINT22 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* D23 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 23)),	/* PD_EINT23 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* CLK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 24)),	/* PD_EINT24 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* DE */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 25)),	/* PD_EINT25 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* HSYNC */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 26)),	/* PD_EINT26 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "lcd0"),		/* VSYNC */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 27)),	/* PD_EINT27 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 28),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "pwm0"),
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 28)),	/* PD_EINT28 */
+	/* Hole */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  PCLK  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)),	/* PE_EINT0 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  MCLK  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)),	/* PE_EINT1 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  HSYNC  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)),	/* PE_EINT2 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  VSYNC  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)),	/* PE_EINT3 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D0  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)),	/* PE_EINT4 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D1  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)),	/* PE_EINT5 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D2  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)),	/* PE_EINT6 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D3  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)),	/* PE_EINT7 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D4  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)),	/* PE_EINT8 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D5  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)),	/* PE_EINT9 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D6  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)),	/* PE_EINT10 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D7  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 11)),	/* PE_EINT11 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D8  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 12)),	/* PE_EINT12 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D9  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 13)),	/* PE_EINT13 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D10  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 14)),	/* PE_EINT14 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D11  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 15)),	/* PE_EINT15 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D12  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 16)),	/* PE_EINT16 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D13  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 17)),	/* PE_EINT17 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D14  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 18)),	/* PE_EINT18 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  D15  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 19)),	/* PE_EINT19 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  SCK  */
+		  SUNXI_FUNCTION(0x5, "i2c2"),		/*  SCK  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 20)),	/* PE_EINT20 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  SDA */
+		  SUNXI_FUNCTION(0x5, "i2c2"),		/*  SDA  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 21)),	/* PE_EINT21 */
+	SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22),
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "csi"),		/*  FSIN0 */
+		  SUNXI_FUNCTION(0x4, "tcon0"),		/*  TRIG0  */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 22)),	/* PE_EINT22 */
+	/* Hole */
  	SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
  		  SUNXI_FUNCTION(0x0, "gpio_in"),
  		  SUNXI_FUNCTION(0x1, "gpio_out"),

Samuel Holland

maintainer

2023-09-09 14:13 UTC #4 lore raw

In reply to Mikhail Kalashnikov

Quoted 5 lines · Mikhail Kalashnikov

From: iuncuim <[email protected]>
Some SoCs from the H616 family (such as the T507) have the same die but more output pins that are used for additional peripherals. The T507 SoC don't have a built-in multiphy like the AC200 or AC300 connected ti the

typo: to

Quoted 48 lines

bank A. With the T507 these pins can be freely used for any other application. This patch adds the missing muxes on banks A, D and E.

Signed-off-by Mikhail Kalashnikov <[email protected]>

---
 drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c | 380 +++++++++++++++++++-
 1 file changed, 366 insertions(+), 14 deletions(-)

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +21 -6

index d6ca720ee..10d4e1ef1 100644
@@ -16,33 +16,81 @@
 #include "pinctrl-sunxi.h"
 
 static const struct sunxi_desc_pin h616_pins[] = {
-	/* Internal connection to the AC200 part */
+	/* Internally connected to the AC200 part in the H616 SoC */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD1 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD1 */
+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),	/* PA_EINT0 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXD0 */
+		  SUNXI_FUNCTION(0x4, "i2c0"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),	/* PA_EINT1 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ECRS_DV */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ECRS_DV */
+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SCK */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),	/* PA_EINT2 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ERXERR */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ERXERR */
+		  SUNXI_FUNCTION(0x4, "i2c1"),		/* SDA */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/* PA_EINT3 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD1 */

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c line 53

Quoted 10 lines

drivers/pinctrl/sunxi/pinctrl-sun50i-h616.c +8 -1

+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD1 */
+		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)),	/* PA_EINT4 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
-		  SUNXI_FUNCTION(0x2, "emac1")),	/* ETXD0 */
+		  SUNXI_FUNCTION(0x0, "gpio_in"),
+		  SUNXI_FUNCTION(0x1, "gpio_out"),
+		  SUNXI_FUNCTION(0x2, "emac1"),		/* ETXD0 */
+		  SUNXI_FUNCTION(0x3, "h_i2s0"),	/* DOUT0 */

For H616 we chose[1] to remove the "h_" prefix from the I2S function names, even though the interfaces are part of the audio hub and not discrete devices. Please remove it here as well for consistency.

Regards,
Samuel

[1]:
https://lore.kernel.org/linux-arm-kernel/20201214094430.m6h3pzhkm3kjl2cl@gilmour/