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FAILED: patch "[PATCH] drm/amd: Fix detection of _PR3 on the PCIe root port" failed to apply to 6.5-stable tree

PATCH [email protected] 1 participant 1 message Nov 24, 2023

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The patch below does not apply to the 6.5-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.5.y
git checkout FETCH_HEAD
git cherry-pick -x c4c8955b8acb4d88d2ca02a7dc6010e5f0c5288d
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2023112404-trouble-crabbing-8ecb@gregkh' --subject-prefix 'PATCH 6.5.y' HEAD^..

Possible dependencies:

c4c8955b8acb ("drm/amd: Fix detection of _PR3 on the PCIe root port")

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From c4c8955b8acb4d88d2ca02a7dc6010e5f0c5288d Mon Sep 17 00:00:00 2001
From: Mario Limonciello <[email protected]>
Date: Tue, 26 Sep 2023 17:59:53 -0500
Subject: [PATCH] drm/amd: Fix detection of _PR3 on the PCIe root port

On some systems with Navi3x dGPU will attempt to use BACO for runtime PM but fails to resume properly. This is because on these systems the root port goes into D3cold which is incompatible with BACO.

This happens because in this case dGPU is connected to a bridge between root port which causes BOCO detection logic to fail. Fix the intent of the logic by looking at root port, not the immediate upstream bridge for _PR3.

Fixes b10c1c5b3a4e ("drm/amdgpu: add check for ACPI power resources")
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +1 -1
index e4627d92e1d0..bad2b5577e96 100644
@@ -2238,7 +2238,7 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
 		adev->flags |= AMD_IS_PX;
 
 	if (!(adev->flags & AMD_IS_APU)) {
-		parent = pci_upstream_bridge(adev->pdev);
+		parent = pcie_find_root_port(adev->pdev);
 		adev->has_pr3 = parent ? pci_pr3_present(parent) : false;
 	}