arm64: dts: ti: am65x: Add PCIe + USB DT overlay files
Subsystems (2)
cover arm64: dts: ti: am65x: Add PCIe + USB DT overlay files
Hi,
There are 2 types of (PCIe + USB) expansion cards that are provided with the AM654 board configurations.
1) 2 lane PCIe + USB 2.0 card is supplied with the AM65 IDK configuration [1]
2) 1 lane PCIe + USB 3.0 card is supplied with the AM65 GP EVM configuration [2]
Add DT overlay files for both cards.
[1] - https://www.ti.com/lit/ug/spruim6a/spruim6a.pdf
[2] - https://www.ti.com/lit/ug/spruim7/spruim7.pdf
cheers,
-roger
Kishon Vijay Abraham I (1):
arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality
card
Roger Quadros (2):
arm64: dts: ti: am65x: Fix dtbs_install for Rocktech OLDI overlay
arm64: dts: ti: Add DT overlay for PCIe + USB2.0 SERDES personality
card
arch/arm64/boot/dts/ti/Makefile | 9 ++- .../arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso | 65 ++++++++++++++++++ .../arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso | 67 +++++++++++++++++++ 3 files changed, 139 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso
base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
Signature · 1 line
2.34.1
PATCH 1/3 arm64: dts: ti: am65x: Fix dtbs_install for Rocktech OLDI overlay
Add the overlay dtbo file to a Makefile target so it can be picked by the dtbs_install command.
--- arch/arm64/boot/dts/ti/Makefile | 1 + 1 file changed, 1 insertion(+)
arch/arm64/boot/dts/ti/Makefile +1 -0
@@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-gp-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-idk.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board-rocktech-rk101-panel.dtbo # Boards with J7200 SoC k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo
Signature · 1 line
2.34.1
PATCH 2/3 arm64: dts: ti: Add DT overlay for PCIe + USB2.0 SERDES personality card
In reply to Roger QuadrosFrom: Roger Quadros <[email protected]>
Enable both Serdes and PCIe dt nodes in order to get PCIe working in the SERDES PCIe x2 personality card.
The daughter card also has a USB 2.0 dual-role port. As the base board already supports a 2.0 dual-role port, enable the port on the SERDES card to be a host only port.
This will prevent user confusion as having 2 ports in device mode often leads to confusion as to which port is bound to the gadget function driver.
The PCIe x2 card is provided with the AM65x IDK configuration [1] so apply the overlay to k3-am654-idk.dtb
[1] https://www.ti.com/lit/ug/spruim6a/spruim6a.pdf
--- arch/arm64/boot/dts/ti/Makefile | 3 +- .../arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso | 65 +++++++++++++++++++ 2 files changed, 67 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso
arch/arm64/boot/dts/ti/Makefile +2 -1
@@ -47,7 +47,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo # Boards with AM65x SoC k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo k3-am654-evm-dtbs := k3-am654-base-board.dtb k3-am654-icssg2.dtbo -k3-am654-idk-dtbs := k3-am654-evm.dtb k3-am654-idk.dtbo +k3-am654-idk-dtbs := k3-am654-evm.dtb k3-am654-idk.dtbo k3-am654-pcie-usb2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb
@@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-gp-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-idk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board-rocktech-rk101-panel.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb2.dtbo # Boards with J7200 SoC k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo
arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso new file +65 -0
65 lines not on this page · raw message
Signature · 1 line
2.34.1
PATCH 3/3 arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality card
In reply to Roger QuadrosFrom: Kishon Vijay Abraham I <[email protected]>
Add overlay for PCIe (uses the second instance of PCIe in AM654x) and USB3.0 SERDES personality card
The PCI3/USB3 card is provided with the AM65x GP EVM configurtion [1] so apply the overlay to k3-am654-gp-evm.dtb
[1] https://www.ti.com/lit/ug/spruim7/spruim7.pdf
--- arch/arm64/boot/dts/ti/Makefile | 5 +- .../arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso | 67 +++++++++++++++++++ 2 files changed, 71 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso
arch/arm64/boot/dts/ti/Makefile +4 -1
@@ -45,7 +45,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo # Boards with AM65x SoC -k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo +k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb \ + k3-am654-base-board-rocktech-rk101-panel.dtbo \ + k3-am654-pcie-usb3.dtbo k3-am654-evm-dtbs := k3-am654-base-board.dtb k3-am654-icssg2.dtbo k3-am654-idk-dtbs := k3-am654-evm.dtb k3-am654-idk.dtbo k3-am654-pcie-usb2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb
@@ -59,6 +61,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-idk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board-rocktech-rk101-panel.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb2.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb3.dtbo # Boards with J7200 SoC k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +67 -0
67 lines not on this page · raw message
Signature · 1 line
2.34.1
Vignesh Raghavendra
maintainerRe: [PATCH 3/3] arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality card
Quoted 2 lines · Roger Quadros
From: Kishon Vijay Abraham I <[email protected]>
[...]
Quoted 33 lines
# Boards with J7200 SoC
k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtboarch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +25
-0@@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM + * + * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/dts-v1/; +/plugin/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/phy/phy.h> +#include <dt-bindings/phy/phy-am654-serdes.h> + +#include "k3-pinctrl.h" + +&serdes1 { + status = "okay"; +}; + +&pcie1_rc { + num-lanes = <1>; + phys = <&serdes1 PHY_TYPE_PCIE 0>; + phy-names = "pcie-phy0"; + reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>; + status = "okay";
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso line 35
Quoted 10 lines
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +10
-0+}; + +&pcie1_ep { + num-lanes = <1>; + phys = <&serdes1 PHY_TYPE_PCIE 0>; + phy-names = "pcie-phy0"; +}; + +&main_pmx0 { + usb0_pins_default: usb0_pins_default {
No underscores in node-name and also should end with -pins
Quoted 22 lines
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +22
-0+ pinctrl-single,pins = < + AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ + >; + }; +}; + +&serdes0 { + status = "okay"; + assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; + assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>; +}; + +&dwc3_0 { + status = "okay"; + assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ + <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */ + phys = <&serdes0 PHY_TYPE_USB3 0>; + phy-names = "usb3-phy"; +}; + +&usb0 { + pinctrl-names = "default";
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso line 67
Quoted 10 lines
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +10
-0+ pinctrl-0 = <&usb0_pins_default>; + dr_mode = "host"; + maximum-speed = "super-speed"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; +}; + +&usb0_phy { + status = "okay"; +};
BTW, this breaks build on 6.8-rc1
DTOVL arch/arm64/boot/dts/ti/k3-am654-gp-evm.dtb
Failed to apply 'arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtbo': FDT_ERR_NOTFOUND
Signature · 2 lines
Regards Vignesh
Re: [PATCH 3/3] arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality card
Quoted 91 lines · Vignesh Raghavendra
Quoted 2 lines · Roger Quadros
From: Kishon Vijay Abraham I <[email protected]>
[...]
Quoted 33 lines
# Boards with J7200 SoC
k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtboarch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +25
-0@@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM + * + * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/dts-v1/; +/plugin/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/phy/phy.h> +#include <dt-bindings/phy/phy-am654-serdes.h> + +#include "k3-pinctrl.h" + +&serdes1 { + status = "okay"; +}; + +&pcie1_rc { + num-lanes = <1>; + phys = <&serdes1 PHY_TYPE_PCIE 0>; + phy-names = "pcie-phy0"; + reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>; + status = "okay";arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso line 35
Quoted 10 lines
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +10
-0+}; + +&pcie1_ep { + num-lanes = <1>; + phys = <&serdes1 PHY_TYPE_PCIE 0>; + phy-names = "pcie-phy0"; +}; + +&main_pmx0 { + usb0_pins_default: usb0_pins_default {No underscores in node-name and also should end with -pins
Quoted 22 lines
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +22
-0+ pinctrl-single,pins = < + AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ + >; + }; +}; + +&serdes0 { + status = "okay"; + assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; + assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>; +}; + +&dwc3_0 { + status = "okay"; + assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ + <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */ + phys = <&serdes0 PHY_TYPE_USB3 0>; + phy-names = "usb3-phy"; +}; + +&usb0 { + pinctrl-names = "default";arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso line 67
Quoted 10 lines
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +10
-0+ pinctrl-0 = <&usb0_pins_default>; + dr_mode = "host"; + maximum-speed = "super-speed"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; +}; + +&usb0_phy { + status = "okay"; +};BTW, this breaks build on 6.8-rc1
Quoted 5 lines
DTOVL
arch/arm64/boot/dts/ti/k3-am654-gp-evm.dtbFailed to apply '
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtbo':FDT_ERR_NOTFOUND
It builds fine for me. Did the 3rd patch apply cleanly for you?
Signature · 2 lines
cheers, -roger
Vignesh Raghavendra
maintainerRe: [PATCH 3/3] arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality card
Quoted 94 lines · Roger Quadros
Quoted 91 lines · Vignesh Raghavendra
Quoted 2 lines · Roger Quadros
From: Kishon Vijay Abraham I <[email protected]>
[...]
Quoted 33 lines
# Boards with J7200 SoC
k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtboarch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +25
-0@@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM + * + * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/dts-v1/; +/plugin/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/phy/phy.h> +#include <dt-bindings/phy/phy-am654-serdes.h> + +#include "k3-pinctrl.h" + +&serdes1 { + status = "okay"; +}; + +&pcie1_rc { + num-lanes = <1>; + phys = <&serdes1 PHY_TYPE_PCIE 0>; + phy-names = "pcie-phy0"; + reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>; + status = "okay";arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso line 35
Quoted 10 lines
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +10
-0+}; + +&pcie1_ep { + num-lanes = <1>; + phys = <&serdes1 PHY_TYPE_PCIE 0>; + phy-names = "pcie-phy0"; +}; + +&main_pmx0 { + usb0_pins_default: usb0_pins_default {No underscores in node-name and also should end with -pins
Quoted 22 lines
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +22
-0+ pinctrl-single,pins = < + AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ + >; + }; +}; + +&serdes0 { + status = "okay"; + assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; + assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>; +}; + +&dwc3_0 { + status = "okay"; + assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ + <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */ + phys = <&serdes0 PHY_TYPE_USB3 0>; + phy-names = "usb3-phy"; +}; + +&usb0 { + pinctrl-names = "default";arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso line 67
Quoted 10 lines
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso new file +10
-0+ pinctrl-0 = <&usb0_pins_default>; + dr_mode = "host"; + maximum-speed = "super-speed"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; +}; + +&usb0_phy { + status = "okay"; +};BTW, this breaks build on 6.8-rc1
Quoted 8 lines
Quoted 5 lines
DTOVL
arch/arm64/boot/dts/ti/k3-am654-gp-evm.dtbFailed to apply '
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtbo':FDT_ERR_NOTFOUNDIt builds fine for me. Did the 3rd patch apply cleanly for you?
Yes, build failure is due to the fact that I picked up Andrew's patch to remove pcie_ep node. Could you please respin this on top of ti-next / linux-next?
--
Regards
Vignesh