dmaengine: fsl-qdma: init irq after reg initialization
Subsystems (2)
Frank Li
maintainerPATCH 1/1 dmaengine: fsl-qdma: init irq after reg initialization
From: Curtis Klein <[email protected]>
Initialize the qDMA irqs after the registers are configured so that interrupts that may have been pending from a primary kernel don't get processed by the irq handler before it is ready to and cause panic with the following trace:
Call trace: fsl_qdma_queue_handler+0xf8/0x3e8 __handle_irq_event_percpu+0x78/0x2b0 handle_irq_event_percpu+0x1c/0x68 handle_irq_event+0x44/0x78 handle_fasteoi_irq+0xc8/0x178 generic_handle_irq+0x24/0x38 __handle_domain_irq+0x90/0x100 gic_handle_irq+0x5c/0xb8 el1_irq+0xb8/0x180 _raw_spin_unlock_irqrestore+0x14/0x40 __setup_irq+0x4bc/0x798 request_threaded_irq+0xd8/0x190 devm_request_threaded_irq+0x74/0xe8 fsl_qdma_probe+0x4d4/0xca8 platform_drv_probe+0x50/0xa0 really_probe+0xe0/0x3f8 driver_probe_device+0x64/0x130 device_driver_attach+0x6c/0x78 __driver_attach+0xbc/0x158 bus_for_each_dev+0x5c/0x98 driver_attach+0x20/0x28 bus_add_driver+0x158/0x220 driver_register+0x60/0x110 __platform_driver_register+0x44/0x50 fsl_qdma_driver_init+0x18/0x20 do_one_initcall+0x48/0x258 kernel_init_freeable+0x1a4/0x23c kernel_init+0x10/0xf8 ret_from_fork+0x10/0x18
Fixes b092529e0aa0 ("dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs")
Signed-off-by Curtis Klein <[email protected]>
Signed-off-by Yi Zhao <[email protected]>
Signed-off-by Frank Li <[email protected]>
--- drivers/dma/fsl-qdma.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-)
drivers/dma/fsl-qdma.c +8 -9
@@ -1199,10 +1199,6 @@ static int fsl_qdma_probe(struct platform_device *pdev)if (!fsl_qdma->queue)return -ENOMEM ; - ret =fsl_qdma_irq_init (pdev, fsl_qdma); -if (ret) -return ret; - fsl_qdma->irq_base =platform_get_irq_byname (pdev,"qdma-queue0" );if (fsl_qdma->irq_base <0 )return fsl_qdma->irq_base;
@@ -1241,16 +1237,19 @@ static int fsl_qdma_probe(struct platform_device *pdev)platform_set_drvdata (pdev, fsl_qdma); - ret =dma_async_device_register (&fsl_qdma->dma_dev); + ret =fsl_qdma_reg_init (fsl_qdma);if (ret) { -dev_err (&pdev->dev, -"Can't register NXP Layerscape qDMA engine.\n" ); +dev_err (&pdev->dev,"Can't Initialize the qDMA engine.\n" );return ret; } - ret =fsl_qdma_reg_init (fsl_qdma); + ret =fsl_qdma_irq_init (pdev, fsl_qdma); +if (ret) +return ret; + + ret =dma_async_device_register (&fsl_qdma->dma_dev);if (ret) { -dev_err (&pdev->dev,"Can't Initialize the qDMA engine.\n" ); +dev_err (&pdev->dev,"Can't register NXP Layerscape qDMA engine.\n" );return ret; }
Signature · 1 line
2.34.1
Quoted 36 lines · Frank Li
Initialize the qDMA irqs after the registers are configured so that interrupts that may have been pending from a primary kernel don't get processed by the irq handler before it is ready to and cause panic with the following trace:
Call trace: fsl_qdma_queue_handler+0xf8/0x3e8 __handle_irq_event_percpu+0x78/0x2b0 handle_irq_event_percpu+0x1c/0x68 handle_irq_event+0x44/0x78 handle_fasteoi_irq+0xc8/0x178 generic_handle_irq+0x24/0x38 __handle_domain_irq+0x90/0x100 gic_handle_irq+0x5c/0xb8 el1_irq+0xb8/0x180 _raw_spin_unlock_irqrestore+0x14/0x40 __setup_irq+0x4bc/0x798 request_threaded_irq+0xd8/0x190 devm_request_threaded_irq+0x74/0xe8 fsl_qdma_probe+0x4d4/0xca8 platform_drv_probe+0x50/0xa0 really_probe+0xe0/0x3f8 driver_probe_device+0x64/0x130 device_driver_attach+0x6c/0x78 __driver_attach+0xbc/0x158 bus_for_each_dev+0x5c/0x98 driver_attach+0x20/0x28 bus_add_driver+0x158/0x220 driver_register+0x60/0x110 __platform_driver_register+0x44/0x50 fsl_qdma_driver_init+0x18/0x20 do_one_initcall+0x48/0x258 kernel_init_freeable+0x1a4/0x23c kernel_init+0x10/0xf8 ret_from_fork+0x10/0x18
Quoted 1 line
[...]
Applied, thanks!
[1/1] dmaengine: fsl-qdma: init irq after reg initialization
commit: 87a39071e0b639f45e05d296cc0538eef44ec0bd
Best regards,
Signature · 1 line
~Vinod