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riscv: dts: sophgo: add sdcard support for milkv duo

RFC PATCH Applied Jisheng Zhang 3 participants 4 messages Feb 17, 2024 – Mar 27, 2024

Subsystems (4)
Device tree bindings RISC-V MMC, SD and SDIO Sophgo devicetrees and drivers
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Jisheng Zhang

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#0 lore raw

RFC PATCH 1/1 riscv: dts: sophgo: add sdcard support for milkv duo

Add sdhci dt node in SoC dtsi and enable it in milkv duo dts.

Signed-off-by Jisheng Zhang <[email protected]>

---
Since cv1800b's clk support isn't in, this patch uses fixed dummy clk and just RFC, I will send formal patch after clk support is ready.

 .../riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts |  8 ++++++++
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi          | 17 +++++++++++++++++
 2 files changed, 25 insertions(+)
arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts +8 -0
index 3af9e34b3bc7..94e64ddce8fa 100644
@@ -33,6 +33,14 @@ &osc {
 	clock-frequency = <25000000>;
 };
 
+&sdhci0 {
+	status = "okay";
+	bus-width = <4>;
+	no-1-8-v;
+	no-mmc;
+	no-sdio;
+};
+
 &uart0 {
 	status = "okay";
 };
arch/riscv/boot/dts/sophgo/cv18xx.dtsi +17 -0
index 2d6f4a4b1e58..405f4ba18392 100644
@@ -4,6 +4,7 @@
  * Copyright (C) 2023 Inochi Amaoto <[email protected]>
  */
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {

@@ -45,6 +46,13 @@ osc: oscillator {
 		#clock-cells = <0>;
 	};
 
+	sdhci_clk: sdhci-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <375000000>;
+		clock-output-names = "sdhci_clk";
+		#clock-cells = <0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;

@@ -175,6 +183,15 @@ uart4: serial@41c0000 {
 			status = "disabled";
 		};
 
+		sdhci0: mmc@4310000 {
+			compatible = "sophgo,cv1800b-dwcmshc";
+			reg = <0x4310000 0x1000>;
+			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
 		plic: interrupt-controller@70000000 {
 			reg = <0x70000000 0x4000000>;
 			interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
Signature · 1 line
2.43.0
#1 lore raw

Adding Inochia.

hi, Jisheng,

For changes under arch/riscv/boot/dts/sophgo/, please looping Inochia and me.

FYI: https://lore.kernel.org/linux-riscv/IA1PR20MB4953B158F6F575840F3D4267BB7D2@IA1PR20MB4953.namprd20.prod.outlook.com/

Thanks,

Chen

Quoted 72 lines · Jisheng Zhang

Add sdhci dt node in SoC dtsi and enable it in milkv duo dts.

Signed-off-by Jisheng Zhang <[email protected]>

---
Since cv1800b's clk support isn't in, this patch uses fixed dummy clk and just RFC, I will send formal patch after clk support is ready.

  .../riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts |  8 ++++++++
  arch/riscv/boot/dts/sophgo/cv18xx.dtsi          | 17 +++++++++++++++++
  2 files changed, 25 insertions(+)
arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts +8 -0
index 3af9e34b3bc7..94e64ddce8fa 100644
@@ -33,6 +33,14 @@ &osc {
  	clock-frequency = <25000000>;
  };
 
+&sdhci0 {
+	status = "okay";
+	bus-width = <4>;
+	no-1-8-v;
+	no-mmc;
+	no-sdio;
+};
+
  &uart0 {
  	status = "okay";
  };
arch/riscv/boot/dts/sophgo/cv18xx.dtsi +17 -0
index 2d6f4a4b1e58..405f4ba18392 100644
@@ -4,6 +4,7 @@
   * Copyright (C) 2023 Inochi Amaoto <[email protected]>
   */
 
+#include <dt-bindings/gpio/gpio.h>
  #include <dt-bindings/interrupt-controller/irq.h>
 
  / {

@@ -45,6 +46,13 @@ osc: oscillator {
  		#clock-cells = <0>;
  	};
 
+	sdhci_clk: sdhci-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <375000000>;
+		clock-output-names = "sdhci_clk";
+		#clock-cells = <0>;
+	};
+
  	soc {
  		compatible = "simple-bus";
  		interrupt-parent = <&plic>;

@@ -175,6 +183,15 @@ uart4: serial@41c0000 {
  			status = "disabled";
  		};
 
+		sdhci0: mmc@4310000 {
+			compatible = "sophgo,cv1800b-dwcmshc";
+			reg = <0x4310000 0x1000>;
+			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
  		plic: interrupt-controller@70000000 {
  			reg = <0x70000000 0x4000000>;
  			interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
Reviewed-by on v1 1/1
#2 lore raw
In reply to Jisheng Zhang
Quoted 3 lines · Jisheng Zhang

Add sdhci dt node in SoC dtsi and enable it in milkv duo dts.

Signed-off-by Jisheng Zhang <[email protected]>

LGTM.

Reviewed-by Inochi Amaoto <[email protected]>
Quoted 72 lines

---
Since cv1800b's clk support isn't in, this patch uses fixed dummy clk and just RFC, I will send formal patch after clk support is ready.

 .../riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts |  8 ++++++++
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi          | 17 +++++++++++++++++
 2 files changed, 25 insertions(+)
arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts +8 -0
index 3af9e34b3bc7..94e64ddce8fa 100644
@@ -33,6 +33,14 @@ &osc {
 	clock-frequency = <25000000>;
 };
 
+&sdhci0 {
+	status = "okay";
+	bus-width = <4>;
+	no-1-8-v;
+	no-mmc;
+	no-sdio;
+};
+
 &uart0 {
 	status = "okay";
 };
arch/riscv/boot/dts/sophgo/cv18xx.dtsi +17 -0
index 2d6f4a4b1e58..405f4ba18392 100644
@@ -4,6 +4,7 @@
  * Copyright (C) 2023 Inochi Amaoto <[email protected]>
  */
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {

@@ -45,6 +46,13 @@ osc: oscillator {
 		#clock-cells = <0>;
 	};
 
+	sdhci_clk: sdhci-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <375000000>;
+		clock-output-names = "sdhci_clk";
+		#clock-cells = <0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;

@@ -175,6 +183,15 @@ uart4: serial@41c0000 {
 			status = "disabled";
 		};
 
+		sdhci0: mmc@4310000 {
+			compatible = "sophgo,cv1800b-dwcmshc";
+			reg = <0x4310000 0x1000>;
+			interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
 		plic: interrupt-controller@70000000 {
 			reg = <0x70000000 0x4000000>;
 			interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
Signature · 1 line
2.43.0