ASoC: rt5645: Make LattePanda board DMI match more precise
Subsystems (3)
Sasha Levin
maintainerPATCH 1/3 ASoC: rt5645: Make LattePanda board DMI match more precise
From: Hans de Goede <[email protected]>
[ Upstream commit 551539a8606e28cb2a130f8ef3e9834235b456c4 ]
The DMI strings used for the LattePanda board DMI quirks are very generic.
Using the dmidecode database from https://linux-hardware.org/ shows that the chosen DMI strings also match the following 2 laptops which also have a rt5645 codec:
Insignia NS-P11W7100 https://linux-hardware.org/?computer=E092FFF8BA04
Insignia NS-P10W8100 https://linux-hardware.org/?computer=AFB6C0BF7934
All 4 hw revisions of the LattePanda board have "S70CR" in their BIOS version DMI strings:
DF-BI-7-S70CR100-*
DF-BI-7-S70CR110-*
DF-BI-7-S70CR200-*
LP-BS-7-S70CR700-*
See e.g. https://linux-hardware.org/?computer=D98250A817C0
Add a partial (non exact) DMI match on this string to make the LattePanda board DMI match more precise to avoid false-positive matches.
--- sound/soc/codecs/rt5645.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
sound/soc/codecs/rt5645.c +10 -0
@@ -3796,6 +3796,16 @@ static const struct dmi_system_id dmi_platform_data[] = { DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), DMI_EXACT_MATCH(DMI_BOARD_NAME, "Cherry Trail CR"), DMI_EXACT_MATCH(DMI_BOARD_VERSION, "Default string"), +/* +* Above strings are too generic, LattePanda BIOS versions for +* all 4 hw revisions are: +* DF-BI-7-S70CR100-* +* DF-BI-7-S70CR110-* +* DF-BI-7-S70CR200-* +* LP-BS-7-S70CR700-* +* Do a partial match for S70CR to avoid false positive matches. +*/ + DMI_MATCH(DMI_BIOS_VERSION, "S70CR"), }, .driver_data = (void *)&lattepanda_board_platform_data, },
Signature · 1 line
2.43.0
Sasha Levin
maintainerPATCH 2/3 x86/xen: Add some null pointer checking to smp.c
From: Kunwu Chan <[email protected]>
[ Upstream commit 3693bb4465e6e32a204a5b86d3ec7e6b9f7e67c2 ]
kasprintf() returns a pointer to dynamically allocated memory which can be NULL upon failure. Ensure the allocation was successful by checking the pointer validity.
--- arch/x86/xen/smp.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
arch/x86/xen/smp.c +12 -0
@@ -65,6 +65,8 @@ int xen_smp_intr_init(unsigned int cpu)char *resched_name, *callfunc_name, *debug_name; resched_name =kasprintf (GFP_KERNEL ,"resched%d" , cpu); +if (!resched_name) + goto fail_mem;per_cpu (xen_resched_irq, cpu).name = resched_name; rc = bind_ipi_to_irqhandler(XEN_RESCHEDULE_VECTOR, cpu,
@@ -77,6 +79,8 @@ int xen_smp_intr_init(unsigned int cpu)per_cpu (xen_resched_irq, cpu).irq = rc; callfunc_name =kasprintf (GFP_KERNEL ,"callfunc%d" , cpu); +if (!callfunc_name) + goto fail_mem;per_cpu (xen_callfunc_irq, cpu).name = callfunc_name; rc = bind_ipi_to_irqhandler(XEN_CALL_FUNCTION_VECTOR, cpu,
@@ -90,6 +94,9 @@ int xen_smp_intr_init(unsigned int cpu)if (!xen_fifo_events) { debug_name =kasprintf (GFP_KERNEL ,"debug%d" , cpu); +if (!debug_name) + goto fail_mem; +per_cpu (xen_debug_irq, cpu).name = debug_name; rc = bind_virq_to_irqhandler(VIRQ_DEBUG, cpu, xen_debug_interrupt,
@@ -101,6 +108,9 @@ int xen_smp_intr_init(unsigned int cpu) } callfunc_name =kasprintf (GFP_KERNEL ,"callfuncsingle%d" , cpu); +if (!callfunc_name) + goto fail_mem; +per_cpu (xen_callfuncsingle_irq, cpu).name = callfunc_name; rc = bind_ipi_to_irqhandler(XEN_CALL_FUNCTION_SINGLE_VECTOR, cpu,
@@ -114,6 +124,8 @@ int xen_smp_intr_init(unsigned int cpu)return 0 ; + fail_mem: + rc = -ENOMEM ; fail:xen_smp_intr_free (cpu);return rc;
Signature · 1 line
2.43.0
Sasha Levin
maintainerPATCH 3/3 MIPS: Clear Cause.BD in instruction_pointer_set
In reply to Sasha LevinFrom: Jiaxun Yang <[email protected]>
[ Upstream commit 9d6e21ddf20293b3880ae55b9d14de91c5891c59 ]
Clear Cause.BD after we use instruction_pointer_set to override EPC.
This can prevent exception_epc check against instruction code at new return address.
It won't be considered as "in delay slot" after epc being overridden anyway.
--- arch/mips/include/asm/ptrace.h | 1 + 1 file changed, 1 insertion(+)
arch/mips/include/asm/ptrace.h +1 -0
@@ -65,6 +65,7 @@ static inline void instruction_pointer_set(struct pt_regs *regs, unsigned long val) { regs->cp0_epc = val; + regs->cp0_cause &= ~CAUSEF_BD ; }/* Query offset/name of register from its name/offset */
Signature · 1 line
2.43.0