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crypto: x86/aes-xts - make non-AVX implementation use new glue code

PATCH In review Eric Biggers 2 participants 2 messages Apr 7, 2024 – Apr 12, 2024

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PATCH 1/1 crypto: x86/aes-xts - make non-AVX implementation use new glue code

From: Eric Biggers <[email protected]>

Make the non-AVX implementation of AES-XTS (xts-aes-aesni) use the new glue code that was introduced for the AVX implementations of AES-XTS. This reduces code size, and it improves the performance of xts-aes-aesni due to the optimization for messages that don't span page boundaries.

This required moving the new glue functions higher up in the file and allowing the IV encryption function to be specified by the caller.

---
 arch/x86/crypto/aes-xts-avx-x86_64.S |   2 +-
 arch/x86/crypto/aesni-intel_asm.S    |  16 +-
 arch/x86/crypto/aesni-intel_glue.c   | 317 +++++++++++----------------
 3 files changed, 132 insertions(+), 203 deletions(-)
arch/x86/crypto/aes-xts-avx-x86_64.S +1 -1
index b8005d0205f8..fcaf64a2f8c6 100644
@@ -749,11 +749,11 @@
 	jmp		.Ldone\@
 .endm
 
 // void aes_xts_encrypt_iv(const struct crypto_aes_ctx *tweak_key,
 //			   u8 iv[AES_BLOCK_SIZE]);
-SYM_FUNC_START(aes_xts_encrypt_iv)
+SYM_TYPED_FUNC_START(aes_xts_encrypt_iv)
 	vmovdqu		(%rsi), %xmm0
 	vpxor		0*16(%rdi), %xmm0, %xmm0
 	vaesenc		1*16(%rdi), %xmm0, %xmm0
 	vaesenc		2*16(%rdi), %xmm0, %xmm0
 	vaesenc		3*16(%rdi), %xmm0, %xmm0
arch/x86/crypto/aesni-intel_asm.S +8 -8
index 7ecb55cae3d6..1cb55eea2efa 100644
@@ -2841,14 +2841,14 @@ SYM_FUNC_END(aesni_ctr_enc)
 	psrad $31, KEY; \
 	pand GF128MUL_MASK, KEY; \
 	pxor KEY, IV;
 
 /*
- * void aesni_xts_encrypt(const struct crypto_aes_ctx *ctx, u8 *dst,
- *			  const u8 *src, unsigned int len, le128 *iv)
+ * void aesni_xts_enc(const struct crypto_aes_ctx *ctx, u8 *dst,
+ *		      const u8 *src, unsigned int len, le128 *iv)
  */
-SYM_FUNC_START(aesni_xts_encrypt)
+SYM_FUNC_START(aesni_xts_enc)
 	FRAME_BEGIN
 #ifndef __x86_64__
 	pushl IVP
 	pushl LEN
 	pushl KEYP
@@ -2993,17 +2993,17 @@ SYM_FUNC_START(aesni_xts_encrypt)
 	call _aesni_enc1
 	pxor IV, STATE
 
 	movups STATE, (OUTP)
 	jmp .Lxts_enc_ret
-SYM_FUNC_END(aesni_xts_encrypt)
+SYM_FUNC_END(aesni_xts_enc)
 
 /*
- * void aesni_xts_decrypt(const struct crypto_aes_ctx *ctx, u8 *dst,
- *			  const u8 *src, unsigned int len, le128 *iv)
+ * void aesni_xts_dec(const struct crypto_aes_ctx *ctx, u8 *dst,
+ *		      const u8 *src, unsigned int len, le128 *iv)
  */
-SYM_FUNC_START(aesni_xts_decrypt)
+SYM_FUNC_START(aesni_xts_dec)
 	FRAME_BEGIN
 #ifndef __x86_64__
 	pushl IVP
 	pushl LEN
 	pushl KEYP
@@ -3155,6 +3155,6 @@ SYM_FUNC_START(aesni_xts_decrypt)
 	call _aesni_dec1
 	pxor STATE4, STATE
 
 	movups STATE, (OUTP)
 	jmp .Lxts_dec_ret
-SYM_FUNC_END(aesni_xts_decrypt)
+SYM_FUNC_END(aesni_xts_dec)
arch/x86/crypto/aesni-intel_glue.c +123 -194

426 lines not on this page · raw message

base-commit: 4ad27a8be9dbefd4820da0f60da879d512b2f659

Signature · 1 line
2.44.0
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#1 lore raw
Quoted 10 lines · Eric Biggers

From: Eric Biggers <[email protected]>

Make the non-AVX implementation of AES-XTS (xts-aes-aesni) use the new glue code that was introduced for the AVX implementations of AES-XTS. This reduces code size, and it improves the performance of xts-aes-aesni due to the optimization for messages that don't span page boundaries.

This required moving the new glue functions higher up in the file and allowing the IV encryption function to be specified by the caller.

Quoted 6 lines

---

arch/x86/crypto/aes-xts-avx-x86_64.S |   2 +-
arch/x86/crypto/aesni-intel_asm.S    |  16 +-
arch/x86/crypto/aesni-intel_glue.c   | 317 +++++++++++----------------
3 files changed, 132 insertions(+), 203 deletions(-)

Patch applied. Thanks.

Signature · 3 lines
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt