spi: dt-bindings: armada-3700: convert to dtschema
Subsystems (2)
PATCH 1/1 spi: dt-bindings: armada-3700: convert to dtschema
Convert txt binding of marvell armada 3700 SoC spi controller to dtschema to allow for validation.
--- .../bindings/spi/marvell,armada-3700-spi.yaml | 55 +++++++++++++++++++ .../bindings/spi/spi-armada-3700.txt | 25 --------- 2 files changed, 55 insertions(+), 25 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml delete mode 100644 Documentation/devicetree/bindings/spi/spi-armada-3700.txt
Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml new file +55 -0
@@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/marvell,armada-3700-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 3700 SPI Controller + +description: + The SPI controller on Marvell Armada 3700 SoC. + +maintainers: + - Kousik Sanagavarapu <[email protected]> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: marvell,armada-3700-spi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + num-cs: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + spi0: spi@10600 { + compatible = "marvell,armada-3700-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10600 0x5d>; + clocks = <&nb_perih_clk 7>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + num-cs = <4>; + }; +...
Documentation/devicetree/bindings/spi/spi-armada-3700.txt deleted +0 -25
@@ -1,25 +0,0 @@ -* Marvell Armada 3700 SPI Controller - -Required Properties: - -- compatible: should be "marvell,armada-3700-spi" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The interrupt number. The interrupt specifier format depends on - the interrupt controller and of its driver. -- clocks: Must contain the clock source, usually from the North Bridge clocks. -- num-cs: The number of chip selects that is supported by this SPI Controller -- #address-cells: should be 1. -- #size-cells: should be 0. - -Example: - - spi0: spi@10600 { - compatible = "marvell,armada-3700-spi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10600 0x5d>; - clocks = <&nb_perih_clk 7>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; - num-cs = <4>; - };
Signature · 1 line
2.44.0.548.g91ec36f2cc
Quoted 53 lines · Kousik Sanagavarapu
Convert txt binding of marvell armada 3700 SoC spi controller to dtschema to allow for validation.
Signed-off-by Kousik Sanagavarapu <[email protected]>--- .../bindings/spi/marvell,armada-3700-spi.yaml | 55 +++++++++++++++++++ .../bindings/spi/spi-armada-3700.txt | 25 --------- 2 files changed, 55 insertions(+), 25 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml delete mode 100644 Documentation/devicetree/bindings/spi/spi-armada-3700.txtDocumentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml new file +36
-0@@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/marvell,armada-3700-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 3700 SPI Controller + +description: + The SPI controller on Marvell Armada 3700 SoC. + +maintainers: + - Kousik Sanagavarapu <[email protected]> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: marvell,armada-3700-spi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + num-cs: + maxItems: 1 + +required: + - compatible + - reg
Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml line 46
Quoted 10 lines
Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml new file +10
-0+ - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + spi0: spi@10600 {
Iff there's a resubmission, drop the lavel here since it has no users.
Cheers,
Conor.
Quoted 43 lines
Documentation/devicetree/bindings/spi/marvell,armada-3700-spi.yaml new file +9
-0+ compatible = "marvell,armada-3700-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10600 0x5d>; + clocks = <&nb_perih_clk 7>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + num-cs = <4>; + }; +...Documentation/devicetree/bindings/spi/spi-armada-3700.txt deleted +0
-25@@ -1,25 +0,0 @@ -* Marvell Armada 3700 SPI Controller - -Required Properties: - -- compatible: should be "marvell,armada-3700-spi" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The interrupt number. The interrupt specifier format depends on - the interrupt controller and of its driver. -- clocks: Must contain the clock source, usually from the North Bridge clocks. -- num-cs: The number of chip selects that is supported by this SPI Controller -- #address-cells: should be 1. -- #size-cells: should be 0. - -Example: - - spi0: spi@10600 { - compatible = "marvell,armada-3700-spi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10600 0x5d>; - clocks = <&nb_perih_clk 7>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; - num-cs = <4>; - };Signature · 1 line
2.44.0.548.g91ec36f2cc
Mark Brown
maintainerQuoted 4 lines · Kousik Sanagavarapu
Convert txt binding of marvell armada 3700 SoC spi controller to dtschema to allow for validation.
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
Thanks!
[1/1] spi: dt-bindings: armada-3700: convert to dtschema
commit: f63175733f91da6b668018c1c31786ec448adaed
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks,
Mark