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FAILED: patch "[PATCH] drm/amd/amdgpu: command submission parser for JPEG" failed to apply to 6.6-stable tree

PATCH [email protected] 1 participant 1 message Aug 19, 2024

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Stable branch DRM drivers Radeon and amdgpu DRM drivers
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The patch below does not apply to the 6.6-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

To reproduce the conflict and resubmit, you may use the following commands:

git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.6.y
git checkout FETCH_HEAD
git cherry-pick -x 470516c2925493594a690bc4d05b1f4471d9f996
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2024081921-overvalue-angles-9d06@gregkh' --subject-prefix 'PATCH 6.6.y' HEAD^..

Possible dependencies:

470516c29254 ("drm/amd/amdgpu: command submission parser for JPEG") e6c6bd6253e7 ("drm/amdgpu/jpeg4: properly set atomics vmid field") dfad65c65728 ("drm/amdgpu: Add JPEG5 support") 8f98a715da8e ("drm/amdgpu/jpeg: add jpeg support for VCN4_0_5")

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From 470516c2925493594a690bc4d05b1f4471d9f996 Mon Sep 17 00:00:00 2001
From: "David (Ming Qiang) Wu" <[email protected]>
Date: Thu, 8 Aug 2024 12:19:50 -0400
Subject: [PATCH] drm/amd/amdgpu: command submission parser for JPEG

Add JPEG IB command parser to ensure registers
in the command are within the JPEG IP block.

Reviewed-by Alex Deucher <[email protected]>
Signed-off-by David (Ming Qiang) Wu <[email protected]>
Signed-off-by Alex Deucher <[email protected]>
(cherry picked from commit a7f670d5d8e77b092404ca8a35bb0f8f89ed3117)
Cc [email protected]
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +3 -0
index 9aa952f258cf..6dfdff58bffd 100644
@@ -1057,6 +1057,9 @@ static int amdgpu_cs_patch_ibs(struct amdgpu_cs_parser *p,
 			r = amdgpu_ring_parse_cs(ring, p, job, ib);
 			if (r)
 				return r;
+
+			if (ib->sa_bo)
+				ib->gpu_addr =  amdgpu_sa_bo_gpu_addr(ib->sa_bo);
 		} else {
 			ib->ptr = (uint32_t *)kptr;
 			r = amdgpu_ring_patch_cs_in_place(ring, p, job, ib);
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c +60 -1

82 lines not on this page · raw message

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.h +6 -1
index 747a3e5f6856..71c54b294e15 100644
@@ -46,6 +46,9 @@
 
 #define JRBC_DEC_EXTERNAL_REG_WRITE_ADDR				0x18000
 
+#define JPEG_REG_RANGE_START						0x4000
+#define JPEG_REG_RANGE_END						0x41c2
+
 extern const struct amdgpu_ip_block_version jpeg_v4_0_3_ip_block;
 
 void jpeg_v4_0_3_dec_ring_emit_ib(struct amdgpu_ring *ring,

@@ -62,5 +65,7 @@ void jpeg_v4_0_3_dec_ring_insert_end(struct amdgpu_ring *ring);
 void jpeg_v4_0_3_dec_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
 void jpeg_v4_0_3_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
 					uint32_t val, uint32_t mask);
-
+int jpeg_v4_0_3_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,
+				  struct amdgpu_job *job,
+				  struct amdgpu_ib *ib);
 #endif /* __JPEG_V4_0_3_H__ */
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c +1 -0
index d694a276498a..f4daff90c770 100644
@@ -646,6 +646,7 @@ static const struct amdgpu_ring_funcs jpeg_v5_0_0_dec_ring_vm_funcs = {
 	.get_rptr = jpeg_v5_0_0_dec_ring_get_rptr,
 	.get_wptr = jpeg_v5_0_0_dec_ring_get_wptr,
 	.set_wptr = jpeg_v5_0_0_dec_ring_set_wptr,
+	.parse_cs = jpeg_v4_0_3_dec_ring_parse_cs,
 	.emit_frame_size =
 		SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
 		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
drivers/gpu/drm/amd/amdgpu/soc15d.h +6 -0
index 2357ff39323f..e74e1983da53 100644
@@ -76,6 +76,12 @@
 			 ((cond & 0xF) << 24) |				\
 			 ((type & 0xF) << 28))
 
+#define CP_PACKETJ_NOP		0x60000000
+#define CP_PACKETJ_GET_REG(x)  ((x) & 0x3FFFF)
+#define CP_PACKETJ_GET_RES(x)  (((x) >> 18) & 0x3F)
+#define CP_PACKETJ_GET_COND(x) (((x) >> 24) & 0xF)
+#define CP_PACKETJ_GET_TYPE(x) (((x) >> 28) & 0xF)
+
 /* Packet 3 types */
 #define	PACKET3_NOP					0x10
 #define	PACKET3_SET_BASE				0x11