x86/bugs: Add missing NO_SSB flag

PATCH Applied Daniel Sneddon 2 participants 2 messages Aug 29, 2024 – Sep 5, 2024 x86

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Daniel Sneddon

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2024-08-29 19:24 UTC #0 lore raw

PATCH v2 1/1 x86/bugs: Add missing NO_SSB flag

The Moorefield and Lightning Mountain Atom processors are missing the NO_SSB flag in the vulnerabilities whitelist. This will cause unaffected parts to incorrectly be reported as vulnerable. Add the missing flag.

These parts are currently out of service and were verified internally with archived documentation that they need the NO_SSB flag.

Reported-by Shanavas.K.S <[email protected]>

Closes https://lore.kernel.org/lkml/CAEJ9NQdhh+4GxrtG1DuYgqYhvc0hi-sKZh-2niukJ-MyFLntAA@mail.gmail.com/ open here

Signed-off-by Daniel Sneddon <[email protected]>

---
V1->V2
Added Reported-by and Closes tags Added note re: missing public documentation

 arch/x86/kernel/cpu/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

arch/x86/kernel/cpu/common.c +2 -2

index d4e539d4e158..be307c9ef263 100644
@@ -1165,8 +1165,8 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
 
 	VULNWL_INTEL(INTEL_CORE_YONAH,		NO_SSB),
 
-	VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID,	NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
-	VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP,	NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
+	VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID,	NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | MSBDS_ONLY),
+	VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP,	NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
 
 	VULNWL_INTEL(INTEL_ATOM_GOLDMONT,	NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
 	VULNWL_INTEL(INTEL_ATOM_GOLDMONT_D,	NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),

Signature · 1 line

2.25.1

tip-bot2 for Daniel Sneddon

merge bot Applied

2024-09-05 09:21 UTC #1 lore raw

The following commit has been merged into the x86/bugs branch of tip:

Commit-ID:     23e12b54acf621f4f03381dca91cc5f1334f21fd
Gitweb:        https://git.kernel.org/tip/23e12b54acf621f4f03381dca91cc5f1334f21fd
Author:        Daniel Sneddon <[email protected]>
AuthorDate:    Thu, 29 Aug 2024 12:24:37 -07:00
Committer:     Borislav Petkov (AMD) <[email protected]>
CommitterDate: Thu, 05 Sep 2024 10:29:31 +02:00

x86/bugs: Add missing NO_SSB flag

These parts are currently out of service and were verified internally with archived documentation that they need the NO_SSB flag.

Closes https://lore.kernel.org/lkml/CAEJ9NQdhh+4GxrtG1DuYgqYhvc0hi-sKZh-2niukJ-MyFLntAA@mail.gmail.com/ open here

Reported-by Shanavas.K.S <[email protected]>

Signed-off-by Daniel Sneddon <[email protected]>

Signed-off-by Borislav Petkov (AMD) <[email protected]>

Link https://lore.kernel.org/r/[email protected] open here

---
 arch/x86/kernel/cpu/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

arch/x86/kernel/cpu/common.c +2 -2

index d4e539d..be307c9 100644
@@ -1165,8 +1165,8 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
 
 	VULNWL_INTEL(INTEL_CORE_YONAH,		NO_SSB),
 
-	VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID,	NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
-	VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP,	NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
+	VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID,	NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | MSBDS_ONLY),
+	VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP,	NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
 
 	VULNWL_INTEL(INTEL_ATOM_GOLDMONT,	NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
 	VULNWL_INTEL(INTEL_ATOM_GOLDMONT_D,	NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),