Skip to contentSkip to conversation

arm64: dts: qcom: x1e80100: fix PCIe interconnects

PATCH Applied Johan Hovold 4 participants 6 messages Oct 24, 2024

Subsystems (4)
Stable branch Device tree bindings Arm Qualcomm mailing list Arm Qualcomm support
lore
Share & tools
lore

Johan Hovold

author
#0 lore raw

cover arm64: dts: qcom: x1e80100: fix PCIe interconnects

The fourth and fifth PCIe controllers on x1e80100 are connected to the PCIe North ANoC.

Fix the corresponding interconnect properties so that the OS manages the right paths.

These should go into 6.12-rc.

Johan

Johan Hovold (2):
arm64: dts: qcom: x1e80100: fix PCIe4 interconnect
arm64: dts: qcom: x1e80100: fix PCIe5 interconnect

 arch/arm64/boot/dts/qcom/x1e80100.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
Signature · 1 line
2.45.2
author
#1 lore raw

PATCH 1/2 arm64: dts: qcom: x1e80100: fix PCIe4 interconnect

The fourth PCIe controller is connected to the PCIe North ANoC.

Fix the corresponding interconnect property so that the OS manages the right path.

Fixes 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes")
Cc [email protected] # 6.9
Cc Abel Vesa <[email protected]>
Cc Sibi Sankar <[email protected]>
Cc Rajendra Nayak <[email protected]>
Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100.dtsi +1 -1
index b577c4b640dc..ee53cd0aeb95 100644
@@ -3229,7 +3229,7 @@ pcie4: pci@1c08000 {
 			assigned-clocks = <&gcc GCC_PCIE_4_AUX_CLK>;
 			assigned-clock-rates = <19200000>;
 
-			interconnects = <&pcie_south_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS
+			interconnects = <&pcie_north_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS
 					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
 					<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
 					 &cnoc_main SLAVE_PCIE_4 QCOM_ICC_TAG_ALWAYS>;
Signature · 1 line
2.45.2
Reviewed-by on v1 1/2
#2 lore raw

Re: [PATCH 1/2] arm64: dts: qcom: x1e80100: fix PCIe4 interconnect

Quoted 5 lines · Johan Hovold

The fourth PCIe controller is connected to the PCIe North ANoC.

Fix the corresponding interconnect property so that the OS manages the right path.

Quoted 7 lines
Fixes 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes")
Cc [email protected] # 6.9
Cc Abel Vesa <[email protected]>
Cc Sibi Sankar <[email protected]>
Cc Rajendra Nayak <[email protected]>
Signed-off-by Johan Hovold <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

author
#3 lore raw

PATCH 2/2 arm64: dts: qcom: x1e80100: fix PCIe5 interconnect

In reply to Johan Hovold

The fifth PCIe controller is connected to the PCIe North ANoC.

Fix the corresponding interconnect property so that the OS manages the right path.

Fixes 62ab23e15508 ("arm64: dts: qcom: x1e80100: add PCIe5 nodes")
Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/x1e80100.dtsi +1 -1
index ee53cd0aeb95..d7b6116578fd 100644
@@ -3105,7 +3105,7 @@ pcie5: pci@1c00000 {
 			assigned-clocks = <&gcc GCC_PCIE_5_AUX_CLK>;
 			assigned-clock-rates = <19200000>;
 
-			interconnects = <&pcie_south_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS
+			interconnects = <&pcie_north_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS
 					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
 					<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
 					 &cnoc_main SLAVE_PCIE_5 QCOM_ICC_TAG_ALWAYS>;
Signature · 1 line
2.45.2
Reviewed-by on v1 2/2
#4 lore raw

Re: [PATCH 2/2] arm64: dts: qcom: x1e80100: fix PCIe5 interconnect

Quoted 8 lines · Johan Hovold

The fifth PCIe controller is connected to the PCIe North ANoC.

Fix the corresponding interconnect property so that the OS manages the right path.

Fixes 62ab23e15508 ("arm64: dts: qcom: x1e80100: add PCIe5 nodes")
Signed-off-by Johan Hovold <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

maintainer Applied
#5 lore raw
In reply to Johan Hovold
Quoted 9 lines · Johan Hovold

The fourth and fifth PCIe controllers on x1e80100 are connected to the PCIe North ANoC.

Fix the corresponding interconnect properties so that the OS manages the right paths.

These should go into 6.12-rc.

[...]

Applied, thanks!

[1/2] arm64: dts: qcom: x1e80100: fix PCIe4 interconnect

      commit: f3bba5eb46ddb8f460fc808a65050a9bf2f7ef23
[2/2] arm64: dts: qcom: x1e80100: fix PCIe5 interconnect
      commit: 54376fe116ef69c9e58794589c044abb2555169e

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>