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riscv: sophgo: Introduce SG2044 SRD3-10 board support

PATCH Applied Inochi Amaoto 9 participants 27 messages Apr 13, 2025 – May 21, 2025

Subsystems (10)
Device tree bindings RISC-V MMC, SD and SDIO I2C subsystem host drivers +6 more subsystems
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Inochi Amaoto

author maintainer
#0 lore raw

v2 cover riscv: sophgo: Introduce SG2044 SRD3-10 board support

Sophgo SG2044 SRD3-10 is an ATX board bases on Sophgo SG2044 SoC. This board includes 5 uart ports, 5 pcie x8 slots, 1 1G Ethernet port, 1 microSD slot.

Introduce basic support for this board and Sophgo SG2044 SoC

Changed from v1:
- https://lore.kernel.org/all/[email protected]
1. apply Rob's tag
2. patch 1: new patch for grouping all similar compatible ids.
3. patch 7: remove unnecessary compatible check
4. patch 8: adapt for the new patch 1
5. patch 9: fix copyright e-mail

Inochi Amaoto (10):
dt-bindings: i2c: dw: merge duplicate compatible entry.
dt-bindings: timer: Add Sophgo SG2044 ACLINT timer
dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswi
dt-bindings: interrupt-controller: Add Sophgo SG2044 PLIC
dt-bindings: reset: sophgo: Add SG2044 bindings.
dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor
support
dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support
dt-bindings: i2c: dw: Add Sophgo SG2044 SoC I2C controller
dt-bindings: riscv: sophgo: Add SG2044 compatible string
riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10

 .../hwmon/sophgo,sg2042-hwmon-mcu.yaml        |    6 +-
 .../bindings/i2c/snps,designware-i2c.yaml     |   12 +-
 .../sifive,plic-1.0.0.yaml                    |    1 +
 .../thead,c900-aclint-mswi.yaml               |    1 +
 .../bindings/mmc/snps,dwcmshc-sdhci.yaml      |    3 +
 .../bindings/reset/sophgo,sg2042-reset.yaml   |    7 +-
 .../devicetree/bindings/riscv/sophgo.yaml     |    4 +
 .../timer/thead,c900-aclint-mtimer.yaml       |    1 +
 arch/riscv/boot/dts/sophgo/Makefile           |    1 +
 arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi   | 3002 +++++++++++++++++
 arch/riscv/boot/dts/sophgo/sg2044-reset.h     |  128 +
 .../boot/dts/sophgo/sg2044-sophgo-srd3-10.dts |   32 +
 arch/riscv/boot/dts/sophgo/sg2044.dtsi        |   86 +
 13 files changed, 3275 insertions(+), 9 deletions(-)
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-reset.h
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2044.dtsi

--
2.49.0

author maintainer
#1 lore raw

PATCH v2 1/10 dt-bindings: i2c: dw: merge duplicate compatible entry.

Each vendor have an items entry of its own compatible, It is needless and some can be merged as it share the same base "snps,designware-i2c" compatible.

Merge the duplicate compatible entry into one item entry.

Signed-off-by Inochi Amaoto <[email protected]>
---
 .../devicetree/bindings/i2c/snps,designware-i2c.yaml  | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml +4 -7
index bc5d0fb5abfe..98567dc791c3 100644
@@ -32,15 +32,12 @@ properties:
           - const: renesas,r9a06g032-i2c  # RZ/N1D
           - const: renesas,rzn1-i2c       # RZ/N1
           - const: snps,designware-i2c
-      - description: Microsemi Ocelot SoCs I2C controller
-        items:
-          - const: mscc,ocelot-i2c
-          - const: snps,designware-i2c
       - description: Baikal-T1 SoC System I2C controller
         const: baikal,bt1-sys-i2c
-      - description: T-HEAD TH1520 SoCs I2C controller
-        items:
-          - const: thead,th1520-i2c
+      - items:
+          - enum:
+              - mscc,ocelot-i2c
+              - thead,th1520-i2c
           - const: snps,designware-i2c
 
   reg:
Signature · 1 line
2.49.0
Reviewed-by on v2 1/10
#2 lore raw

Re: [PATCH v2 01/10] dt-bindings: i2c: dw: merge duplicate compatible entry.

Quoted 7 lines · Inochi Amaoto

Each vendor have an items entry of its own compatible, It is needless and some can be merged as it share the same base "snps,designware-i2c" compatible.

Merge the duplicate compatible entry into one item entry.

Signed-off-by Inochi Amaoto <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof

author maintainer
#3 lore raw

PATCH v2 2/10 dt-bindings: timer: Add Sophgo SG2044 ACLINT timer

In reply to Inochi Amaoto

Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary compatible string for SG2044 SoC.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
---
 .../devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml      | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml +1 -0
index 2e92bcdeb423..4ed30efe4052 100644
@@ -14,6 +14,7 @@ properties:
     items:
       - enum:
           - sophgo,sg2042-aclint-mtimer
+          - sophgo,sg2044-aclint-mtimer
       - const: thead,c900-aclint-mtimer
 
   reg:
Signature · 1 line
2.49.0
Applied
#4 lore raw

Re: [PATCH v2 02/10] dt-bindings: timer: Add Sophgo SG2044 ACLINT timer

Quoted 6 lines · Inochi Amaoto

Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary compatible string for SG2044 SoC.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>

---

Applied patch 2, thanks!

Signature · 5 lines
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Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
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author maintainer
#5 lore raw

Re: [PATCH v2 02/10] dt-bindings: timer: Add Sophgo SG2044 ACLINT timer

Quoted 10 lines · Daniel Lezcano
Quoted 6 lines · Inochi Amaoto

Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary compatible string for SG2044 SoC.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>

---

Applied patch 2, thanks!

Thanks, as you take this patch, I will drop this one in our repo to avoid duplicate.

Regards,
Inochi

merge bot Applied
#6 lore raw

[tip: timers/clocksource] dt-bindings: timer: Add Sophgo SG2044 ACLINT timer

In reply to Inochi Amaoto
The following commit has been merged into the timers/clocksource branch of tip:

The following commit has been merged into the timers/clocksource branch of tip:

Commit-ID:     f4cc1801987e4854870d98ed8a38db0b29298a30
Gitweb:        https://git.kernel.org/tip/f4cc1801987e4854870d98ed8a38db0b29298a30
Author:        Inochi Amaoto <[email protected]>
AuthorDate:    Mon, 14 Apr 2025 06:34:56 +08:00
Committer:     Daniel Lezcano <[email protected]>
CommitterDate: Fri, 16 May 2025 11:10:33 +02:00

dt-bindings: timer: Add Sophgo SG2044 ACLINT timer

Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary compatible string for SG2044 SoC.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
Link https://lore.kernel.org/r/[email protected] open here
Signed-off-by Daniel Lezcano <[email protected]>
---
 Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml +1 -0
index 2e92bcd..4ed30ef 100644
@@ -14,6 +14,7 @@ properties:
     items:
       - enum:
           - sophgo,sg2042-aclint-mtimer
+          - sophgo,sg2044-aclint-mtimer
       - const: thead,c900-aclint-mtimer
 
   reg:
author maintainer
#7 lore raw

PATCH v2 3/10 dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswi

In reply to Inochi Amaoto

As SG2044 also implements an enhanced ACLINT as SG2042, add necessary compatible string for SG2044 SoC.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
---
 .../bindings/interrupt-controller/thead,c900-aclint-mswi.yaml    | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/interrupt-controller/thead,c900-aclint-mswi.yaml +1 -0
index 065f2544b63b..d6fb08a54167 100644
@@ -14,6 +14,7 @@ properties:
     items:
       - enum:
           - sophgo,sg2042-aclint-mswi
+          - sophgo,sg2044-aclint-mswi
       - const: thead,c900-aclint-mswi
 
   reg:
Signature · 1 line
2.49.0
author maintainer
#8 lore raw

PATCH v2 4/10 dt-bindings: interrupt-controller: Add Sophgo SG2044 PLIC

In reply to Inochi Amaoto

The SG2044 implement a standard T-HEAD C900 PLIC, which is already supported by the kernel.

Add compatible string for Sophgo SG2044 plic.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
---
 .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml         | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +1 -0
index 3dfe425909d1..ffc4768bad06 100644
@@ -70,6 +70,7 @@ properties:
               - sophgo,cv1812h-plic
               - sophgo,sg2002-plic
               - sophgo,sg2042-plic
+              - sophgo,sg2044-plic
               - thead,th1520-plic
           - const: thead,c900-plic
       - items:
Signature · 1 line
2.49.0
author maintainer
#9 lore raw

PATCH v2 5/10 dt-bindings: reset: sophgo: Add SG2044 bindings.

In reply to Inochi Amaoto

The SG2044 shares the same reset controller as SG2042, so it is just enough to use the compatible string of SG2042 as a basis.

Add compatible string for the reset controller of SG2044.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
Reviewed-by Chen Wang <[email protected]>
---
 .../devicetree/bindings/reset/sophgo,sg2042-reset.yaml     | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml +6 -1
index 76e1931f0908..1d1b84575960 100644
@@ -11,7 +11,12 @@ maintainers:
 
 properties:
   compatible:
-    const: sophgo,sg2042-reset
+    oneOf:
+      - items:
+          - enum:
+              - sophgo,sg2044-reset
+          - const: sophgo,sg2042-reset
+      - const: sophgo,sg2042-reset
 
   reg:
     maxItems: 1
Signature · 1 line
2.49.0
#10 lore raw

Re: [PATCH v2 05/10] dt-bindings: reset: sophgo: Add SG2044 bindings.

Hi, Philipp,

Would you please apply this on reset/for-next for 6.16? I checked the change history of sophgo,sg2042-reset.yaml and looks like you submitted it last time.

Thanks,

Chen

Quoted 31 lines · Inochi Amaoto

The SG2044 shares the same reset controller as SG2042, so it is just enough to use the compatible string of SG2042 as a basis.

Add compatible string for the reset controller of SG2044.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
Reviewed-by Chen Wang <[email protected]>
---
  .../devicetree/bindings/reset/sophgo,sg2042-reset.yaml     | 7 ++++++-
  1 file changed, 6 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml +6 -1
index 76e1931f0908..1d1b84575960 100644
@@ -11,7 +11,12 @@ maintainers:
 
  properties:
    compatible:
-    const: sophgo,sg2042-reset
+    oneOf:
+      - items:
+          - enum:
+              - sophgo,sg2044-reset
+          - const: sophgo,sg2042-reset
+      - const: sophgo,sg2042-reset
 
    reg:
      maxItems: 1
maintainer Applied
#11 lore raw

Re: [PATCH v2 05/10] dt-bindings: reset: sophgo: Add SG2044 bindings.

In reply to Inochi Amaoto
Quoted 9 lines · Inochi Amaoto

The SG2044 shares the same reset controller as SG2042, so it is just enough to use the compatible string of SG2042 as a basis.

Add compatible string for the reset controller of SG2044.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
Reviewed-by Chen Wang <[email protected]>

Applied patch 5 to reset/next, thanks!

[05/10] dt-bindings: reset: sophgo: Add SG2044 bindings.

        https://git.pengutronix.de/cgit/pza/linux/commit/?id=1c64de886b88

regards
Philipp

author maintainer
#12 lore raw

PATCH v2 6/10 dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor support

In reply to Inochi Amaoto

The MCU device on SG2044 exposes the same interface as SG2042, which is already supported by the kernel.

Add compatible string for monitor device of SG2044.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
---
 .../devicetree/bindings/hwmon/sophgo,sg2042-hwmon-mcu.yaml  | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/hwmon/sophgo,sg2042-hwmon-mcu.yaml +5 -1
index f0667ac41d75..b76805d39427 100644
@@ -11,7 +11,11 @@ maintainers:
 
 properties:
   compatible:
-    const: sophgo,sg2042-hwmon-mcu
+    oneOf:
+      - items:
+          - const: sophgo,sg2044-hwmon-mcu
+          - const: sophgo,sg2042-hwmon-mcu
+      - const: sophgo,sg2042-hwmon-mcu
 
   reg:
     maxItems: 1
Signature · 1 line
2.49.0
#13 lore raw

Re: [PATCH v2 06/10] dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor support

Hi, Guenter,

Would you please apply this on hwmon/for-next for 6.16? I checked the change history of sophgo,sg2042-hwmon-mcu.yaml and looks like you submitted it last time.

Thanks,

Chen

Quoted 28 lines · Inochi Amaoto

The MCU device on SG2044 exposes the same interface as SG2042, which is already supported by the kernel.

Add compatible string for monitor device of SG2044.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
---
  .../devicetree/bindings/hwmon/sophgo,sg2042-hwmon-mcu.yaml  | 6 +++++-
  1 file changed, 5 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/hwmon/sophgo,sg2042-hwmon-mcu.yaml +5 -1
index f0667ac41d75..b76805d39427 100644
@@ -11,7 +11,11 @@ maintainers:
 
  properties:
    compatible:
-    const: sophgo,sg2042-hwmon-mcu
+    oneOf:
+      - items:
+          - const: sophgo,sg2044-hwmon-mcu
+          - const: sophgo,sg2042-hwmon-mcu
+      - const: sophgo,sg2042-hwmon-mcu
 
    reg:
      maxItems: 1
maintainer Applied
#14 lore raw

Re: [PATCH v2 06/10] dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor support

In reply to Inochi Amaoto
Quoted 7 lines · Inochi Amaoto

The MCU device on SG2044 exposes the same interface as SG2042, which is already supported by the kernel.

Add compatible string for monitor device of SG2044.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>

Applied to hwmon-next.

Thanks,
Guenter

author maintainer
#15 lore raw

PATCH v2 7/10 dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support

In reply to Inochi Amaoto

The sdhci IP of SG2044 is similar to it of SG2042. They share the same clock and controller configuration.

Add compatible string for SG2044.

Signed-off-by Inochi Amaoto <[email protected]>
---
 Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +3 -0
index e6e604072d3c..5fb347167004 100644
@@ -19,6 +19,9 @@ properties:
               - rockchip,rk3562-dwcmshc
               - rockchip,rk3576-dwcmshc
           - const: rockchip,rk3588-dwcmshc
+      - items:
+          - const: sophgo,sg2044-dwcmshc
+          - const: sophgo,sg2042-dwcmshc
       - enum:
           - rockchip,rk3568-dwcmshc
           - rockchip,rk3588-dwcmshc
Signature · 1 line
2.49.0
Reviewed-by on v2 7/10
#16 lore raw

Re: [PATCH v2 07/10] dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support

Quoted 15 lines · Inochi Amaoto

The sdhci IP of SG2044 is similar to it of SG2042. They share the same clock and controller configuration.

Add compatible string for SG2044.

Signed-off-by Inochi Amaoto <[email protected]>
---
  Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 3 +++
  1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +0 -0
index e6e604072d3c..5fb347167004 100644

Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml properties: · line 27

Quoted 9 lines
Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +3 -0
@@ -19,6 +19,9 @@ properties:
                - rockchip,rk3562-dwcmshc
                - rockchip,rk3576-dwcmshc
            - const: rockchip,rk3588-dwcmshc
+      - items:
+          - const: sophgo,sg2044-dwcmshc
+          - const: sophgo,sg2042-dwcmshc
        - enum:
            - rockchip,rk3568-dwcmshc
            - rockchip,rk3588-dwcmshc
Reviewed-by Chen Wang <[email protected]>

Chen

Acked-by on v2 7/10
#17 lore raw

Re: [PATCH v2 07/10] dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support

In reply to Inochi Amaoto
Quoted 9 lines · Inochi Amaoto

The sdhci IP of SG2044 is similar to it of SG2042. They share the same clock and controller configuration.

Add compatible string for SG2044.

Signed-off-by Inochi Amaoto <[email protected]>
---
 Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 3 +++
 1 file changed, 3 insertions(+)
Acked-by Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof

#18 lore raw

Re: [PATCH v2 07/10] dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support

In reply to Inochi Amaoto
Quoted 7 lines · Inochi Amaoto

The sdhci IP of SG2044 is similar to it of SG2042. They share the same clock and controller configuration.

Add compatible string for SG2044.

Signed-off-by Inochi Amaoto <[email protected]>

Applied for next, thanks!

Kind regards
Uffe

Quoted 21 lines
---
 Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +3 -1
index e6e604072d3c..5fb347167004 100644
@@ -19,6 +19,9 @@ properties:
               - rockchip,rk3562-dwcmshc
               - rockchip,rk3576-dwcmshc
           - const: rockchip,rk3588-dwcmshc
+      - items:
+          - const: sophgo,sg2044-dwcmshc
+          - const: sophgo,sg2042-dwcmshc
       - enum:
           - rockchip,rk3568-dwcmshc
           - rockchip,rk3588-dwcmshc
--

2.49.0

author maintainer
#19 lore raw

PATCH v2 8/10 dt-bindings: i2c: dw: Add Sophgo SG2044 SoC I2C controller

In reply to Inochi Amaoto

Add compatible string for Sophgo SG2044 SoC I2C controller which can be used specifically for the SG2044 SoC.

Signed-off-by Inochi Amaoto <[email protected]>
---
 Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml +1 -0
index 98567dc791c3..d904191bb0c6 100644
@@ -37,6 +37,7 @@ properties:
       - items:
           - enum:
               - mscc,ocelot-i2c
+              - sophgo,sg2044-i2c
               - thead,th1520-i2c
           - const: snps,designware-i2c
Signature · 1 line
2.49.0
author maintainer
#21 lore raw

PATCH v2 9/10 dt-bindings: riscv: sophgo: Add SG2044 compatible string

In reply to Inochi Amaoto

Add compatible string for the Sophgo SG2044 SoC and the SRD3-10 board.

Signed-off-by Inochi Amaoto <[email protected]>
Acked-by Rob Herring (Arm) <[email protected]>
Reviewed-by Chen Wang <[email protected]>
---
 Documentation/devicetree/bindings/riscv/sophgo.yaml | 4 ++++
 1 file changed, 4 insertions(+)
Documentation/devicetree/bindings/riscv/sophgo.yaml +4 -0
index a14cb10ff3f0..b4c4d7a7d7ad 100644
@@ -35,6 +35,10 @@ properties:
           - enum:
               - milkv,pioneer
           - const: sophgo,sg2042
+      - items:
+          - enum:
+              - sophgo,srd3-10
+          - const: sophgo,sg2044
 
 additionalProperties: true
Signature · 1 line
2.49.0
author maintainer
#22 lore raw

PATCH v2 10/10 riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10

In reply to Inochi Amaoto

Sophgo SG2044 SRD3-10 board bases on Sophgo SG2044 SoC. This board includes 5 uart ports, 5 pcie x8 slots, 1 1G Ethernet port, 1 microSD slot.

Add initial device tree of this board with uart support.

Signed-off-by Inochi Amaoto <[email protected]>
---
 arch/riscv/boot/dts/sophgo/Makefile           |    1 +
 arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi   | 3002 +++++++++++++++++
 arch/riscv/boot/dts/sophgo/sg2044-reset.h     |  128 +
 .../boot/dts/sophgo/sg2044-sophgo-srd3-10.dts |   32 +
 arch/riscv/boot/dts/sophgo/sg2044.dtsi        |   86 +
 5 files changed, 3249 insertions(+)
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-reset.h
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts
 create mode 100644 arch/riscv/boot/dts/sophgo/sg2044.dtsi
arch/riscv/boot/dts/sophgo/Makefile +1 -0
index 47d4243a8f35..85966306801e 100644
@@ -3,3 +3,4 @@ dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb
 dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb
 dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb
 dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
+dtb-$(CONFIG_ARCH_SOPHGO) += sg2044-sophgo-srd3-10.dtb
arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi new file +3002 -0

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arch/riscv/boot/dts/sophgo/sg2044-reset.h new file +128 -0

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arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts new file +32 -0
new file mode 100644
index 000000000000..54cdf4239d5f

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arch/riscv/boot/dts/sophgo/sg2044.dtsi new file +86 -0

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Signature · 1 line
2.49.0

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#23 lore raw
In reply to Inochi Amaoto

Hi, Inochi,

Will you apply this patchset on sophgo/for-next? I see there are changes just about dts/bindings.

Chen

Quoted 49 lines · Inochi Amaoto

Sophgo SG2044 SRD3-10 is an ATX board bases on Sophgo SG2044 SoC. This board includes 5 uart ports, 5 pcie x8 slots, 1 1G Ethernet port, 1 microSD slot.

Introduce basic support for this board and Sophgo SG2044 SoC

Changed from v1:
- https://lore.kernel.org/all/[email protected]
1. apply Rob's tag
2. patch 1: new patch for grouping all similar compatible ids.
3. patch 7: remove unnecessary compatible check
4. patch 8: adapt for the new patch 1
5. patch 9: fix copyright e-mail

Inochi Amaoto (10):
dt-bindings: i2c: dw: merge duplicate compatible entry.
dt-bindings: timer: Add Sophgo SG2044 ACLINT timer
dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswi
dt-bindings: interrupt-controller: Add Sophgo SG2044 PLIC
dt-bindings: reset: sophgo: Add SG2044 bindings.
dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor
support
dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support
dt-bindings: i2c: dw: Add Sophgo SG2044 SoC I2C controller
dt-bindings: riscv: sophgo: Add SG2044 compatible string
riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10

  .../hwmon/sophgo,sg2042-hwmon-mcu.yaml        |    6 +-
  .../bindings/i2c/snps,designware-i2c.yaml     |   12 +-
  .../sifive,plic-1.0.0.yaml                    |    1 +
  .../thead,c900-aclint-mswi.yaml               |    1 +
  .../bindings/mmc/snps,dwcmshc-sdhci.yaml      |    3 +
  .../bindings/reset/sophgo,sg2042-reset.yaml   |    7 +-
  .../devicetree/bindings/riscv/sophgo.yaml     |    4 +
  .../timer/thead,c900-aclint-mtimer.yaml       |    1 +
  arch/riscv/boot/dts/sophgo/Makefile           |    1 +
  arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi   | 3002 +++++++++++++++++
  arch/riscv/boot/dts/sophgo/sg2044-reset.h     |  128 +
  .../boot/dts/sophgo/sg2044-sophgo-srd3-10.dts |   32 +
  arch/riscv/boot/dts/sophgo/sg2044.dtsi        |   86 +
  13 files changed, 3275 insertions(+), 9 deletions(-)

create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-reset.h create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts create mode 100644 arch/riscv/boot/dts/sophgo/sg2044.dtsi

--
2.49.0

author maintainer
#24 lore raw
Quoted 7 lines · Chen Wang

Hi, Inochi,

Will you apply this patchset on sophgo/for-next? I see there are changes just about dts/bindings.

Chen

I can only take 2, 3, 4, 9, 10 for now. The left I think they should be take by the subsystem maintainers.

Regards,
Inochi

maintainer
#25 lore raw

Hi,

Quoted 11 lines · Inochi Amaoto
Quoted 7 lines · Chen Wang

Hi, Inochi,

Will you apply this patchset on sophgo/for-next? I see there are changes just about dts/bindings.

Chen

I can only take 2, 3, 4, 9, 10 for now. The left I think they should be take by the subsystem maintainers.

Please, go ahead. I just merged patch 1 and 8 in i2c/i2c-host.

Thanks,
Andi

author maintainer Applied
#26 lore raw

Re: (subset) [PATCH v2 00/10] riscv: sophgo: Introduce SG2044 SRD3-10 board support

In reply to Inochi Amaoto
Quoted 14 lines · Inochi Amaoto

Sophgo SG2044 SRD3-10 is an ATX board bases on Sophgo SG2044 SoC. This board includes 5 uart ports, 5 pcie x8 slots, 1 1G Ethernet port, 1 microSD slot.

Introduce basic support for this board and Sophgo SG2044 SoC

Changed from v1:
- https://lore.kernel.org/all/[email protected]
1. apply Rob's tag
2. patch 1: new patch for grouping all similar compatible ids.
3. patch 7: remove unnecessary compatible check
4. patch 8: adapt for the new patch 1
5. patch 9: fix copyright e-mail

Quoted 1 line

[...]

Applied to for-next, thanks!

[02/10] dt-bindings: timer: Add Sophgo SG2044 ACLINT timer

        https://github.com/sophgo/linux/commit/1e76b39eda76f7317ab75dacccaeda5a5b02c519
[03/10] dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswi
        https://github.com/sophgo/linux/commit/a3cc46f7925b6b48e80c70815e3f637abcda77b9
[04/10] dt-bindings: interrupt-controller: Add Sophgo SG2044 PLIC
        https://github.com/sophgo/linux/commit/a7470f20e271203494b4cd427e687c12649f0087
[09/10] dt-bindings: riscv: sophgo: Add SG2044 compatible string
        https://github.com/sophgo/linux/commit/9ee1f97cf3e1743591ae76324d96082c8fb496d8
[10/10] riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10
        https://github.com/sophgo/linux/commit/c8b1ca99c8485036cefa962aead3a0c57cb27d3f

Thanks,
Inochi