dt-bindings: interrupt-controller: Convert openrisc,ompic to DT schema

PATCH In review Rob Herring (Arm) 2 participants 3 messages May 5, 2025 – May 6, 2025

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Rob Herring (Arm)

author maintainer

2025-05-05 14:48 UTC #0 lore raw

PATCH 1/1 dt-bindings: interrupt-controller: Convert openrisc,ompic to DT schema

Convert the OpenRISC OMPIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller.

Signed-off-by Rob Herring (Arm) <[email protected]>

---
 .../interrupt-controller/openrisc,ompic.txt   | 22 ---------
 .../interrupt-controller/openrisc,ompic.yaml  | 45 +++++++++++++++++++
 2 files changed, 45 insertions(+), 22 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml

Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt deleted +0 ~~-22~~

deleted file mode 100644
index caec07cc7149..000000000000
@@ -1,22 +0,0 @@
-Open Multi-Processor Interrupt Controller
-
-Required properties:
-
-- compatible : This should be "openrisc,ompic"
-- reg : Specifies base physical address and size of the register space. The
-  size is based on the number of cores the controller has been configured
-  to handle, this should be set to 8 bytes per cpu core.
-- interrupt-controller : Identifies the node as an interrupt controller.
-- #interrupt-cells : This should be set to 0 as this will not be an irq
-  parent.
-- interrupts : Specifies the interrupt line to which the ompic is wired.
-
-Example:
-
-ompic: interrupt-controller@98000000 {
-	compatible = "openrisc,ompic";
-	reg = <0x98000000 16>;
-	interrupt-controller;
-	#interrupt-cells = <0>;
-	interrupts = <1>;
-};

Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml new file +45 -0

45 lines not on this page · raw message

Signature · 1 line

2.47.2

Stafford Horne

2025-05-06 16:17 UTC #1 lore raw

Hi Rob,

Quoted 20 lines · Rob Herring (Arm)

Convert the OpenRISC OMPIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller.
Signed-off-by Rob Herring (Arm) <[email protected]>
---
 .../interrupt-controller/openrisc,ompic.txt   | 22 ---------
 .../interrupt-controller/openrisc,ompic.yaml  | 45 +++++++++++++++++++
 2 files changed, 45 insertions(+), 22 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml
Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt deleted +0 -2
deleted file mode 100644
index caec07cc7149..000000000000
@@ -1,22 +0,0 @@
-Open Multi-Processor Interrupt Controller
-

Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt line 12

Quoted 10 lines

Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt deleted +0 ~~-10~~

-Required properties:
-
-- compatible : This should be "openrisc,ompic"
-- reg : Specifies base physical address and size of the register space. The
-  size is based on the number of cores the controller has been configured
-  to handle, this should be set to 8 bytes per cpu core.
-- interrupt-controller : Identifies the node as an interrupt controller.
-- #interrupt-cells : This should be set to 0 as this will not be an irq
-  parent.
-- interrupts : Specifies the interrupt line to which the ompic is wired.

I guess this extra documentation is obsorbed by the fact that these are all standard fields?

Quoted 50 lines

Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt deleted +0 -9

-Example:
-
-ompic: interrupt-controller@98000000 {
-	compatible = "openrisc,ompic";
-	reg = <0x98000000 16>;
-	interrupt-controller;
-	#interrupt-cells = <0>;
-	interrupts = <1>;
-};

Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml new file +35 -0

new file mode 100644
index 000000000000..4efbfba3aa6b
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/openrisc,ompic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Open Multi-Processor Interrupt Controller
+
+maintainers:
+  - Stafford Horne <[email protected]>
+
+properties:
+  compatible:
+    items:
+      - const: openrisc,ompic
+
+  reg:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 0
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupt-controller
+  - '#interrupt-cells'
+  - interrupts
+
+additionalProperties: false

Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml line 45

Quoted 10 lines

Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml new file +10 -0

+
+examples:
+  - |
+    interrupt-controller@98000000 {
+        compatible = "openrisc,ompic";
+        reg = <0x98000000 16>;
+        interrupt-controller;
+        #interrupt-cells = <0>;
+        interrupts = <1>;
+    };

I think this is ok.

I will queue this via the OpenRISC queue.

-Stafford

Rob Herring

author maintainer

2025-05-06 19:11 UTC #2 lore raw

Quoted 29 lines · Stafford Horne

Hi Rob,
Quoted 25 lines · Rob Herring (Arm)
Convert the OpenRISC OMPIC interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller.
Signed-off-by Rob Herring (Arm) <[email protected]>
---
 .../interrupt-controller/openrisc,ompic.txt   | 22 ---------
 .../interrupt-controller/openrisc,ompic.yaml  | 45 +++++++++++++++++++
 2 files changed, 45 insertions(+), 22 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.yaml
Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt deleted +0 -7
deleted file mode 100644
index caec07cc7149..000000000000
@@ -1,22 +0,0 @@
-Open Multi-Processor Interrupt Controller
-
-Required properties:
-
-- compatible : This should be "openrisc,ompic"
-- reg : Specifies base physical address and size of the register space. The
-  size is based on the number of cores the controller has been configured

Quoted 8 lines

Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt line 12
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/openrisc,ompic.txt deleted +0 -5
-  to handle, this should be set to 8 bytes per cpu core.
-- interrupt-controller : Identifies the node as an interrupt controller.
-- #interrupt-cells : This should be set to 0 as this will not be an irq
-  parent.
-- interrupts : Specifies the interrupt line to which the ompic is wired.
I guess this extra documentation is obsorbed by the fact that these are all standard fields?

Right, we only put details unique to this binding if any.

Rob