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fixing typo in function name

PATCH Applied Jihed Chaibi 3 participants 5 messages May 17, 2025 – May 19, 2025

Subsystems (2)
DRM drivers Radeon and amdgpu DRM drivers
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Jihed Chaibi

author
#0 lore raw

PATCH 2/2 fixing typo in function name

"ENABLE" is currently misspelled in SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS

Signed-off-by Jihed Chaibi <[email protected]>
---
 drivers/gpu/drm/radeon/atombios.h | 2 +-
 drivers/gpu/drm/radeon/kv_dpm.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/radeon/atombios.h +1 -1
index 2db407892..b961096a4 100644
@@ -5072,7 +5072,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7
 #define SYS_INFO_GPUCAPS__TMDSHDMI_COHERENT_SINGLEPLL_MODE                0x01
 #define SYS_INFO_GPUCAPS__DP_SINGLEPLL_MODE                               0x02
 #define SYS_INFO_GPUCAPS__DISABLE_AUX_MODE_DETECT                         0x08
-#define SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS                               0x10
+#define SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS                               0x10
 
 /**********************************************************************************************************************
   ATOM_INTEGRATED_SYSTEM_INFO_V1_7 Description
drivers/gpu/drm/radeon/kv_dpm.c +1 -1
index 55dbf450b..4aa050385 100644
@@ -2329,7 +2329,7 @@ static int kv_parse_sys_info_table(struct radeon_device *rdev)
 				le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);
 		}
 		if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &
-		    SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS)
+		    SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS)
 			pi->caps_enable_dfs_bypass = true;
 
 		sumo_construct_sclk_voltage_mapping_table(rdev,
Signature · 1 line
2.39.5
#1 lore raw

Jihed Chaibi <[email protected]>, 17 May 2025 Cmt, 06:09 tarihinde şunu yazdı:

Quoted 3 lines

"ENABLE" is currently misspelled in SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS

i didnt see this and yes *grph_object_ctrl_defs.h* is exactly what i'm talking about, please ignore my previous email.

Regards

Ozgur

Quoted 37 lines
Signed-off-by Jihed Chaibi <[email protected]>
---
 drivers/gpu/drm/radeon/atombios.h | 2 +-
 drivers/gpu/drm/radeon/kv_dpm.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/radeon/atombios.h +1 -1
index 2db407892..b961096a4 100644
@@ -5072,7 +5072,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7
 #define SYS_INFO_GPUCAPS__TMDSHDMI_COHERENT_SINGLEPLL_MODE                0x01
 #define SYS_INFO_GPUCAPS__DP_SINGLEPLL_MODE                               0x02
 #define SYS_INFO_GPUCAPS__DISABLE_AUX_MODE_DETECT                         0x08
-#define SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS                               0x10
+#define SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS                               0x10
 
 /**********************************************************************************************************************
   ATOM_INTEGRATED_SYSTEM_INFO_V1_7 Description
drivers/gpu/drm/radeon/kv_dpm.c +1 -2
index 55dbf450b..4aa050385 100644
@@ -2329,7 +2329,7 @@ static int kv_parse_sys_info_table(struct radeon_device *rdev)
                                le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);
                }
                if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &
-                   SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS)
+                   SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS)
                        pi->caps_enable_dfs_bypass = true;
 
                sumo_construct_sclk_voltage_mapping_table(rdev,
--

2.39.5

#2 lore raw
In reply to Jihed Chaibi

Jihed Chaibi <[email protected]>, 17 May 2025 Cmt, 06:09 tarihinde şunu yazdı:

Quoted 3 lines

"ENABLE" is currently misspelled in SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS

i didnt see this and yes *grph_object_ctrl_defs.h* is exactly what i'm talking about, please ignore my previous email.

Regards

Ozgur

Quoted 37 lines
Signed-off-by Jihed Chaibi <[email protected]>
---
 drivers/gpu/drm/radeon/atombios.h | 2 +-
 drivers/gpu/drm/radeon/kv_dpm.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/radeon/atombios.h +1 -1
index 2db407892..b961096a4 100644
@@ -5072,7 +5072,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7
 #define SYS_INFO_GPUCAPS__TMDSHDMI_COHERENT_SINGLEPLL_MODE                0x01
 #define SYS_INFO_GPUCAPS__DP_SINGLEPLL_MODE                               0x02
 #define SYS_INFO_GPUCAPS__DISABLE_AUX_MODE_DETECT                         0x08
-#define SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS                               0x10
+#define SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS                               0x10
 
 /**********************************************************************************************************************
   ATOM_INTEGRATED_SYSTEM_INFO_V1_7 Description
drivers/gpu/drm/radeon/kv_dpm.c +1 -2
index 55dbf450b..4aa050385 100644
@@ -2329,7 +2329,7 @@ static int kv_parse_sys_info_table(struct radeon_device *rdev)
                                le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);
                }
                if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &
-                   SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS)
+                   SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS)
                        pi->caps_enable_dfs_bypass = true;
 
                sumo_construct_sclk_voltage_mapping_table(rdev,
--

2.39.5

#3 lore raw
In reply to Jihed Chaibi

Jihed Chaibi <[email protected]>, 17 May 2025 Cmt, 06:09 tarihinde şunu yazdı:

Quoted 3 lines

"ENABLE" is currently misspelled in SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS

i didnt see this and yes *grph_object_ctrl_defs.h* is exactly what i'm talking about, please ignore my previous email.

Regards

Ozgur

Quoted 37 lines
Signed-off-by Jihed Chaibi <[email protected]>
---
 drivers/gpu/drm/radeon/atombios.h | 2 +-
 drivers/gpu/drm/radeon/kv_dpm.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/radeon/atombios.h +1 -1
index 2db407892..b961096a4 100644
@@ -5072,7 +5072,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7
 #define SYS_INFO_GPUCAPS__TMDSHDMI_COHERENT_SINGLEPLL_MODE                0x01
 #define SYS_INFO_GPUCAPS__DP_SINGLEPLL_MODE                               0x02
 #define SYS_INFO_GPUCAPS__DISABLE_AUX_MODE_DETECT                         0x08
-#define SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS                               0x10
+#define SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS                               0x10
 
 /**********************************************************************************************************************
   ATOM_INTEGRATED_SYSTEM_INFO_V1_7 Description
drivers/gpu/drm/radeon/kv_dpm.c +1 -2
index 55dbf450b..4aa050385 100644
@@ -2329,7 +2329,7 @@ static int kv_parse_sys_info_table(struct radeon_device *rdev)
                                le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);
                }
                if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &
-                   SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS)
+                   SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS)
                        pi->caps_enable_dfs_bypass = true;
 
                sumo_construct_sclk_voltage_mapping_table(rdev,
--

2.39.5

Applied
#4 lore raw
In reply to Jihed Chaibi
Quoted 4 lines · Jihed Chaibi

"ENABLE" is currently misspelled in SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS

Signed-off-by Jihed Chaibi <[email protected]>

Applied. Thanks!

Alex

Quoted 34 lines
---
 drivers/gpu/drm/radeon/atombios.h | 2 +-
 drivers/gpu/drm/radeon/kv_dpm.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/radeon/atombios.h +1 -1
index 2db407892..b961096a4 100644
@@ -5072,7 +5072,7 @@ typedef struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7
 #define SYS_INFO_GPUCAPS__TMDSHDMI_COHERENT_SINGLEPLL_MODE                0x01
 #define SYS_INFO_GPUCAPS__DP_SINGLEPLL_MODE                               0x02
 #define SYS_INFO_GPUCAPS__DISABLE_AUX_MODE_DETECT                         0x08
-#define SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS                               0x10
+#define SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS                               0x10
 
 /**********************************************************************************************************************
   ATOM_INTEGRATED_SYSTEM_INFO_V1_7 Description
drivers/gpu/drm/radeon/kv_dpm.c +1 -2
index 55dbf450b..4aa050385 100644
@@ -2329,7 +2329,7 @@ static int kv_parse_sys_info_table(struct radeon_device *rdev)
                                le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);
                }
                if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &
-                   SYS_INFO_GPUCAPS__ENABEL_DFS_BYPASS)
+                   SYS_INFO_GPUCAPS__ENABLE_DFS_BYPASS)
                        pi->caps_enable_dfs_bypass = true;
 
                sumo_construct_sclk_voltage_mapping_table(rdev,
--

2.39.5