FAILED: patch "[PATCH] drm/xe: Add WA BB to capture active context utilization" failed to apply to 6.12-stable tree
Subsystems (3)
[email protected]
maintainerThe patch below does not apply to the 6.12-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.12.y
git checkout FETCH_HEAD
git cherry-pick -x 617d824c5323b8474b3665ae6c410c98b839e0b0
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2025051925-crewman-endowment-b27d@gregkh' --subject-prefix 'PATCH 6.12.y' HEAD^..
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 617d824c5323b8474b3665ae6c410c98b839e0b0 Mon Sep 17 00:00:00 2001
From: Umesh Nerlige Ramappa <[email protected]>
Date: Fri, 9 May 2025 09:12:03 -0700
Subject: [PATCH] drm/xe: Add WA BB to capture active context utilization
Context Timestamp (CTX_TIMESTAMP) in the LRC accumulates the run ticks of the context, but only gets updated when the context switches out. In order to check how long a context has been active before it switches out, two things are required:
(1) Determine if the context is running:
To do so, we program the WA BB to set an initial value for CTX_TIMESTAMP in the LRC. The value chosen is 1 since 0 is the initial value when the LRC is initialized. During a query, we just check for this value to determine if the context is active. If the context switched out, it would overwrite this location with the actual CTX_TIMESTAMP MMIO value. Note that WA BB runs as the last part of the context restore, so reusing this LRC location will not clobber anything.
(2) Calculate the time that the context has been active for:
The CTX_TIMESTAMP ticks only when the context is active. If a context is active, we just use the CTX_TIMESTAMP MMIO as the new value of utilization. While doing so, we need to read the CTX_TIMESTAMP MMIO for the specific engine instance. Since we do not know which instance the context is running on until it is scheduled, we also read the ENGINE_ID MMIO in the WA BB and store it in the PPHSWP.
Using the above 2 instructions in a WA BB, capture active context utilization.
v2: (Matt Brost)
- This breaks TDR, fix it by saving the CTX_TIMESTAMP register "drm/xe: Save CTX_TIMESTAMP mmio value instead of LRC value"
- Drop tile from LRC if using gt
"drm/xe: Save the gt pointer in LRC and drop the tile"
v3:
- Remove helpers for bb_per_ctx_ptr (Matt)
- Add define for context active value (Matt)
- Use 64 bit CTX TIMESTAMP for platforms that support it. For platforms that don't, live with the rare race. (Matt, Lucas)
- Convert engine id to hwe and get the MMIO value (Lucas)
- Correct commit message on when WA BB runs (Lucas)
v4:
- s/GRAPHICS_VER(...)/xe->info.has_64bit_timestamp/ (Matt)
- Drop support for active utilization on a VF (CI failure)
- In xe_lrc_init ensure the lrc value is 0 to begin with (CI regression)
v5:
- Minor checkpatch fix
- Squash into previous commit and make TDR use 32-bit time
- Update code comment to match commit msg
drivers/gpu/drm/xe/regs/xe_engine_regs.h +5 -0
@@ -43,6 +43,10 @@#define XEHPC_BCS8_RING_BASE 0x3ee000#define GSCCS_RING_BASE 0x11a000 +#define ENGINE_ID (base) XE_REG((base) + 0x8c) +#define ENGINE_INSTANCE_ID REG_GENMASK(9, 4) +#define ENGINE_CLASS_ID REG_GENMASK(2, 0) +#define RING_TAIL (base) XE_REG((base) + 0x30)#define TAIL_ADDR REG_GENMASK(20, 3)
@@ -154,6 +158,7 @@#define STOP_RING REG_BIT(8)#define RING_CTX_TIMESTAMP (base) XE_REG((base) + 0x3a8) +#define RING_CTX_TIMESTAMP_UDW (base) XE_REG((base) + 0x3ac)#define CSBE_DEBUG_STATUS (base) XE_REG((base) + 0x3fc)#define RING_FORCE_TO_NONPRIV (base, i) XE_REG(((base) + 0x4d0) + (i) * 4)
drivers/gpu/drm/xe/regs/xe_lrc_layout.h +2 -0
@@ -11,7 +11,9 @@#define CTX_RING_TAIL (0x06 + 1)#define CTX_RING_START (0x08 + 1)#define CTX_RING_CTL (0x0a + 1) +#define CTX_BB_PER_CTX_PTR (0x12 + 1)#define CTX_TIMESTAMP (0x22 + 1) +#define CTX_TIMESTAMP_UDW (0x24 + 1)#define CTX_INDIRECT_RING_STATE (0x26 + 1)#define CTX_PDP0_UDW (0x30 + 1)#define CTX_PDP0_LDW (0x32 + 1)
drivers/gpu/drm/xe/xe_device_types.h +2 -0
@@ -330,6 +330,8 @@ struct xe_device { u8 has_sriov:1;/** @info.has_usm: Device has unified shared memory support */ u8 has_usm:1; +/** @info.has_64bit_timestamp: Device supports 64-bit timestamps */ + u8 has_64bit_timestamp:1;/** @info.is_dgfx: is discrete device */ u8 is_dgfx:1;/**
drivers/gpu/drm/xe/xe_exec_queue.c +1 -1
@@ -830,7 +830,7 @@ void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q) {struct xe_device *xe =gt_to_xe (q->gt);struct xe_lrc *lrc; -u32 old_ts, new_ts; +u64 old_ts, new_ts;int idx;/*
drivers/gpu/drm/xe/xe_guc_submit.c +1 -1
@@ -941,7 +941,7 @@ static bool check_timeout(struct xe_exec_queue *q, struct xe_sched_job *job)return xe_sched_invalidate_job (job,2 ); } - ctx_timestamp =xe_lrc_ctx_timestamp (q->lrc[0 ]); + ctx_timestamp =lower_32_bits (xe_lrc_ctx_timestamp (q->lrc[0 ])); ctx_job_timestamp =xe_lrc_ctx_job_timestamp (q->lrc[0 ]);/*
drivers/gpu/drm/xe/xe_lrc.c +183 -10
315 lines not on this page · raw message
drivers/gpu/drm/xe/xe_lrc.h +3 -2
@@ -120,7 +120,8 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printervoid xe_lrc_snapshot_free (struct xe_lrc_snapshot *snapshot);u32 xe_lrc_ctx_timestamp_ggtt_addr (struct xe_lrc *lrc); -u32 xe_lrc_ctx_timestamp (struct xe_lrc *lrc); +u32 xe_lrc_ctx_timestamp_udw_ggtt_addr (struct xe_lrc *lrc); +u64 xe_lrc_ctx_timestamp (struct xe_lrc *lrc);u32 xe_lrc_ctx_job_timestamp_ggtt_addr (struct xe_lrc *lrc);u32 xe_lrc_ctx_job_timestamp (struct xe_lrc *lrc);
@@ -136,6 +137,6 @@ u32 xe_lrc_ctx_job_timestamp(struct xe_lrc *lrc);* * Returns the current LRC timestamp */ -u32 xe_lrc_update_timestamp (struct xe_lrc *lrc,u32 *old_ts); +u64 xe_lrc_update_timestamp (struct xe_lrc *lrc,u64 *old_ts);#endif
drivers/gpu/drm/xe/xe_lrc_types.h +4 -1
@@ -52,7 +52,10 @@ struct xe_lrc {struct xe_hw_fence_ctx fence_ctx;/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */ -u32 ctx_timestamp; +u64 ctx_timestamp; + +/** @bb_per_ctx_bo: buffer object for per context batch wa buffer */ +struct xe_bo *bb_per_ctx_bo; };struct xe_lrc_snapshot ;
drivers/gpu/drm/xe/xe_pci.c +2 -0
@@ -140,6 +140,7 @@ static const struct xe_graphics_desc graphics_xelpg = { .has_indirect_ring_state = 1, \ .has_range_tlb_invalidation = 1, \ .has_usm = 1, \ + .has_64bit_timestamp = 1, \ .va_bits = 48, \ .vm_max_level = 4, \ .hw_engine_mask = \
@@ -668,6 +669,7 @@ static int xe_info_init(struct xe_device *xe, xe->info.has_range_tlb_invalidation = graphics_desc->has_range_tlb_invalidation; xe->info.has_usm = graphics_desc->has_usm; + xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;for_each_remote_tile (tile, xe, id) {int err;
drivers/gpu/drm/xe/xe_pci_types.h +1 -0
@@ -21,6 +21,7 @@ struct xe_graphics_desc { u8 has_indirect_ring_state:1; u8 has_range_tlb_invalidation:1; u8 has_usm:1; + u8 has_64bit_timestamp:1; };struct xe_media_desc {
drivers/gpu/drm/xe/xe_trace_lrc.h +4 -4
@@ -19,12 +19,12 @@#define __dev_name_lrc (lrc) dev_name(gt_to_xe((lrc)->fence_ctx.gt)->drm.dev) TRACE_EVENT(xe_lrc_update_timestamp, - TP_PROTO(struct xe_lrc *lrc, uint32_t old), + TP_PROTO(struct xe_lrc *lrc, uint64_t old), TP_ARGS(lrc, old), TP_STRUCT__entry( __field(struct xe_lrc *, lrc) - __field(u32, old) - __field(u32, new) + __field(u64, old) + __field(u64, new) __string(name, lrc->fence_ctx.name) __string(device_id, __dev_name_lrc(lrc)) ),
@@ -36,7 +36,7 @@ TRACE_EVENT(xe_lrc_update_timestamp,__assign_str (name);__assign_str (device_id); ), -TP_printk ("lrc=:%p lrc->name=%s old=%u new=%u device_id:%s" , +TP_printk ("lrc=:%p lrc->name=%s old=%llu new=%llu device_id:%s" , __entry->lrc,__get_str (name), __entry->old, __entry->new,__get_str (device_id))