Add support for XM25LU64C
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Pratyush Yadav
maintainerQuoted 7 lines · Ssunk
From: Kankan Sun <[email protected]>
The device is produced by Wuhan Xinxin Semiconductor Manufacturing Corp. and found on some routers from Chinese manufactures.
We need to add this chip to google's AVL
The data sheet can be found here:
https://www.xmcwh.com/uploads/954/XM25LU64C%20_%20Ver1.4.pdf
Please read [0] for patch requirements.
Also, does the flash support SFDP? In that case, you shouldn't need an entry for it at all and let the generic SFDP-based driver drive the flash instead. Can you try using the flash without add its entry and check if it works?
[0] https://docs.kernel.org/driver-api/mtd/spi-nor.html
[...]
Signature · 6 lines
Regards, Pratyush Yadav ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
PATCH v2 1/1 Add support for XM25LU64C
The device is produced by Wuhan Xinxin Semiconductor Manufacturing Corp. (XMC) and found on some routers from Chinese manufactures.
We need to add this chip to google's AVL
The flash ID was incorrectly set to 0x16 0x41 0x17.
Update to 0x20 0x41 0x17 as per the datasheet.
The data sheet can be found here:
https://www.xmcwh.com/uploads/954/XM25LU64C%20_%20Ver1.5.pdf
---
Changes in v2:
- Fix flash ID from 0x16 0x41 0x17 to 0x20 0x41 0x17 (datasheet confirmed).
drivers/mtd/spi-nor/xmc.c | 5 +++++ 1 file changed, 5 insertions(+)
drivers/mtd/spi-nor/xmc.c +5 -0
@@ -19,6 +19,11 @@ static const struct flash_info xmc_nor_parts[] = { .name = "XM25QH128A", .size = SZ_16M, .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id = SNOR_ID(0x20, 0x41, 0x17), + .name = "XM25LU64C", + .size = SZ_8M, + .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, };
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Quoted 3 lines · Ssunk
The device is produced by Wuhan Xinxin Semiconductor Manufacturing Corp. (XMC) and found on some routers from Chinese manufactures.
We need to add this chip to google's AVL
What is google AVL?
Quoted 2 lines
The flash ID was incorrectly set to
0x160x410x17. Update to0x200x410x17as per the datasheet.
This is not something what you put into the commit message.
Quoted 2 lines
The data sheet can be found here:
https://www.xmcwh.com/uploads/954/XM25LU64C%20_%20Ver1.5.pdf
I get a 404 here.
Quoted 6 lines
Signed-off-by Kankan Sun <[email protected]>---
Changes in v2:
- Fix flash ID from0x160x410x17to0x200x410x17(datasheet confirmed).drivers/mtd/spi-nor/xmc.c | 5 +++++ 1 file changed, 5 insertions(+)
NAK.
This flash probably supports SFDP. Pratyush and Tudor have already asked that and there was no answer as far as I can tell.
That is also probably why the flash was working with your v1 although the ID was wrong. Or you don't even test your patches which would be even worse.
-michael
Quoted 7 lines
drivers/mtd/spi-nor/xmc.c +0
-0@@ -19,6 +19,11 @@ static const struct flash_info xmc_nor_parts[] = { .name = "XM25QH128A",
drivers/mtd/spi-nor/xmc.c static const struct flash_info xmc_nor_parts[] = { · line 29
Quoted 10 lines
drivers/mtd/spi-nor/xmc.c +5
-0.size = SZ_16M, .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id = SNOR_ID(0x20, 0x41, 0x17), + .name = "XM25LU64C", + .size = SZ_8M, + .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, };
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PATCH v3 1/1 Add support for XM25LU64C
The device is produced by Wuhan Xinxin Semiconductor Manufacturing Corp. (XMC) and found on some routers from Chinese manufactures.
We need to add this chip to google's AVL
The flash ID was incorrectly set to 0x16 0x41 0x17.
Update to 0x20 0x41 0x17 as per the datasheet.
The data sheet can be found here:
https://www.xmcwh.com/uploads/954/XM25LU64C_V1.5.pdf
---
Changes since v3:
- Our xm25lu64c is not working properly with flashrom, we need to add the following SPI_NOR_HAS_LOCK, SPI_NOR_HAS_TB flags to make the flashrom work normally.
v2->v3: Add SPI_NOR_HAS_LOCK, SPI_NOR_HAS_TB flags to make the flashrom work normally.
v1->v2: Update the flash ID to 0x20 0x41 0x17 as per the datasheet.
drivers/mtd/spi-nor/xmc.c | 6 ++++++ 1 file changed, 6 insertions(+)
drivers/mtd/spi-nor/xmc.c +6 -0
@@ -19,6 +19,12 @@ static const struct flash_info xmc_nor_parts[] = { .name = "XM25QH128A", .size = SZ_16M, .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id = SNOR_ID(0x20, 0x41, 0x17), + .name = "XM25LU64C", + .size = SZ_8M, + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, };
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Quoted 10 lines · Ssunk
The device is produced by Wuhan Xinxin Semiconductor Manufacturing Corp. (XMC) and found on some routers from Chinese manufactures.
We need to add this chip to google's AVL
The flash ID was incorrectly set to0x160x410x17.
Update to0x200x410x17as per the datasheet.The data sheet can be found here:
https://www.xmcwh.com/uploads/954/XM25LU64C_V1.5.pdfSigned-off-by Kankan Sun <[email protected]>
NAK.
Please read the former responses. Until there are any answers to the open questions I'll going to ignore any further patches.
-michael
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Hi Michael,
Thanks for your review and my apologies for missing your earlier questions. Here is v4 of the patch, which addresses all open issues:
---
Quoted 1 line
*What is "Google AVL"?*
For clarity, "Google AVL" refers to the **Approved Vendor List** used by ChromiumOS to validate flash parts.
---
Quoted 1 line
*The datasheet link gives a 404 here.*
The new and working datasheet link is:
https://www.xmcwh.com/uploads/954/XM25LU64C_V1.5.pdf
---
Quoted 1 line
*does the flash support SFDP?*
Yes, I have verified that the chip does support SFDP.
Thanks again for your guidance.
Best regards,
Sun
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PATCH v4 1/1 mtd: spi-nor: Add support for XM25LU64C
In reply to SsunkThe XM25LU64C is a 64Mbit (8MB) SPI-NOR flash memory manufactured by Wuhan Xinxin Semiconductor Manufacturing Corp. (XMC). This device supports SFDP. However, additional flashflags beyond SFDP are required to fully describe its capabilities.
This patch adds an explicit entry for the XM25LU64C, marking support for:
- 4KiB sector erase (SECT_4K)
- Dual and Quad read modes (DUAL_READ, QUAD_READ)
- Block-level lock/unlock support (HAS_LOCK)
- Top/Bottom protection bits (HAS_TB)
These flash capabilities were confirmed against the vendor datasheet:
https://www.xmcwh.com/uploads/954/XM25LU64C_V1.5.pdf
### Testing:
Tested according to the "Minimum testing requirements" described in:
https://docs.kernel.org/driver-api/mtd/spi-nor.html
- This flash is populated on the MT8189-chromebook board and was tested at 52M
- frequency using the jedec,spi-nor SPI controller.
- Detected correctly by Linux MTD subsystem:
# cat /sys/bus/spi/devices/spi5.0/spi-nor/partname
XM25LU64C # cat /sys/bus/spi/devices/spi5.0/spi-nor/jedec_id
204117 # cat /sys/bus/spi/devices/spi5.0/spi-nor/manufacturer
xmc- Verified SFDP table presence and correctness:
# xxd -p /sys/bus/spi/devices/spi5.0/spi-nor/sfdp
53464450060102ff00060110300000ff20000104d00000ff84000102c0...
# sha256sum /sys/bus/spi/devices/spi5.0/spi-nor/sfdp
27ef209af54d6fef4f51f14300e50db95f13180024f3e1aa1c4202edb4914be5- Dump debugfs data:
# cat /sys/kernel/debug/spi-nor/spi5.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x03
mode cycles 0
dummy cycles 0
1S-1S-2S
opcode 0x3b
mode cycles 0
dummy cycles 8
1S-2S-2S
opcode 0xbb
mode cycles 2
dummy cycles 2
1S-1S-4S
opcode 0x6b
mode cycles 0
dummy cycles 8
1S-4S-4S
opcode 0xeb
mode cycles 2
dummy cycles 4
4S-4S-4S
opcode 0xeb
mode cycles 2
dummy cycles 0
Supported page program modes by the flash
1S-1S-1S
opcode 0x02
Supported page program modes by the flash
1S-1S-1S
opcode 0x02 # cat /sys/kernel/debug/spi-nor/spi5.0/params
name XM25LU64C
id 20 41 17 20 41 17
size 8.00 MiB
write size 1
page size 256
address nbytes 3
flags HAS_16BIT_SR | SOFT_RESET opcodes
read 0xbb
dummy cycles 4
erase 0x20
program 0x02
8D extension none
protocols
read 1S-2S-2S
write 1S-1S-1S
register 1S-1S-1S
erase commands
20 (4.00 KiB) [1]
52 (32.0 KiB) [2]
d8 (64.0 KiB) [3]
c7 (8.00 MiB)
sector map
region (in hex) | erase mask | flags
------------------+------------+----------
00000000-007fffff | [ 123] |- Vrify write:
# dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
2097152 bytes (2.1 MB, 2.0 MiB) copied, 0.0334051 s, 62.8 MB/s # sha256sum spi*
be845b59c00525b0e0d570468c7b014bc8e9895c61ce74e8ca4cfc00e34d08aa spi_test---
Changes since v2:
- Fixed broken datasheet URL
- Rewrote commit message to clarify SFDP usage and flash flags
- Removed irrelevant internal vendor references
- Added test information of Minimum testing requirements
--- drivers/mtd/spi-nor/xmc.c | 6 ++++++ 1 file changed, 6 insertions(+)
drivers/mtd/spi-nor/xmc.c +6 -0
@@ -19,6 +19,12 @@ static const struct flash_info xmc_nor_parts[] = { .name = "XM25QH128A", .size = SZ_16M, .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id = SNOR_ID(0x20, 0x41, 0x17), + .name = "XM25LU64C", + .size = SZ_8M, + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, };
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Re: [PATCH v4] mtd: spi-nor: Add support for XM25LU64C
Quoted 4 lines · Ssunk
The XM25LU64C is a 64Mbit (8MB) SPI-NOR flash memory manufactured by Wuhan Xinxin Semiconductor Manufacturing Corp. (XMC). This device supports SFDP. However, additional flashflags beyond SFDP are required to fully describe its capabilities.
what flags are you referring to?
Quoted 3 lines
This patch adds an explicit entry for the XM25LU64C, marking support for:
- 4KiB sector erase (
SECT_4K)
won't need it, defined in sfdp
Quoted 1 line
- Dual and Quad read modes (
DUAL_READ,QUAD_READ)
defined in sfdp
Quoted 2 lines
- Block-level lock/unlock support (
HAS_LOCK)
- Top/Bottom protection bits (HAS_TB)
these shall be ok
Quoted 6 lines
These flash capabilities were confirmed against the vendor datasheet:
https://www.xmcwh.com/uploads/954/XM25LU64C_V1.5.pdf
### Testing:
you can add the testing comments in the "---" comment section
Quoted 6 lines
Tested according to the "Minimum testing requirements" described in:
https://docs.kernel.org/driver-api/mtd/spi-nor.html
- This flash is populated on the MT8189-chromebook board and was tested at 52M
- frequency using the jedec,spi-nor SPI controller.
this is the compatible for the SPI NOR flash, not the SPI controller :)
Quoted 8 lines
- Detected correctly by Linux MTD subsystem:
# cat /sys/bus/spi/devices/spi5.0/spi-nor/partname XM25LU64C# cat /sys/bus/spi/devices/spi5.0/spi-nor/jedec_id 204117
Quoted 7 lines
# cat /sys/bus/spi/devices/spi5.0/spi-nor/manufacturer xmc- Verified SFDP table presence and correctness:
# xxd -p /sys/bus/spi/devices/spi5.0/spi-nor/sfdp 53464450060102ff00060110300000ff20000104d00000ff84000102c0...
we need the full output. We'll reference it in case there will be updates to this flash entry. Please send the full output.
Quoted 69 lines
# sha256sum /sys/bus/spi/devices/spi5.0/spi-nor/sfdp 27ef209af54d6fef4f51f14300e50db95f13180024f3e1aa1c4202edb4914be5- Dump debugfs data:
# cat /sys/kernel/debug/spi-nor/spi5.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 0 Supported page program modes by the flash 1S-1S-1S opcode 0x02 Supported page program modes by the flash 1S-1S-1S opcode 0x02# cat /sys/kernel/debug/spi-nor/spi5.0/params name XM25LU64C id 20 41 17 20 41 17 size 8.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_16BIT_SR | SOFT_RESETopcodes read 0xbb dummy cycles 4 erase 0x20 program 0x02 8D extension none protocols read 1S-2S-2S write 1S-1S-1S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (8.00 MiB) sector map region (in hex) | erase mask | flags ------------------+------------+---------- 00000000-007fffff | [ 123] |
Quoted 5 lines
- Vrify write:
# dd if=/dev/urandom of=./spi_test bs=1M count=2 2+0 records in 2+0 records out 2097152 bytes (2.1 MB, 2.0 MiB) copied, 0.0334051 s, 62.8 MB/s
here you just generated a file of 2 MB
Quoted 4 lines
# sha256sum spi*
be845b59c00525b0e0d570468c7b014bc8e9895c61ce74e8ca4cfc00e34d08aa spi_testand here you get the sha256sum of it. you haven't verified the correctness of a flash write. Please follow the testing steps in their fullness.
Quoted 19 lines
Signed-off-by Kankan Sun <[email protected]>---
Changes since v2:
- Fixed broken datasheet URL
- Rewrote commit message to clarify SFDP usage and flash flags
- Removed irrelevant internal vendor references
- Added test information of Minimum testing requirements--- drivers/mtd/spi-nor/xmc.c | 6 ++++++ 1 file changed, 6 insertions(+)drivers/mtd/spi-nor/xmc.c +0
-0
drivers/mtd/spi-nor/xmc.c static const struct flash_info xmc_nor_parts[] = { · line 24
Quoted 6 lines
drivers/mtd/spi-nor/xmc.c +3
-0@@ -19,6 +19,12 @@ static const struct flash_info xmc_nor_parts[] = { .name = "XM25QH128A", .size = SZ_16M, .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id = SNOR_ID(0x20, 0x41, 0x17), + .name = "XM25LU64C",
remove name, but add it as a comment. See commits of recent flash additions.
drivers/mtd/spi-nor/xmc.c static const struct flash_info xmc_nor_parts[] = { · line 25
Quoted 1 line
drivers/mtd/spi-nor/xmc.c +1
-0+ .size = SZ_8M,
if the flash defines SFDP, you won't need the size field.
drivers/mtd/spi-nor/xmc.c static const struct flash_info xmc_nor_parts[] = { · line 26
Quoted 1 line
drivers/mtd/spi-nor/xmc.c +1
-0+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB
these are ok, if tested. Did you test locking?
,
drivers/mtd/spi-nor/xmc.c static const struct flash_info xmc_nor_parts[] = { · line 27
Quoted 1 line
drivers/mtd/spi-nor/xmc.c +1
-0+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
you won't need this, they'll be discovered at sfdp parsing.
drivers/mtd/spi-nor/xmc.c static const struct flash_info xmc_nor_parts[] = { · line 30
Quoted 3 lines
drivers/mtd/spi-nor/xmc.c +0
-0}, };
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