FAILED: patch "[PATCH] crypto: octeontx2 - Fix address alignment on CN10K A0/A1 and" failed to apply to 6.6-stable tree
Subsystems (3)
[email protected]
maintainerThe patch below does not apply to the 6.6-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.6.y
git checkout FETCH_HEAD
git cherry-pick -x 2e13163b43e6bb861182ea999a80dd1d893c0cbf
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2025082142-trend-rind-de4e@gregkh' --subject-prefix 'PATCH 6.6.y' HEAD^..
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 2e13163b43e6bb861182ea999a80dd1d893c0cbf Mon Sep 17 00:00:00 2001
From: Bharat Bhushan <[email protected]>
Date: Thu, 22 May 2025 15:36:26 +0530
Subject: [PATCH] crypto: octeontx2 - Fix address alignment on CN10K A0/A1 and
OcteonTX2
octeontx2 crypto driver allocates memory using kmalloc/kzalloc, and uses this memory for dma (does dma_map_single()). It assumes that kmalloc/kzalloc will return 128-byte aligned address. But kmalloc/kzalloc returns 8-byte aligned address after below changes:
"9382bc44b5f5 arm64: allow kmalloc() caches aligned to the
smaller cache_line_size()
Memory allocated are used for following purpose:
- Input data or scatter list address - 8-Byte alignment
- Output data or gather list address - 8-Byte alignment
- Completion address - 32-Byte alignment.
This patch ensures all addresses are aligned as mentioned above.
drivers/crypto/marvell/octeontx2/otx2_cpt_reqmgr.h +51 -15
@@ -34,6 +34,9 @@#define SG_COMP_2 2#define SG_COMP_1 1 +#define OTX2_CPT_DPTR_RPTR_ALIGN 8 +#define OTX2_CPT_RES_ADDR_ALIGN 32 +union otx2_cpt_opcode {u16 flags;struct {
@@ -417,10 +420,9 @@ static inline struct otx2_cpt_inst_info * otx2_sg_info_create(struct pci_dev *pdev, struct otx2_cpt_req_info *req, gfp_t gfp) { - int align = OTX2_CPT_DMA_MINALIGN; struct otx2_cpt_inst_info *info; -u32 dlen, align_dlen, info_len; -u16 g_sz_bytes, s_sz_bytes; +u32 dlen, info_len; +u16 g_len, s_len;u32 total_mem_len; if (unlikely(req->in_cnt > OTX2_CPT_MAX_SG_IN_CNT ||
@@ -429,22 +431,54 @@ otx2_sg_info_create(struct pci_dev *pdev, struct otx2_cpt_req_info *req,return NULL ; } - g_sz_bytes = ((req->in_cnt +3 ) /4 ) * -sizeof (struct otx2_cpt_sglist_component ); - s_sz_bytes = ((req->out_cnt +3 ) /4 ) * -sizeof (struct otx2_cpt_sglist_component ); +/* Allocate memory to meet below alignment requirement: +* ------------------------------------ +* | struct otx2_cpt_inst_info | +* | (No alignment required) | +* | --------------------------------| +* | | padding for ARCH_DMA_MINALIGN | +* | | alignment | +* |------------------------------------| +* | SG List Header of 8 Byte | +* |------------------------------------| +* | SG List Gather/Input memory | +* | Length = multiple of 32Bytes | +* | Alignment = 8Byte | +* |---------------------------------- | +* | SG List Scatter/Output memory | +* | Length = multiple of 32Bytes | +* | Alignment = 8Byte | +* | -------------------------------| +* | | padding for 32B alignment | +* |------------------------------------| +* | Result response memory | +* | Alignment = 32Byte | +* ------------------------------------ +*/ - dlen = g_sz_bytes + s_sz_bytes +SG_LIST_HDR_SIZE ; - align_dlen =ALIGN (dlen, align); - info_len =ALIGN (sizeof (*info), align); - total_mem_len = align_dlen + info_len +sizeof (union otx2_cpt_res_s ); + info_len =sizeof (*info); + + g_len = ((req->in_cnt +3 ) /4 ) * +sizeof (struct otx2_cpt_sglist_component ); + s_len = ((req->out_cnt +3 ) /4 ) * +sizeof (struct otx2_cpt_sglist_component ); + + dlen = g_len + s_len +SG_LIST_HDR_SIZE ; + +/* Allocate extra memory for SG and response address alignment */ + total_mem_len =ALIGN (info_len,OTX2_CPT_DPTR_RPTR_ALIGN ); + total_mem_len += (ARCH_DMA_MINALIGN -1 ) & + ~(OTX2_CPT_DPTR_RPTR_ALIGN -1 ); + total_mem_len +=ALIGN (dlen,OTX2_CPT_RES_ADDR_ALIGN ); + total_mem_len +=sizeof (union otx2_cpt_res_s ); info =kzalloc (total_mem_len, gfp);if (unlikely (!info))return NULL ; info->dlen = dlen; - info->in_buffer = (u8 *)info + info_len; + info->in_buffer =PTR_ALIGN ((u8 *)info + info_len,ARCH_DMA_MINALIGN ); + info->out_buffer = info->in_buffer +SG_LIST_HDR_SIZE + g_len; ((u16 *)info->in_buffer)[0 ] = req->out_cnt; ((u16 *)info->in_buffer)[1 ] = req->in_cnt;
@@ -460,7 +494,7 @@ otx2_sg_info_create(struct pci_dev *pdev, struct otx2_cpt_req_info *req, }if (setup_sgio_components (pdev, req->out, req->out_cnt, - &info->in_buffer[8 + g_sz_bytes])) { + info->out_buffer)) {dev_err (&pdev->dev,"Failed to setup scatter list\n" ); goto destroy_info; }
@@ -476,8 +510,10 @@ otx2_sg_info_create(struct pci_dev *pdev, struct otx2_cpt_req_info *req,* Get buffer for union otx2_cpt_res_s response * structure and its physical address */ - info->completion_addr = info->in_buffer + align_dlen; - info->comp_baddr = info->dptr_baddr + align_dlen; + info->completion_addr =PTR_ALIGN ((info->in_buffer + dlen), +OTX2_CPT_RES_ADDR_ALIGN ); + info->comp_baddr =ALIGN ((info->dptr_baddr + dlen), +OTX2_CPT_RES_ADDR_ALIGN );return info;